1 files changed, 6 insertions, 9 deletions

diff --git a/arch/x86/kernel/cpu/mcheck/p5.c b/arch/x86/kernel/cpu/mcheck/p5.c
index 015f481ab1b0..5c0e6533d9bc 100644
--- a/arch/x86/kernel/cpu/mcheck/p5.c
+++ b/arch/x86/kernel/cpu/mcheck/p5.c
@@ -10,12 +10,11 @@
 
 #include <asm/processor.h>
 #include <asm/system.h>
+#include <asm/mce.h>
 #include <asm/msr.h>
 
-#include "mce.h"
-
 /* By default disabled */
-int             mce_p5_enable;
+int mce_p5_enabled __read_mostly;
 
 /* Machine check handler for Pentium class Intel CPUs: */
 static void pentium_machine_check(struct pt_regs *regs, long error_code)
@@ -43,15 +42,13 @@ void intel_p5_mcheck_init(struct cpuinfo_x86 *c)
 {
         u32 l, h;
 
-        /* Check for MCE support: */
-        if (!cpu_has(c, X86_FEATURE_MCE))
+        /* Default P5 to off as its often misconnected: */
+        if (!mce_p5_enabled)
                 return;
 
-#ifdef CONFIG_X86_OLD_MCE
-        /* Default P5 to off as its often misconnected: */
-        if (mce_disabled != -1)
+        /* Check for MCE support: */
+        if (!cpu_has(c, X86_FEATURE_MCE))
                 return;
-#endif
 
         machine_check_vector = pentium_machine_check;
         /* Make sure the vector pointer is visible before we enable MCEs: */