diff options
Diffstat (limited to 'arch/x86/kernel/cpu/mcheck/mce-severity.c')
-rw-r--r-- | arch/x86/kernel/cpu/mcheck/mce-severity.c | 26 |
1 files changed, 23 insertions, 3 deletions
diff --git a/arch/x86/kernel/cpu/mcheck/mce-severity.c b/arch/x86/kernel/cpu/mcheck/mce-severity.c index 7395d5f4272d..0c82091b1652 100644 --- a/arch/x86/kernel/cpu/mcheck/mce-severity.c +++ b/arch/x86/kernel/cpu/mcheck/mce-severity.c | |||
@@ -54,7 +54,14 @@ static struct severity { | |||
54 | #define MASK(x, y) .mask = x, .result = y | 54 | #define MASK(x, y) .mask = x, .result = y |
55 | #define MCI_UC_S (MCI_STATUS_UC|MCI_STATUS_S) | 55 | #define MCI_UC_S (MCI_STATUS_UC|MCI_STATUS_S) |
56 | #define MCI_UC_SAR (MCI_STATUS_UC|MCI_STATUS_S|MCI_STATUS_AR) | 56 | #define MCI_UC_SAR (MCI_STATUS_UC|MCI_STATUS_S|MCI_STATUS_AR) |
57 | #define MCI_ADDR (MCI_STATUS_ADDRV|MCI_STATUS_MISCV) | ||
57 | #define MCACOD 0xffff | 58 | #define MCACOD 0xffff |
59 | /* Architecturally defined codes from SDM Vol. 3B Chapter 15 */ | ||
60 | #define MCACOD_SCRUB 0x00C0 /* 0xC0-0xCF Memory Scrubbing */ | ||
61 | #define MCACOD_SCRUBMSK 0xfff0 | ||
62 | #define MCACOD_L3WB 0x017A /* L3 Explicit Writeback */ | ||
63 | #define MCACOD_DATA 0x0134 /* Data Load */ | ||
64 | #define MCACOD_INSTR 0x0150 /* Instruction Fetch */ | ||
58 | 65 | ||
59 | MCESEV( | 66 | MCESEV( |
60 | NO, "Invalid", | 67 | NO, "Invalid", |
@@ -102,11 +109,24 @@ static struct severity { | |||
102 | SER, BITCLR(MCI_STATUS_S) | 109 | SER, BITCLR(MCI_STATUS_S) |
103 | ), | 110 | ), |
104 | 111 | ||
105 | /* AR add known MCACODs here */ | ||
106 | MCESEV( | 112 | MCESEV( |
107 | PANIC, "Action required with lost events", | 113 | PANIC, "Action required with lost events", |
108 | SER, BITSET(MCI_STATUS_OVER|MCI_UC_SAR) | 114 | SER, BITSET(MCI_STATUS_OVER|MCI_UC_SAR) |
109 | ), | 115 | ), |
116 | |||
117 | /* known AR MCACODs: */ | ||
118 | #ifdef CONFIG_MEMORY_FAILURE | ||
119 | MCESEV( | ||
120 | KEEP, "HT thread notices Action required: data load error", | ||
121 | SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_DATA), | ||
122 | MCGMASK(MCG_STATUS_EIPV, 0) | ||
123 | ), | ||
124 | MCESEV( | ||
125 | AR, "Action required: data load error", | ||
126 | SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_DATA), | ||
127 | USER | ||
128 | ), | ||
129 | #endif | ||
110 | MCESEV( | 130 | MCESEV( |
111 | PANIC, "Action required: unknown MCACOD", | 131 | PANIC, "Action required: unknown MCACOD", |
112 | SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR, MCI_UC_SAR) | 132 | SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR, MCI_UC_SAR) |
@@ -115,11 +135,11 @@ static struct severity { | |||
115 | /* known AO MCACODs: */ | 135 | /* known AO MCACODs: */ |
116 | MCESEV( | 136 | MCESEV( |
117 | AO, "Action optional: memory scrubbing error", | 137 | AO, "Action optional: memory scrubbing error", |
118 | SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|0xfff0, MCI_UC_S|0x00c0) | 138 | SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCACOD_SCRUBMSK, MCI_UC_S|MCACOD_SCRUB) |
119 | ), | 139 | ), |
120 | MCESEV( | 140 | MCESEV( |
121 | AO, "Action optional: last level cache writeback error", | 141 | AO, "Action optional: last level cache writeback error", |
122 | SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCACOD, MCI_UC_S|0x017a) | 142 | SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCACOD, MCI_UC_S|MCACOD_L3WB) |
123 | ), | 143 | ), |
124 | MCESEV( | 144 | MCESEV( |
125 | SOME, "Action optional: unknown MCACOD", | 145 | SOME, "Action optional: unknown MCACOD", |