diff options
Diffstat (limited to 'arch/x86/kernel/cpu/common.c')
-rw-r--r-- | arch/x86/kernel/cpu/common.c | 155 |
1 files changed, 103 insertions, 52 deletions
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 6fd316689c47..3a9d45a14ad9 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c | |||
@@ -27,7 +27,7 @@ | |||
27 | #ifdef CONFIG_X86_LOCAL_APIC | 27 | #ifdef CONFIG_X86_LOCAL_APIC |
28 | #include <asm/mpspec.h> | 28 | #include <asm/mpspec.h> |
29 | #include <asm/apic.h> | 29 | #include <asm/apic.h> |
30 | #include <mach_apic.h> | 30 | #include <asm/genapic.h> |
31 | #include <asm/genapic.h> | 31 | #include <asm/genapic.h> |
32 | #include <asm/uv/uv.h> | 32 | #include <asm/uv/uv.h> |
33 | #endif | 33 | #endif |
@@ -40,6 +40,7 @@ | |||
40 | #include <asm/sections.h> | 40 | #include <asm/sections.h> |
41 | #include <asm/setup.h> | 41 | #include <asm/setup.h> |
42 | #include <asm/hypervisor.h> | 42 | #include <asm/hypervisor.h> |
43 | #include <asm/stackprotector.h> | ||
43 | 44 | ||
44 | #include "cpu.h" | 45 | #include "cpu.h" |
45 | 46 | ||
@@ -53,6 +54,15 @@ cpumask_var_t cpu_initialized_mask; | |||
53 | /* representing cpus for which sibling maps can be computed */ | 54 | /* representing cpus for which sibling maps can be computed */ |
54 | cpumask_var_t cpu_sibling_setup_mask; | 55 | cpumask_var_t cpu_sibling_setup_mask; |
55 | 56 | ||
57 | /* correctly size the local cpu masks */ | ||
58 | void __init setup_cpu_local_masks(void) | ||
59 | { | ||
60 | alloc_bootmem_cpumask_var(&cpu_initialized_mask); | ||
61 | alloc_bootmem_cpumask_var(&cpu_callin_mask); | ||
62 | alloc_bootmem_cpumask_var(&cpu_callout_mask); | ||
63 | alloc_bootmem_cpumask_var(&cpu_sibling_setup_mask); | ||
64 | } | ||
65 | |||
56 | #else /* CONFIG_X86_32 */ | 66 | #else /* CONFIG_X86_32 */ |
57 | 67 | ||
58 | cpumask_t cpu_callin_map; | 68 | cpumask_t cpu_callin_map; |
@@ -114,6 +124,7 @@ DEFINE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page) = { .gdt = { | |||
114 | 124 | ||
115 | [GDT_ENTRY_ESPFIX_SS] = { { { 0x00000000, 0x00c09200 } } }, | 125 | [GDT_ENTRY_ESPFIX_SS] = { { { 0x00000000, 0x00c09200 } } }, |
116 | [GDT_ENTRY_PERCPU] = { { { 0x0000ffff, 0x00cf9200 } } }, | 126 | [GDT_ENTRY_PERCPU] = { { { 0x0000ffff, 0x00cf9200 } } }, |
127 | GDT_STACK_CANARY_INIT | ||
117 | #endif | 128 | #endif |
118 | } }; | 129 | } }; |
119 | EXPORT_PER_CPU_SYMBOL_GPL(gdt_page); | 130 | EXPORT_PER_CPU_SYMBOL_GPL(gdt_page); |
@@ -216,6 +227,49 @@ static inline void squash_the_stupid_serial_number(struct cpuinfo_x86 *c) | |||
216 | #endif | 227 | #endif |
217 | 228 | ||
218 | /* | 229 | /* |
230 | * Some CPU features depend on higher CPUID levels, which may not always | ||
231 | * be available due to CPUID level capping or broken virtualization | ||
232 | * software. Add those features to this table to auto-disable them. | ||
233 | */ | ||
234 | struct cpuid_dependent_feature { | ||
235 | u32 feature; | ||
236 | u32 level; | ||
237 | }; | ||
238 | static const struct cpuid_dependent_feature __cpuinitconst | ||
239 | cpuid_dependent_features[] = { | ||
240 | { X86_FEATURE_MWAIT, 0x00000005 }, | ||
241 | { X86_FEATURE_DCA, 0x00000009 }, | ||
242 | { X86_FEATURE_XSAVE, 0x0000000d }, | ||
243 | { 0, 0 } | ||
244 | }; | ||
245 | |||
246 | static void __cpuinit filter_cpuid_features(struct cpuinfo_x86 *c, bool warn) | ||
247 | { | ||
248 | const struct cpuid_dependent_feature *df; | ||
249 | for (df = cpuid_dependent_features; df->feature; df++) { | ||
250 | /* | ||
251 | * Note: cpuid_level is set to -1 if unavailable, but | ||
252 | * extended_extended_level is set to 0 if unavailable | ||
253 | * and the legitimate extended levels are all negative | ||
254 | * when signed; hence the weird messing around with | ||
255 | * signs here... | ||
256 | */ | ||
257 | if (cpu_has(c, df->feature) && | ||
258 | ((s32)df->feature < 0 ? | ||
259 | (u32)df->feature > (u32)c->extended_cpuid_level : | ||
260 | (s32)df->feature > (s32)c->cpuid_level)) { | ||
261 | clear_cpu_cap(c, df->feature); | ||
262 | if (warn) | ||
263 | printk(KERN_WARNING | ||
264 | "CPU: CPU feature %s disabled " | ||
265 | "due to lack of CPUID level 0x%x\n", | ||
266 | x86_cap_flags[df->feature], | ||
267 | df->level); | ||
268 | } | ||
269 | } | ||
270 | } | ||
271 | |||
272 | /* | ||
219 | * Naming convention should be: <Name> [(<Codename>)] | 273 | * Naming convention should be: <Name> [(<Codename>)] |
220 | * This table only is used unless init_<vendor>() below doesn't set it; | 274 | * This table only is used unless init_<vendor>() below doesn't set it; |
221 | * in particular, if CPUID levels 0x80000002..4 are supported, this isn't used | 275 | * in particular, if CPUID levels 0x80000002..4 are supported, this isn't used |
@@ -245,18 +299,29 @@ static char __cpuinit *table_lookup_model(struct cpuinfo_x86 *c) | |||
245 | 299 | ||
246 | __u32 cleared_cpu_caps[NCAPINTS] __cpuinitdata; | 300 | __u32 cleared_cpu_caps[NCAPINTS] __cpuinitdata; |
247 | 301 | ||
302 | void load_percpu_segment(int cpu) | ||
303 | { | ||
304 | #ifdef CONFIG_X86_32 | ||
305 | loadsegment(fs, __KERNEL_PERCPU); | ||
306 | #else | ||
307 | loadsegment(gs, 0); | ||
308 | wrmsrl(MSR_GS_BASE, (unsigned long)per_cpu(irq_stack_union.gs_base, cpu)); | ||
309 | #endif | ||
310 | load_stack_canary_segment(); | ||
311 | } | ||
312 | |||
248 | /* Current gdt points %fs at the "master" per-cpu area: after this, | 313 | /* Current gdt points %fs at the "master" per-cpu area: after this, |
249 | * it's on the real one. */ | 314 | * it's on the real one. */ |
250 | void switch_to_new_gdt(void) | 315 | void switch_to_new_gdt(int cpu) |
251 | { | 316 | { |
252 | struct desc_ptr gdt_descr; | 317 | struct desc_ptr gdt_descr; |
253 | 318 | ||
254 | gdt_descr.address = (long)get_cpu_gdt_table(smp_processor_id()); | 319 | gdt_descr.address = (long)get_cpu_gdt_table(cpu); |
255 | gdt_descr.size = GDT_SIZE - 1; | 320 | gdt_descr.size = GDT_SIZE - 1; |
256 | load_gdt(&gdt_descr); | 321 | load_gdt(&gdt_descr); |
257 | #ifdef CONFIG_X86_32 | 322 | /* Reload the per-cpu base */ |
258 | asm("mov %0, %%fs" : : "r" (__KERNEL_PERCPU) : "memory"); | 323 | |
259 | #endif | 324 | load_percpu_segment(cpu); |
260 | } | 325 | } |
261 | 326 | ||
262 | static struct cpu_dev *cpu_devs[X86_VENDOR_NUM] = {}; | 327 | static struct cpu_dev *cpu_devs[X86_VENDOR_NUM] = {}; |
@@ -386,11 +451,7 @@ void __cpuinit detect_ht(struct cpuinfo_x86 *c) | |||
386 | } | 451 | } |
387 | 452 | ||
388 | index_msb = get_count_order(smp_num_siblings); | 453 | index_msb = get_count_order(smp_num_siblings); |
389 | #ifdef CONFIG_X86_64 | 454 | c->phys_proc_id = apic->phys_pkg_id(c->initial_apicid, index_msb); |
390 | c->phys_proc_id = phys_pkg_id(index_msb); | ||
391 | #else | ||
392 | c->phys_proc_id = phys_pkg_id(c->initial_apicid, index_msb); | ||
393 | #endif | ||
394 | 455 | ||
395 | smp_num_siblings = smp_num_siblings / c->x86_max_cores; | 456 | smp_num_siblings = smp_num_siblings / c->x86_max_cores; |
396 | 457 | ||
@@ -398,13 +459,8 @@ void __cpuinit detect_ht(struct cpuinfo_x86 *c) | |||
398 | 459 | ||
399 | core_bits = get_count_order(c->x86_max_cores); | 460 | core_bits = get_count_order(c->x86_max_cores); |
400 | 461 | ||
401 | #ifdef CONFIG_X86_64 | 462 | c->cpu_core_id = apic->phys_pkg_id(c->initial_apicid, index_msb) & |
402 | c->cpu_core_id = phys_pkg_id(index_msb) & | ||
403 | ((1 << core_bits) - 1); | ||
404 | #else | ||
405 | c->cpu_core_id = phys_pkg_id(c->initial_apicid, index_msb) & | ||
406 | ((1 << core_bits) - 1); | 463 | ((1 << core_bits) - 1); |
407 | #endif | ||
408 | } | 464 | } |
409 | 465 | ||
410 | out: | 466 | out: |
@@ -573,11 +629,10 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c) | |||
573 | if (this_cpu->c_early_init) | 629 | if (this_cpu->c_early_init) |
574 | this_cpu->c_early_init(c); | 630 | this_cpu->c_early_init(c); |
575 | 631 | ||
576 | validate_pat_support(c); | ||
577 | |||
578 | #ifdef CONFIG_SMP | 632 | #ifdef CONFIG_SMP |
579 | c->cpu_index = boot_cpu_id; | 633 | c->cpu_index = boot_cpu_id; |
580 | #endif | 634 | #endif |
635 | filter_cpuid_features(c, false); | ||
581 | } | 636 | } |
582 | 637 | ||
583 | void __init early_cpu_init(void) | 638 | void __init early_cpu_init(void) |
@@ -640,7 +695,7 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c) | |||
640 | c->initial_apicid = (cpuid_ebx(1) >> 24) & 0xFF; | 695 | c->initial_apicid = (cpuid_ebx(1) >> 24) & 0xFF; |
641 | #ifdef CONFIG_X86_32 | 696 | #ifdef CONFIG_X86_32 |
642 | # ifdef CONFIG_X86_HT | 697 | # ifdef CONFIG_X86_HT |
643 | c->apicid = phys_pkg_id(c->initial_apicid, 0); | 698 | c->apicid = apic->phys_pkg_id(c->initial_apicid, 0); |
644 | # else | 699 | # else |
645 | c->apicid = c->initial_apicid; | 700 | c->apicid = c->initial_apicid; |
646 | # endif | 701 | # endif |
@@ -687,7 +742,7 @@ static void __cpuinit identify_cpu(struct cpuinfo_x86 *c) | |||
687 | this_cpu->c_identify(c); | 742 | this_cpu->c_identify(c); |
688 | 743 | ||
689 | #ifdef CONFIG_X86_64 | 744 | #ifdef CONFIG_X86_64 |
690 | c->apicid = phys_pkg_id(0); | 745 | c->apicid = apic->phys_pkg_id(c->initial_apicid, 0); |
691 | #endif | 746 | #endif |
692 | 747 | ||
693 | /* | 748 | /* |
@@ -711,6 +766,9 @@ static void __cpuinit identify_cpu(struct cpuinfo_x86 *c) | |||
711 | * we do "generic changes." | 766 | * we do "generic changes." |
712 | */ | 767 | */ |
713 | 768 | ||
769 | /* Filter out anything that depends on CPUID levels we don't have */ | ||
770 | filter_cpuid_features(c, true); | ||
771 | |||
714 | /* If the model name is still unset, do table lookup. */ | 772 | /* If the model name is still unset, do table lookup. */ |
715 | if (!c->x86_model_id[0]) { | 773 | if (!c->x86_model_id[0]) { |
716 | char *p; | 774 | char *p; |
@@ -885,12 +943,8 @@ struct desc_ptr idt_descr = { 256 * 16 - 1, (unsigned long) idt_table }; | |||
885 | 943 | ||
886 | DEFINE_PER_CPU_FIRST(union irq_stack_union, | 944 | DEFINE_PER_CPU_FIRST(union irq_stack_union, |
887 | irq_stack_union) __aligned(PAGE_SIZE); | 945 | irq_stack_union) __aligned(PAGE_SIZE); |
888 | #ifdef CONFIG_SMP | ||
889 | DEFINE_PER_CPU(char *, irq_stack_ptr); /* will be set during per cpu init */ | ||
890 | #else | ||
891 | DEFINE_PER_CPU(char *, irq_stack_ptr) = | 946 | DEFINE_PER_CPU(char *, irq_stack_ptr) = |
892 | per_cpu_var(irq_stack_union.irq_stack) + IRQ_STACK_SIZE - 64; | 947 | init_per_cpu_var(irq_stack_union.irq_stack) + IRQ_STACK_SIZE - 64; |
893 | #endif | ||
894 | 948 | ||
895 | DEFINE_PER_CPU(unsigned long, kernel_stack) = | 949 | DEFINE_PER_CPU(unsigned long, kernel_stack) = |
896 | (unsigned long)&init_thread_union - KERNEL_STACK_OFFSET + THREAD_SIZE; | 950 | (unsigned long)&init_thread_union - KERNEL_STACK_OFFSET + THREAD_SIZE; |
@@ -933,16 +987,21 @@ unsigned long kernel_eflags; | |||
933 | */ | 987 | */ |
934 | DEFINE_PER_CPU(struct orig_ist, orig_ist); | 988 | DEFINE_PER_CPU(struct orig_ist, orig_ist); |
935 | 989 | ||
936 | #else | 990 | #else /* x86_64 */ |
937 | 991 | ||
938 | /* Make sure %fs is initialized properly in idle threads */ | 992 | #ifdef CONFIG_CC_STACKPROTECTOR |
993 | DEFINE_PER_CPU(unsigned long, stack_canary); | ||
994 | #endif | ||
995 | |||
996 | /* Make sure %fs and %gs are initialized properly in idle threads */ | ||
939 | struct pt_regs * __cpuinit idle_regs(struct pt_regs *regs) | 997 | struct pt_regs * __cpuinit idle_regs(struct pt_regs *regs) |
940 | { | 998 | { |
941 | memset(regs, 0, sizeof(struct pt_regs)); | 999 | memset(regs, 0, sizeof(struct pt_regs)); |
942 | regs->fs = __KERNEL_PERCPU; | 1000 | regs->fs = __KERNEL_PERCPU; |
1001 | regs->gs = __KERNEL_STACK_CANARY; | ||
943 | return regs; | 1002 | return regs; |
944 | } | 1003 | } |
945 | #endif | 1004 | #endif /* x86_64 */ |
946 | 1005 | ||
947 | /* | 1006 | /* |
948 | * cpu_init() initializes state that is per-CPU. Some data is already | 1007 | * cpu_init() initializes state that is per-CPU. Some data is already |
@@ -961,10 +1020,6 @@ void __cpuinit cpu_init(void) | |||
961 | struct task_struct *me; | 1020 | struct task_struct *me; |
962 | int i; | 1021 | int i; |
963 | 1022 | ||
964 | loadsegment(fs, 0); | ||
965 | loadsegment(gs, 0); | ||
966 | load_gs_base(cpu); | ||
967 | |||
968 | #ifdef CONFIG_NUMA | 1023 | #ifdef CONFIG_NUMA |
969 | if (cpu != 0 && percpu_read(node_number) == 0 && | 1024 | if (cpu != 0 && percpu_read(node_number) == 0 && |
970 | cpu_to_node(cpu) != NUMA_NO_NODE) | 1025 | cpu_to_node(cpu) != NUMA_NO_NODE) |
@@ -985,7 +1040,9 @@ void __cpuinit cpu_init(void) | |||
985 | * and set up the GDT descriptor: | 1040 | * and set up the GDT descriptor: |
986 | */ | 1041 | */ |
987 | 1042 | ||
988 | switch_to_new_gdt(); | 1043 | switch_to_new_gdt(cpu); |
1044 | loadsegment(fs, 0); | ||
1045 | |||
989 | load_idt((const struct desc_ptr *)&idt_descr); | 1046 | load_idt((const struct desc_ptr *)&idt_descr); |
990 | 1047 | ||
991 | memset(me->thread.tls_array, 0, GDT_ENTRY_TLS_ENTRIES * 8); | 1048 | memset(me->thread.tls_array, 0, GDT_ENTRY_TLS_ENTRIES * 8); |
@@ -1043,22 +1100,19 @@ void __cpuinit cpu_init(void) | |||
1043 | */ | 1100 | */ |
1044 | if (kgdb_connected && arch_kgdb_ops.correct_hw_break) | 1101 | if (kgdb_connected && arch_kgdb_ops.correct_hw_break) |
1045 | arch_kgdb_ops.correct_hw_break(); | 1102 | arch_kgdb_ops.correct_hw_break(); |
1046 | else { | 1103 | else |
1047 | #endif | 1104 | #endif |
1048 | /* | 1105 | { |
1049 | * Clear all 6 debug registers: | 1106 | /* |
1050 | */ | 1107 | * Clear all 6 debug registers: |
1051 | 1108 | */ | |
1052 | set_debugreg(0UL, 0); | 1109 | set_debugreg(0UL, 0); |
1053 | set_debugreg(0UL, 1); | 1110 | set_debugreg(0UL, 1); |
1054 | set_debugreg(0UL, 2); | 1111 | set_debugreg(0UL, 2); |
1055 | set_debugreg(0UL, 3); | 1112 | set_debugreg(0UL, 3); |
1056 | set_debugreg(0UL, 6); | 1113 | set_debugreg(0UL, 6); |
1057 | set_debugreg(0UL, 7); | 1114 | set_debugreg(0UL, 7); |
1058 | #ifdef CONFIG_KGDB | ||
1059 | /* If the kgdb is connected no debug regs should be altered. */ | ||
1060 | } | 1115 | } |
1061 | #endif | ||
1062 | 1116 | ||
1063 | fpu_init(); | 1117 | fpu_init(); |
1064 | 1118 | ||
@@ -1088,7 +1142,7 @@ void __cpuinit cpu_init(void) | |||
1088 | clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE); | 1142 | clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE); |
1089 | 1143 | ||
1090 | load_idt(&idt_descr); | 1144 | load_idt(&idt_descr); |
1091 | switch_to_new_gdt(); | 1145 | switch_to_new_gdt(cpu); |
1092 | 1146 | ||
1093 | /* | 1147 | /* |
1094 | * Set up and load the per-CPU TSS and LDT | 1148 | * Set up and load the per-CPU TSS and LDT |
@@ -1109,9 +1163,6 @@ void __cpuinit cpu_init(void) | |||
1109 | __set_tss_desc(cpu, GDT_ENTRY_DOUBLEFAULT_TSS, &doublefault_tss); | 1163 | __set_tss_desc(cpu, GDT_ENTRY_DOUBLEFAULT_TSS, &doublefault_tss); |
1110 | #endif | 1164 | #endif |
1111 | 1165 | ||
1112 | /* Clear %gs. */ | ||
1113 | asm volatile ("mov %0, %%gs" : : "r" (0)); | ||
1114 | |||
1115 | /* Clear all 6 debug registers: */ | 1166 | /* Clear all 6 debug registers: */ |
1116 | set_debugreg(0, 0); | 1167 | set_debugreg(0, 0); |
1117 | set_debugreg(0, 1); | 1168 | set_debugreg(0, 1); |