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-rw-r--r--arch/x86/kernel/apic_64.c35
1 files changed, 35 insertions, 0 deletions
diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c
index 9bb040689b31..a969ef78e12a 100644
--- a/arch/x86/kernel/apic_64.c
+++ b/arch/x86/kernel/apic_64.c
@@ -171,6 +171,41 @@ struct apic_ops __read_mostly *apic_ops = &xapic_ops;
171 171
172EXPORT_SYMBOL_GPL(apic_ops); 172EXPORT_SYMBOL_GPL(apic_ops);
173 173
174static void x2apic_wait_icr_idle(void)
175{
176 /* no need to wait for icr idle in x2apic */
177 return;
178}
179
180static u32 safe_x2apic_wait_icr_idle(void)
181{
182 /* no need to wait for icr idle in x2apic */
183 return 0;
184}
185
186void x2apic_icr_write(u32 low, u32 id)
187{
188 wrmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), ((__u64) id) << 32 | low);
189}
190
191u64 x2apic_icr_read(void)
192{
193 unsigned long val;
194
195 rdmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), val);
196 return val;
197}
198
199static struct apic_ops x2apic_ops = {
200 .read = native_apic_msr_read,
201 .write = native_apic_msr_write,
202 .write_atomic = native_apic_msr_write,
203 .icr_read = x2apic_icr_read,
204 .icr_write = x2apic_icr_write,
205 .wait_icr_idle = x2apic_wait_icr_idle,
206 .safe_wait_icr_idle = safe_x2apic_wait_icr_idle,
207};
208
174/** 209/**
175 * enable_NMI_through_LVT0 - enable NMI through local vector table 0 210 * enable_NMI_through_LVT0 - enable NMI through local vector table 0
176 */ 211 */