diff options
Diffstat (limited to 'arch/x86/kernel/apic_32.c')
-rw-r--r-- | arch/x86/kernel/apic_32.c | 41 |
1 files changed, 37 insertions, 4 deletions
diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c index d6c898358371..f93c18f5b79d 100644 --- a/arch/x86/kernel/apic_32.c +++ b/arch/x86/kernel/apic_32.c | |||
@@ -145,13 +145,18 @@ static int modern_apic(void) | |||
145 | return lapic_get_version() >= 0x14; | 145 | return lapic_get_version() >= 0x14; |
146 | } | 146 | } |
147 | 147 | ||
148 | void apic_wait_icr_idle(void) | 148 | /* |
149 | * Paravirt kernels also might be using these below ops. So we still | ||
150 | * use generic apic_read()/apic_write(), which might be pointing to different | ||
151 | * ops in PARAVIRT case. | ||
152 | */ | ||
153 | void xapic_wait_icr_idle(void) | ||
149 | { | 154 | { |
150 | while (apic_read(APIC_ICR) & APIC_ICR_BUSY) | 155 | while (apic_read(APIC_ICR) & APIC_ICR_BUSY) |
151 | cpu_relax(); | 156 | cpu_relax(); |
152 | } | 157 | } |
153 | 158 | ||
154 | u32 safe_apic_wait_icr_idle(void) | 159 | u32 safe_xapic_wait_icr_idle(void) |
155 | { | 160 | { |
156 | u32 send_status; | 161 | u32 send_status; |
157 | int timeout; | 162 | int timeout; |
@@ -167,6 +172,34 @@ u32 safe_apic_wait_icr_idle(void) | |||
167 | return send_status; | 172 | return send_status; |
168 | } | 173 | } |
169 | 174 | ||
175 | void xapic_icr_write(u32 low, u32 id) | ||
176 | { | ||
177 | apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(id)); | ||
178 | apic_write(APIC_ICR, low); | ||
179 | } | ||
180 | |||
181 | u64 xapic_icr_read(void) | ||
182 | { | ||
183 | u32 icr1, icr2; | ||
184 | |||
185 | icr2 = apic_read(APIC_ICR2); | ||
186 | icr1 = apic_read(APIC_ICR); | ||
187 | |||
188 | return icr1 | ((u64)icr2 << 32); | ||
189 | } | ||
190 | |||
191 | static struct apic_ops xapic_ops = { | ||
192 | .read = native_apic_mem_read, | ||
193 | .write = native_apic_mem_write, | ||
194 | .icr_read = xapic_icr_read, | ||
195 | .icr_write = xapic_icr_write, | ||
196 | .wait_icr_idle = xapic_wait_icr_idle, | ||
197 | .safe_wait_icr_idle = safe_xapic_wait_icr_idle, | ||
198 | }; | ||
199 | |||
200 | struct apic_ops __read_mostly *apic_ops = &xapic_ops; | ||
201 | EXPORT_SYMBOL_GPL(apic_ops); | ||
202 | |||
170 | /** | 203 | /** |
171 | * enable_NMI_through_LVT0 - enable NMI through local vector table 0 | 204 | * enable_NMI_through_LVT0 - enable NMI through local vector table 0 |
172 | */ | 205 | */ |
@@ -1205,7 +1238,7 @@ void __init init_apic_mappings(void) | |||
1205 | * default configuration (or the MP table is broken). | 1238 | * default configuration (or the MP table is broken). |
1206 | */ | 1239 | */ |
1207 | if (boot_cpu_physical_apicid == -1U) | 1240 | if (boot_cpu_physical_apicid == -1U) |
1208 | boot_cpu_physical_apicid = GET_APIC_ID(read_apic_id()); | 1241 | boot_cpu_physical_apicid = read_apic_id(); |
1209 | 1242 | ||
1210 | } | 1243 | } |
1211 | 1244 | ||
@@ -1242,7 +1275,7 @@ int __init APIC_init_uniprocessor(void) | |||
1242 | * might be zero if read from MP tables. Get it from LAPIC. | 1275 | * might be zero if read from MP tables. Get it from LAPIC. |
1243 | */ | 1276 | */ |
1244 | #ifdef CONFIG_CRASH_DUMP | 1277 | #ifdef CONFIG_CRASH_DUMP |
1245 | boot_cpu_physical_apicid = GET_APIC_ID(read_apic_id()); | 1278 | boot_cpu_physical_apicid = read_apic_id(); |
1246 | #endif | 1279 | #endif |
1247 | physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map); | 1280 | physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map); |
1248 | 1281 | ||