diff options
Diffstat (limited to 'arch/x86/kernel/apic')
-rw-r--r-- | arch/x86/kernel/apic/apic.c | 31 | ||||
-rw-r--r-- | arch/x86/kernel/apic/io_apic.c | 4 | ||||
-rw-r--r-- | arch/x86/kernel/apic/probe_64.c | 15 | ||||
-rw-r--r-- | arch/x86/kernel/apic/x2apic_uv_x.c | 11 |
4 files changed, 34 insertions, 27 deletions
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c index 754174d09deb..894aa97f0717 100644 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c | |||
@@ -62,7 +62,7 @@ unsigned int boot_cpu_physical_apicid = -1U; | |||
62 | /* | 62 | /* |
63 | * The highest APIC ID seen during enumeration. | 63 | * The highest APIC ID seen during enumeration. |
64 | * | 64 | * |
65 | * This determines the messaging protocol we can use: if all APIC IDs | 65 | * On AMD, this determines the messaging protocol we can use: if all APIC IDs |
66 | * are in the 0 ... 7 range, then we can use logical addressing which | 66 | * are in the 0 ... 7 range, then we can use logical addressing which |
67 | * has some performance advantages (better broadcasting). | 67 | * has some performance advantages (better broadcasting). |
68 | * | 68 | * |
@@ -979,7 +979,7 @@ void lapic_shutdown(void) | |||
979 | { | 979 | { |
980 | unsigned long flags; | 980 | unsigned long flags; |
981 | 981 | ||
982 | if (!cpu_has_apic) | 982 | if (!cpu_has_apic && !apic_from_smp_config()) |
983 | return; | 983 | return; |
984 | 984 | ||
985 | local_irq_save(flags); | 985 | local_irq_save(flags); |
@@ -1197,8 +1197,7 @@ void __cpuinit setup_local_APIC(void) | |||
1197 | * Double-check whether this APIC is really registered. | 1197 | * Double-check whether this APIC is really registered. |
1198 | * This is meaningless in clustered apic mode, so we skip it. | 1198 | * This is meaningless in clustered apic mode, so we skip it. |
1199 | */ | 1199 | */ |
1200 | if (!apic->apic_id_registered()) | 1200 | BUG_ON(!apic->apic_id_registered()); |
1201 | BUG(); | ||
1202 | 1201 | ||
1203 | /* | 1202 | /* |
1204 | * Intel recommends to set DFR, LDR and TPR before enabling | 1203 | * Intel recommends to set DFR, LDR and TPR before enabling |
@@ -1917,24 +1916,14 @@ void __cpuinit generic_processor_info(int apicid, int version) | |||
1917 | max_physical_apicid = apicid; | 1916 | max_physical_apicid = apicid; |
1918 | 1917 | ||
1919 | #ifdef CONFIG_X86_32 | 1918 | #ifdef CONFIG_X86_32 |
1920 | /* | 1919 | switch (boot_cpu_data.x86_vendor) { |
1921 | * Would be preferable to switch to bigsmp when CONFIG_HOTPLUG_CPU=y | 1920 | case X86_VENDOR_INTEL: |
1922 | * but we need to work other dependencies like SMP_SUSPEND etc | 1921 | if (num_processors > 8) |
1923 | * before this can be done without some confusion. | 1922 | def_to_bigsmp = 1; |
1924 | * if (CPU_HOTPLUG_ENABLED || num_processors > 8) | 1923 | break; |
1925 | * - Ashok Raj <ashok.raj@intel.com> | 1924 | case X86_VENDOR_AMD: |
1926 | */ | 1925 | if (max_physical_apicid >= 8) |
1927 | if (max_physical_apicid >= 8) { | ||
1928 | switch (boot_cpu_data.x86_vendor) { | ||
1929 | case X86_VENDOR_INTEL: | ||
1930 | if (!APIC_XAPIC(version)) { | ||
1931 | def_to_bigsmp = 0; | ||
1932 | break; | ||
1933 | } | ||
1934 | /* If P4 and above fall through */ | ||
1935 | case X86_VENDOR_AMD: | ||
1936 | def_to_bigsmp = 1; | 1926 | def_to_bigsmp = 1; |
1937 | } | ||
1938 | } | 1927 | } |
1939 | #endif | 1928 | #endif |
1940 | 1929 | ||
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c index 809e1cf86d6b..64970b9885f2 100644 --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c | |||
@@ -1874,7 +1874,7 @@ __apicdebuginit(int) print_all_ICs(void) | |||
1874 | print_PIC(); | 1874 | print_PIC(); |
1875 | 1875 | ||
1876 | /* don't print out if apic is not there */ | 1876 | /* don't print out if apic is not there */ |
1877 | if (!cpu_has_apic || disable_apic) | 1877 | if (!cpu_has_apic && !apic_from_smp_config()) |
1878 | return 0; | 1878 | return 0; |
1879 | 1879 | ||
1880 | print_all_local_APICs(); | 1880 | print_all_local_APICs(); |
@@ -1999,7 +1999,7 @@ void disable_IO_APIC(void) | |||
1999 | /* | 1999 | /* |
2000 | * Use virtual wire A mode when interrupt remapping is enabled. | 2000 | * Use virtual wire A mode when interrupt remapping is enabled. |
2001 | */ | 2001 | */ |
2002 | if (cpu_has_apic) | 2002 | if (cpu_has_apic || apic_from_smp_config()) |
2003 | disconnect_bsp_APIC(!intr_remapping_enabled && | 2003 | disconnect_bsp_APIC(!intr_remapping_enabled && |
2004 | ioapic_i8259.pin != -1); | 2004 | ioapic_i8259.pin != -1); |
2005 | } | 2005 | } |
diff --git a/arch/x86/kernel/apic/probe_64.c b/arch/x86/kernel/apic/probe_64.c index 65edc180fc82..c4cbd3080c1c 100644 --- a/arch/x86/kernel/apic/probe_64.c +++ b/arch/x86/kernel/apic/probe_64.c | |||
@@ -64,16 +64,23 @@ void __init default_setup_apic_routing(void) | |||
64 | apic = &apic_x2apic_phys; | 64 | apic = &apic_x2apic_phys; |
65 | else | 65 | else |
66 | apic = &apic_x2apic_cluster; | 66 | apic = &apic_x2apic_cluster; |
67 | printk(KERN_INFO "Setting APIC routing to %s\n", apic->name); | ||
68 | } | 67 | } |
69 | #endif | 68 | #endif |
70 | 69 | ||
71 | if (apic == &apic_flat) { | 70 | if (apic == &apic_flat) { |
72 | if (max_physical_apicid >= 8) | 71 | switch (boot_cpu_data.x86_vendor) { |
73 | apic = &apic_physflat; | 72 | case X86_VENDOR_INTEL: |
74 | printk(KERN_INFO "Setting APIC routing to %s\n", apic->name); | 73 | if (num_processors > 8) |
74 | apic = &apic_physflat; | ||
75 | break; | ||
76 | case X86_VENDOR_AMD: | ||
77 | if (max_physical_apicid >= 8) | ||
78 | apic = &apic_physflat; | ||
79 | } | ||
75 | } | 80 | } |
76 | 81 | ||
82 | printk(KERN_INFO "Setting APIC routing to %s\n", apic->name); | ||
83 | |||
77 | if (is_vsmp_box()) { | 84 | if (is_vsmp_box()) { |
78 | /* need to update phys_pkg_id */ | 85 | /* need to update phys_pkg_id */ |
79 | apic->phys_pkg_id = apicid_phys_pkg_id; | 86 | apic->phys_pkg_id = apicid_phys_pkg_id; |
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c index 601159374e87..f5f5886a6b53 100644 --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c | |||
@@ -389,6 +389,16 @@ static __init void map_gru_high(int max_pnode) | |||
389 | map_high("GRU", gru.s.base, shift, max_pnode, map_wb); | 389 | map_high("GRU", gru.s.base, shift, max_pnode, map_wb); |
390 | } | 390 | } |
391 | 391 | ||
392 | static __init void map_mmr_high(int max_pnode) | ||
393 | { | ||
394 | union uvh_rh_gam_mmr_overlay_config_mmr_u mmr; | ||
395 | int shift = UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR_BASE_SHFT; | ||
396 | |||
397 | mmr.v = uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR); | ||
398 | if (mmr.s.enable) | ||
399 | map_high("MMR", mmr.s.base, shift, max_pnode, map_uc); | ||
400 | } | ||
401 | |||
392 | static __init void map_mmioh_high(int max_pnode) | 402 | static __init void map_mmioh_high(int max_pnode) |
393 | { | 403 | { |
394 | union uvh_rh_gam_mmioh_overlay_config_mmr_u mmioh; | 404 | union uvh_rh_gam_mmioh_overlay_config_mmr_u mmioh; |
@@ -643,6 +653,7 @@ void __init uv_system_init(void) | |||
643 | } | 653 | } |
644 | 654 | ||
645 | map_gru_high(max_pnode); | 655 | map_gru_high(max_pnode); |
656 | map_mmr_high(max_pnode); | ||
646 | map_mmioh_high(max_pnode); | 657 | map_mmioh_high(max_pnode); |
647 | 658 | ||
648 | uv_cpu_init(); | 659 | uv_cpu_init(); |