diff options
Diffstat (limited to 'arch/x86/kernel/apic')
-rw-r--r-- | arch/x86/kernel/apic/apic.c | 2 | ||||
-rw-r--r-- | arch/x86/kernel/apic/io_apic.c | 2 | ||||
-rw-r--r-- | arch/x86/kernel/apic/numaq_32.c | 2 | ||||
-rw-r--r-- | arch/x86/kernel/apic/x2apic_uv_x.c | 89 |
4 files changed, 84 insertions, 11 deletions
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c index dfca210f6a10..6e29b2a77aa8 100644 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c | |||
@@ -581,7 +581,7 @@ calibrate_by_pmtimer(long deltapm, long *delta, long *deltatsc) | |||
581 | res = (((u64)(*deltatsc)) * pm_100ms); | 581 | res = (((u64)(*deltatsc)) * pm_100ms); |
582 | do_div(res, deltapm); | 582 | do_div(res, deltapm); |
583 | apic_printk(APIC_VERBOSE, "TSC delta adjusted to " | 583 | apic_printk(APIC_VERBOSE, "TSC delta adjusted to " |
584 | "PM-Timer: %lu (%ld) \n", | 584 | "PM-Timer: %lu (%ld)\n", |
585 | (unsigned long)res, *deltatsc); | 585 | (unsigned long)res, *deltatsc); |
586 | *deltatsc = (long)res; | 586 | *deltatsc = (long)res; |
587 | } | 587 | } |
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c index 53243ca7816d..6bdd2c7ead75 100644 --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c | |||
@@ -1647,7 +1647,7 @@ __apicdebuginit(void) print_IO_APIC(void) | |||
1647 | printk(KERN_DEBUG ".... IRQ redirection table:\n"); | 1647 | printk(KERN_DEBUG ".... IRQ redirection table:\n"); |
1648 | 1648 | ||
1649 | printk(KERN_DEBUG " NR Dst Mask Trig IRR Pol" | 1649 | printk(KERN_DEBUG " NR Dst Mask Trig IRR Pol" |
1650 | " Stat Dmod Deli Vect: \n"); | 1650 | " Stat Dmod Deli Vect:\n"); |
1651 | 1651 | ||
1652 | for (i = 0; i <= reg_01.bits.entries; i++) { | 1652 | for (i = 0; i <= reg_01.bits.entries; i++) { |
1653 | struct IO_APIC_route_entry entry; | 1653 | struct IO_APIC_route_entry entry; |
diff --git a/arch/x86/kernel/apic/numaq_32.c b/arch/x86/kernel/apic/numaq_32.c index 98c4665f251c..47dd856708e5 100644 --- a/arch/x86/kernel/apic/numaq_32.c +++ b/arch/x86/kernel/apic/numaq_32.c | |||
@@ -225,7 +225,7 @@ static void __init smp_read_mpc_oem(struct mpc_table *mpc) | |||
225 | 225 | ||
226 | mpc_record = 0; | 226 | mpc_record = 0; |
227 | printk(KERN_INFO | 227 | printk(KERN_INFO |
228 | "Found an OEM MPC table at %8p - parsing it ... \n", oemtable); | 228 | "Found an OEM MPC table at %8p - parsing it...\n", oemtable); |
229 | 229 | ||
230 | if (memcmp(oemtable->signature, MPC_OEM_SIGNATURE, 4)) { | 230 | if (memcmp(oemtable->signature, MPC_OEM_SIGNATURE, 4)) { |
231 | printk(KERN_WARNING | 231 | printk(KERN_WARNING |
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c index 21db3cbea7dc..3740c8a4eae7 100644 --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * SGI UV APIC functions (note: not an Intel compatible APIC) | 6 | * SGI UV APIC functions (note: not an Intel compatible APIC) |
7 | * | 7 | * |
8 | * Copyright (C) 2007-2008 Silicon Graphics, Inc. All rights reserved. | 8 | * Copyright (C) 2007-2009 Silicon Graphics, Inc. All rights reserved. |
9 | */ | 9 | */ |
10 | #include <linux/cpumask.h> | 10 | #include <linux/cpumask.h> |
11 | #include <linux/hardirq.h> | 11 | #include <linux/hardirq.h> |
@@ -20,6 +20,8 @@ | |||
20 | #include <linux/cpu.h> | 20 | #include <linux/cpu.h> |
21 | #include <linux/init.h> | 21 | #include <linux/init.h> |
22 | #include <linux/io.h> | 22 | #include <linux/io.h> |
23 | #include <linux/pci.h> | ||
24 | #include <linux/kdebug.h> | ||
23 | 25 | ||
24 | #include <asm/uv/uv_mmrs.h> | 26 | #include <asm/uv/uv_mmrs.h> |
25 | #include <asm/uv/uv_hub.h> | 27 | #include <asm/uv/uv_hub.h> |
@@ -34,10 +36,13 @@ | |||
34 | 36 | ||
35 | DEFINE_PER_CPU(int, x2apic_extra_bits); | 37 | DEFINE_PER_CPU(int, x2apic_extra_bits); |
36 | 38 | ||
39 | #define PR_DEVEL(fmt, args...) pr_devel("%s: " fmt, __func__, args) | ||
40 | |||
37 | static enum uv_system_type uv_system_type; | 41 | static enum uv_system_type uv_system_type; |
38 | static u64 gru_start_paddr, gru_end_paddr; | 42 | static u64 gru_start_paddr, gru_end_paddr; |
39 | int uv_min_hub_revision_id; | 43 | int uv_min_hub_revision_id; |
40 | EXPORT_SYMBOL_GPL(uv_min_hub_revision_id); | 44 | EXPORT_SYMBOL_GPL(uv_min_hub_revision_id); |
45 | static DEFINE_SPINLOCK(uv_nmi_lock); | ||
41 | 46 | ||
42 | static inline bool is_GRU_range(u64 start, u64 end) | 47 | static inline bool is_GRU_range(u64 start, u64 end) |
43 | { | 48 | { |
@@ -71,6 +76,7 @@ static int __init uv_acpi_madt_oem_check(char *oem_id, char *oem_table_id) | |||
71 | if (!strcmp(oem_id, "SGI")) { | 76 | if (!strcmp(oem_id, "SGI")) { |
72 | nodeid = early_get_nodeid(); | 77 | nodeid = early_get_nodeid(); |
73 | x86_platform.is_untracked_pat_range = uv_is_untracked_pat_range; | 78 | x86_platform.is_untracked_pat_range = uv_is_untracked_pat_range; |
79 | x86_platform.nmi_init = uv_nmi_init; | ||
74 | if (!strcmp(oem_table_id, "UVL")) | 80 | if (!strcmp(oem_table_id, "UVL")) |
75 | uv_system_type = UV_LEGACY_APIC; | 81 | uv_system_type = UV_LEGACY_APIC; |
76 | else if (!strcmp(oem_table_id, "UVX")) | 82 | else if (!strcmp(oem_table_id, "UVX")) |
@@ -482,7 +488,7 @@ static void uv_heartbeat(unsigned long ignored) | |||
482 | 488 | ||
483 | static void __cpuinit uv_heartbeat_enable(int cpu) | 489 | static void __cpuinit uv_heartbeat_enable(int cpu) |
484 | { | 490 | { |
485 | if (!uv_cpu_hub_info(cpu)->scir.enabled) { | 491 | while (!uv_cpu_hub_info(cpu)->scir.enabled) { |
486 | struct timer_list *timer = &uv_cpu_hub_info(cpu)->scir.timer; | 492 | struct timer_list *timer = &uv_cpu_hub_info(cpu)->scir.timer; |
487 | 493 | ||
488 | uv_set_cpu_scir_bits(cpu, SCIR_CPU_HEARTBEAT|SCIR_CPU_ACTIVITY); | 494 | uv_set_cpu_scir_bits(cpu, SCIR_CPU_HEARTBEAT|SCIR_CPU_ACTIVITY); |
@@ -490,11 +496,10 @@ static void __cpuinit uv_heartbeat_enable(int cpu) | |||
490 | timer->expires = jiffies + SCIR_CPU_HB_INTERVAL; | 496 | timer->expires = jiffies + SCIR_CPU_HB_INTERVAL; |
491 | add_timer_on(timer, cpu); | 497 | add_timer_on(timer, cpu); |
492 | uv_cpu_hub_info(cpu)->scir.enabled = 1; | 498 | uv_cpu_hub_info(cpu)->scir.enabled = 1; |
493 | } | ||
494 | 499 | ||
495 | /* check boot cpu */ | 500 | /* also ensure that boot cpu is enabled */ |
496 | if (!uv_cpu_hub_info(0)->scir.enabled) | 501 | cpu = 0; |
497 | uv_heartbeat_enable(0); | 502 | } |
498 | } | 503 | } |
499 | 504 | ||
500 | #ifdef CONFIG_HOTPLUG_CPU | 505 | #ifdef CONFIG_HOTPLUG_CPU |
@@ -553,6 +558,30 @@ late_initcall(uv_init_heartbeat); | |||
553 | 558 | ||
554 | #endif /* !CONFIG_HOTPLUG_CPU */ | 559 | #endif /* !CONFIG_HOTPLUG_CPU */ |
555 | 560 | ||
561 | /* Direct Legacy VGA I/O traffic to designated IOH */ | ||
562 | int uv_set_vga_state(struct pci_dev *pdev, bool decode, | ||
563 | unsigned int command_bits, bool change_bridge) | ||
564 | { | ||
565 | int domain, bus, rc; | ||
566 | |||
567 | PR_DEVEL("devfn %x decode %d cmd %x chg_brdg %d\n", | ||
568 | pdev->devfn, decode, command_bits, change_bridge); | ||
569 | |||
570 | if (!change_bridge) | ||
571 | return 0; | ||
572 | |||
573 | if ((command_bits & PCI_COMMAND_IO) == 0) | ||
574 | return 0; | ||
575 | |||
576 | domain = pci_domain_nr(pdev->bus); | ||
577 | bus = pdev->bus->number; | ||
578 | |||
579 | rc = uv_bios_set_legacy_vga_target(decode, domain, bus); | ||
580 | PR_DEVEL("vga decode %d %x:%x, rc: %d\n", decode, domain, bus, rc); | ||
581 | |||
582 | return rc; | ||
583 | } | ||
584 | |||
556 | /* | 585 | /* |
557 | * Called on each cpu to initialize the per_cpu UV data area. | 586 | * Called on each cpu to initialize the per_cpu UV data area. |
558 | * FIXME: hotplug not supported yet | 587 | * FIXME: hotplug not supported yet |
@@ -569,6 +598,46 @@ void __cpuinit uv_cpu_init(void) | |||
569 | set_x2apic_extra_bits(uv_hub_info->pnode); | 598 | set_x2apic_extra_bits(uv_hub_info->pnode); |
570 | } | 599 | } |
571 | 600 | ||
601 | /* | ||
602 | * When NMI is received, print a stack trace. | ||
603 | */ | ||
604 | int uv_handle_nmi(struct notifier_block *self, unsigned long reason, void *data) | ||
605 | { | ||
606 | if (reason != DIE_NMI_IPI) | ||
607 | return NOTIFY_OK; | ||
608 | /* | ||
609 | * Use a lock so only one cpu prints at a time | ||
610 | * to prevent intermixed output. | ||
611 | */ | ||
612 | spin_lock(&uv_nmi_lock); | ||
613 | pr_info("NMI stack dump cpu %u:\n", smp_processor_id()); | ||
614 | dump_stack(); | ||
615 | spin_unlock(&uv_nmi_lock); | ||
616 | |||
617 | return NOTIFY_STOP; | ||
618 | } | ||
619 | |||
620 | static struct notifier_block uv_dump_stack_nmi_nb = { | ||
621 | .notifier_call = uv_handle_nmi | ||
622 | }; | ||
623 | |||
624 | void uv_register_nmi_notifier(void) | ||
625 | { | ||
626 | if (register_die_notifier(&uv_dump_stack_nmi_nb)) | ||
627 | printk(KERN_WARNING "UV NMI handler failed to register\n"); | ||
628 | } | ||
629 | |||
630 | void uv_nmi_init(void) | ||
631 | { | ||
632 | unsigned int value; | ||
633 | |||
634 | /* | ||
635 | * Unmask NMI on all cpus | ||
636 | */ | ||
637 | value = apic_read(APIC_LVT1) | APIC_DM_NMI; | ||
638 | value &= ~APIC_LVT_MASKED; | ||
639 | apic_write(APIC_LVT1, value); | ||
640 | } | ||
572 | 641 | ||
573 | void __init uv_system_init(void) | 642 | void __init uv_system_init(void) |
574 | { | 643 | { |
@@ -634,8 +703,8 @@ void __init uv_system_init(void) | |||
634 | } | 703 | } |
635 | 704 | ||
636 | uv_bios_init(); | 705 | uv_bios_init(); |
637 | uv_bios_get_sn_info(0, &uv_type, &sn_partition_id, | 706 | uv_bios_get_sn_info(0, &uv_type, &sn_partition_id, &sn_coherency_id, |
638 | &sn_coherency_id, &sn_region_size); | 707 | &sn_region_size, &system_serial_number); |
639 | uv_rtc_init(); | 708 | uv_rtc_init(); |
640 | 709 | ||
641 | for_each_present_cpu(cpu) { | 710 | for_each_present_cpu(cpu) { |
@@ -690,5 +759,9 @@ void __init uv_system_init(void) | |||
690 | 759 | ||
691 | uv_cpu_init(); | 760 | uv_cpu_init(); |
692 | uv_scir_register_cpu_notifier(); | 761 | uv_scir_register_cpu_notifier(); |
762 | uv_register_nmi_notifier(); | ||
693 | proc_mkdir("sgi_uv", NULL); | 763 | proc_mkdir("sgi_uv", NULL); |
764 | |||
765 | /* register Legacy VGA I/O redirection handler */ | ||
766 | pci_register_set_vga_state(uv_set_vga_state); | ||
694 | } | 767 | } |