diff options
Diffstat (limited to 'arch/x86/kernel/apic/nmi.c')
| -rw-r--r-- | arch/x86/kernel/apic/nmi.c | 565 |
1 files changed, 565 insertions, 0 deletions
diff --git a/arch/x86/kernel/apic/nmi.c b/arch/x86/kernel/apic/nmi.c new file mode 100644 index 000000000000..d6bd62407152 --- /dev/null +++ b/arch/x86/kernel/apic/nmi.c | |||
| @@ -0,0 +1,565 @@ | |||
| 1 | /* | ||
| 2 | * NMI watchdog support on APIC systems | ||
| 3 | * | ||
| 4 | * Started by Ingo Molnar <mingo@redhat.com> | ||
| 5 | * | ||
| 6 | * Fixes: | ||
| 7 | * Mikael Pettersson : AMD K7 support for local APIC NMI watchdog. | ||
| 8 | * Mikael Pettersson : Power Management for local APIC NMI watchdog. | ||
| 9 | * Mikael Pettersson : Pentium 4 support for local APIC NMI watchdog. | ||
| 10 | * Pavel Machek and | ||
| 11 | * Mikael Pettersson : PM converted to driver model. Disable/enable API. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <asm/apic.h> | ||
| 15 | |||
| 16 | #include <linux/nmi.h> | ||
| 17 | #include <linux/mm.h> | ||
| 18 | #include <linux/delay.h> | ||
| 19 | #include <linux/interrupt.h> | ||
| 20 | #include <linux/module.h> | ||
| 21 | #include <linux/sysdev.h> | ||
| 22 | #include <linux/sysctl.h> | ||
| 23 | #include <linux/percpu.h> | ||
| 24 | #include <linux/kprobes.h> | ||
| 25 | #include <linux/cpumask.h> | ||
| 26 | #include <linux/kernel_stat.h> | ||
| 27 | #include <linux/kdebug.h> | ||
| 28 | #include <linux/smp.h> | ||
| 29 | |||
| 30 | #include <asm/i8259.h> | ||
| 31 | #include <asm/io_apic.h> | ||
| 32 | #include <asm/proto.h> | ||
| 33 | #include <asm/timer.h> | ||
| 34 | |||
| 35 | #include <asm/mce.h> | ||
| 36 | |||
| 37 | #include <asm/mach_traps.h> | ||
| 38 | |||
| 39 | int unknown_nmi_panic; | ||
| 40 | int nmi_watchdog_enabled; | ||
| 41 | |||
| 42 | static cpumask_var_t backtrace_mask; | ||
| 43 | |||
| 44 | /* nmi_active: | ||
| 45 | * >0: the lapic NMI watchdog is active, but can be disabled | ||
| 46 | * <0: the lapic NMI watchdog has not been set up, and cannot | ||
| 47 | * be enabled | ||
| 48 | * 0: the lapic NMI watchdog is disabled, but can be enabled | ||
| 49 | */ | ||
| 50 | atomic_t nmi_active = ATOMIC_INIT(0); /* oprofile uses this */ | ||
| 51 | EXPORT_SYMBOL(nmi_active); | ||
| 52 | |||
| 53 | unsigned int nmi_watchdog = NMI_NONE; | ||
| 54 | EXPORT_SYMBOL(nmi_watchdog); | ||
| 55 | |||
| 56 | static int panic_on_timeout; | ||
| 57 | |||
| 58 | static unsigned int nmi_hz = HZ; | ||
| 59 | static DEFINE_PER_CPU(short, wd_enabled); | ||
| 60 | static int endflag __initdata; | ||
| 61 | |||
| 62 | static inline unsigned int get_nmi_count(int cpu) | ||
| 63 | { | ||
| 64 | return per_cpu(irq_stat, cpu).__nmi_count; | ||
| 65 | } | ||
| 66 | |||
| 67 | static inline int mce_in_progress(void) | ||
| 68 | { | ||
| 69 | #if defined(CONFIG_X86_64) && defined(CONFIG_X86_MCE) | ||
| 70 | return atomic_read(&mce_entry) > 0; | ||
| 71 | #endif | ||
| 72 | return 0; | ||
| 73 | } | ||
| 74 | |||
| 75 | /* | ||
| 76 | * Take the local apic timer and PIT/HPET into account. We don't | ||
| 77 | * know which one is active, when we have highres/dyntick on | ||
| 78 | */ | ||
| 79 | static inline unsigned int get_timer_irqs(int cpu) | ||
| 80 | { | ||
| 81 | return per_cpu(irq_stat, cpu).apic_timer_irqs + | ||
| 82 | per_cpu(irq_stat, cpu).irq0_irqs; | ||
| 83 | } | ||
| 84 | |||
| 85 | #ifdef CONFIG_SMP | ||
| 86 | /* | ||
| 87 | * The performance counters used by NMI_LOCAL_APIC don't trigger when | ||
| 88 | * the CPU is idle. To make sure the NMI watchdog really ticks on all | ||
| 89 | * CPUs during the test make them busy. | ||
| 90 | */ | ||
| 91 | static __init void nmi_cpu_busy(void *data) | ||
| 92 | { | ||
| 93 | local_irq_enable_in_hardirq(); | ||
| 94 | /* | ||
| 95 | * Intentionally don't use cpu_relax here. This is | ||
| 96 | * to make sure that the performance counter really ticks, | ||
| 97 | * even if there is a simulator or similar that catches the | ||
| 98 | * pause instruction. On a real HT machine this is fine because | ||
| 99 | * all other CPUs are busy with "useless" delay loops and don't | ||
| 100 | * care if they get somewhat less cycles. | ||
| 101 | */ | ||
| 102 | while (endflag == 0) | ||
| 103 | mb(); | ||
| 104 | } | ||
| 105 | #endif | ||
| 106 | |||
| 107 | static void report_broken_nmi(int cpu, int *prev_nmi_count) | ||
| 108 | { | ||
| 109 | printk(KERN_CONT "\n"); | ||
| 110 | |||
| 111 | printk(KERN_WARNING | ||
| 112 | "WARNING: CPU#%d: NMI appears to be stuck (%d->%d)!\n", | ||
| 113 | cpu, prev_nmi_count[cpu], get_nmi_count(cpu)); | ||
| 114 | |||
| 115 | printk(KERN_WARNING | ||
| 116 | "Please report this to bugzilla.kernel.org,\n"); | ||
| 117 | printk(KERN_WARNING | ||
| 118 | "and attach the output of the 'dmesg' command.\n"); | ||
| 119 | |||
| 120 | per_cpu(wd_enabled, cpu) = 0; | ||
| 121 | atomic_dec(&nmi_active); | ||
| 122 | } | ||
| 123 | |||
| 124 | static void __acpi_nmi_disable(void *__unused) | ||
| 125 | { | ||
| 126 | apic_write(APIC_LVT0, APIC_DM_NMI | APIC_LVT_MASKED); | ||
| 127 | } | ||
| 128 | |||
| 129 | int __init check_nmi_watchdog(void) | ||
| 130 | { | ||
| 131 | unsigned int *prev_nmi_count; | ||
| 132 | int cpu; | ||
| 133 | |||
| 134 | if (!nmi_watchdog_active() || !atomic_read(&nmi_active)) | ||
| 135 | return 0; | ||
| 136 | |||
| 137 | prev_nmi_count = kmalloc(nr_cpu_ids * sizeof(int), GFP_KERNEL); | ||
| 138 | if (!prev_nmi_count) | ||
| 139 | goto error; | ||
| 140 | |||
| 141 | alloc_cpumask_var(&backtrace_mask, GFP_KERNEL); | ||
| 142 | printk(KERN_INFO "Testing NMI watchdog ... "); | ||
| 143 | |||
| 144 | #ifdef CONFIG_SMP | ||
| 145 | if (nmi_watchdog == NMI_LOCAL_APIC) | ||
| 146 | smp_call_function(nmi_cpu_busy, (void *)&endflag, 0); | ||
| 147 | #endif | ||
| 148 | |||
| 149 | for_each_possible_cpu(cpu) | ||
| 150 | prev_nmi_count[cpu] = get_nmi_count(cpu); | ||
| 151 | local_irq_enable(); | ||
| 152 | mdelay((20 * 1000) / nmi_hz); /* wait 20 ticks */ | ||
| 153 | |||
| 154 | for_each_online_cpu(cpu) { | ||
| 155 | if (!per_cpu(wd_enabled, cpu)) | ||
| 156 | continue; | ||
| 157 | if (get_nmi_count(cpu) - prev_nmi_count[cpu] <= 5) | ||
| 158 | report_broken_nmi(cpu, prev_nmi_count); | ||
| 159 | } | ||
| 160 | endflag = 1; | ||
| 161 | if (!atomic_read(&nmi_active)) { | ||
| 162 | kfree(prev_nmi_count); | ||
| 163 | atomic_set(&nmi_active, -1); | ||
| 164 | goto error; | ||
| 165 | } | ||
| 166 | printk("OK.\n"); | ||
| 167 | |||
| 168 | /* | ||
| 169 | * now that we know it works we can reduce NMI frequency to | ||
| 170 | * something more reasonable; makes a difference in some configs | ||
| 171 | */ | ||
| 172 | if (nmi_watchdog == NMI_LOCAL_APIC) | ||
| 173 | nmi_hz = lapic_adjust_nmi_hz(1); | ||
| 174 | |||
| 175 | kfree(prev_nmi_count); | ||
| 176 | return 0; | ||
| 177 | error: | ||
| 178 | if (nmi_watchdog == NMI_IO_APIC) { | ||
| 179 | if (!timer_through_8259) | ||
| 180 | disable_8259A_irq(0); | ||
| 181 | on_each_cpu(__acpi_nmi_disable, NULL, 1); | ||
| 182 | } | ||
| 183 | |||
| 184 | #ifdef CONFIG_X86_32 | ||
| 185 | timer_ack = 0; | ||
| 186 | #endif | ||
| 187 | return -1; | ||
| 188 | } | ||
| 189 | |||
| 190 | static int __init setup_nmi_watchdog(char *str) | ||
| 191 | { | ||
| 192 | unsigned int nmi; | ||
| 193 | |||
| 194 | if (!strncmp(str, "panic", 5)) { | ||
| 195 | panic_on_timeout = 1; | ||
| 196 | str = strchr(str, ','); | ||
| 197 | if (!str) | ||
| 198 | return 1; | ||
| 199 | ++str; | ||
| 200 | } | ||
| 201 | |||
| 202 | if (!strncmp(str, "lapic", 5)) | ||
| 203 | nmi_watchdog = NMI_LOCAL_APIC; | ||
| 204 | else if (!strncmp(str, "ioapic", 6)) | ||
| 205 | nmi_watchdog = NMI_IO_APIC; | ||
| 206 | else { | ||
| 207 | get_option(&str, &nmi); | ||
| 208 | if (nmi >= NMI_INVALID) | ||
| 209 | return 0; | ||
| 210 | nmi_watchdog = nmi; | ||
| 211 | } | ||
| 212 | |||
| 213 | return 1; | ||
| 214 | } | ||
| 215 | __setup("nmi_watchdog=", setup_nmi_watchdog); | ||
| 216 | |||
| 217 | /* | ||
| 218 | * Suspend/resume support | ||
| 219 | */ | ||
| 220 | #ifdef CONFIG_PM | ||
| 221 | |||
| 222 | static int nmi_pm_active; /* nmi_active before suspend */ | ||
| 223 | |||
| 224 | static int lapic_nmi_suspend(struct sys_device *dev, pm_message_t state) | ||
| 225 | { | ||
| 226 | /* only CPU0 goes here, other CPUs should be offline */ | ||
| 227 | nmi_pm_active = atomic_read(&nmi_active); | ||
| 228 | stop_apic_nmi_watchdog(NULL); | ||
| 229 | BUG_ON(atomic_read(&nmi_active) != 0); | ||
| 230 | return 0; | ||
| 231 | } | ||
| 232 | |||
| 233 | static int lapic_nmi_resume(struct sys_device *dev) | ||
| 234 | { | ||
| 235 | /* only CPU0 goes here, other CPUs should be offline */ | ||
| 236 | if (nmi_pm_active > 0) { | ||
| 237 | setup_apic_nmi_watchdog(NULL); | ||
| 238 | touch_nmi_watchdog(); | ||
| 239 | } | ||
| 240 | return 0; | ||
| 241 | } | ||
| 242 | |||
| 243 | static struct sysdev_class nmi_sysclass = { | ||
| 244 | .name = "lapic_nmi", | ||
| 245 | .resume = lapic_nmi_resume, | ||
| 246 | .suspend = lapic_nmi_suspend, | ||
| 247 | }; | ||
| 248 | |||
| 249 | static struct sys_device device_lapic_nmi = { | ||
| 250 | .id = 0, | ||
| 251 | .cls = &nmi_sysclass, | ||
| 252 | }; | ||
| 253 | |||
| 254 | static int __init init_lapic_nmi_sysfs(void) | ||
| 255 | { | ||
| 256 | int error; | ||
| 257 | |||
| 258 | /* | ||
| 259 | * should really be a BUG_ON but b/c this is an | ||
| 260 | * init call, it just doesn't work. -dcz | ||
| 261 | */ | ||
| 262 | if (nmi_watchdog != NMI_LOCAL_APIC) | ||
| 263 | return 0; | ||
| 264 | |||
| 265 | if (atomic_read(&nmi_active) < 0) | ||
| 266 | return 0; | ||
| 267 | |||
| 268 | error = sysdev_class_register(&nmi_sysclass); | ||
| 269 | if (!error) | ||
| 270 | error = sysdev_register(&device_lapic_nmi); | ||
| 271 | return error; | ||
| 272 | } | ||
| 273 | |||
| 274 | /* must come after the local APIC's device_initcall() */ | ||
| 275 | late_initcall(init_lapic_nmi_sysfs); | ||
| 276 | |||
| 277 | #endif /* CONFIG_PM */ | ||
| 278 | |||
| 279 | static void __acpi_nmi_enable(void *__unused) | ||
| 280 | { | ||
| 281 | apic_write(APIC_LVT0, APIC_DM_NMI); | ||
| 282 | } | ||
| 283 | |||
| 284 | /* | ||
| 285 | * Enable timer based NMIs on all CPUs: | ||
| 286 | */ | ||
| 287 | void acpi_nmi_enable(void) | ||
| 288 | { | ||
| 289 | if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC) | ||
| 290 | on_each_cpu(__acpi_nmi_enable, NULL, 1); | ||
| 291 | } | ||
| 292 | |||
| 293 | /* | ||
| 294 | * Disable timer based NMIs on all CPUs: | ||
| 295 | */ | ||
| 296 | void acpi_nmi_disable(void) | ||
| 297 | { | ||
| 298 | if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC) | ||
| 299 | on_each_cpu(__acpi_nmi_disable, NULL, 1); | ||
| 300 | } | ||
| 301 | |||
| 302 | /* | ||
| 303 | * This function is called as soon the LAPIC NMI watchdog driver has everything | ||
| 304 | * in place and it's ready to check if the NMIs belong to the NMI watchdog | ||
| 305 | */ | ||
| 306 | void cpu_nmi_set_wd_enabled(void) | ||
| 307 | { | ||
| 308 | __get_cpu_var(wd_enabled) = 1; | ||
| 309 | } | ||
| 310 | |||
| 311 | void setup_apic_nmi_watchdog(void *unused) | ||
| 312 | { | ||
| 313 | if (__get_cpu_var(wd_enabled)) | ||
| 314 | return; | ||
| 315 | |||
| 316 | /* cheap hack to support suspend/resume */ | ||
| 317 | /* if cpu0 is not active neither should the other cpus */ | ||
| 318 | if (smp_processor_id() != 0 && atomic_read(&nmi_active) <= 0) | ||
| 319 | return; | ||
| 320 | |||
| 321 | switch (nmi_watchdog) { | ||
| 322 | case NMI_LOCAL_APIC: | ||
| 323 | if (lapic_watchdog_init(nmi_hz) < 0) { | ||
| 324 | __get_cpu_var(wd_enabled) = 0; | ||
| 325 | return; | ||
| 326 | } | ||
| 327 | /* FALL THROUGH */ | ||
| 328 | case NMI_IO_APIC: | ||
| 329 | __get_cpu_var(wd_enabled) = 1; | ||
| 330 | atomic_inc(&nmi_active); | ||
| 331 | } | ||
| 332 | } | ||
| 333 | |||
| 334 | void stop_apic_nmi_watchdog(void *unused) | ||
| 335 | { | ||
| 336 | /* only support LOCAL and IO APICs for now */ | ||
| 337 | if (!nmi_watchdog_active()) | ||
| 338 | return; | ||
| 339 | if (__get_cpu_var(wd_enabled) == 0) | ||
| 340 | return; | ||
| 341 | if (nmi_watchdog == NMI_LOCAL_APIC) | ||
| 342 | lapic_watchdog_stop(); | ||
| 343 | else | ||
| 344 | __acpi_nmi_disable(NULL); | ||
| 345 | __get_cpu_var(wd_enabled) = 0; | ||
| 346 | atomic_dec(&nmi_active); | ||
| 347 | } | ||
| 348 | |||
| 349 | /* | ||
| 350 | * the best way to detect whether a CPU has a 'hard lockup' problem | ||
| 351 | * is to check it's local APIC timer IRQ counts. If they are not | ||
| 352 | * changing then that CPU has some problem. | ||
| 353 | * | ||
| 354 | * as these watchdog NMI IRQs are generated on every CPU, we only | ||
| 355 | * have to check the current processor. | ||
| 356 | * | ||
| 357 | * since NMIs don't listen to _any_ locks, we have to be extremely | ||
| 358 | * careful not to rely on unsafe variables. The printk might lock | ||
| 359 | * up though, so we have to break up any console locks first ... | ||
| 360 | * [when there will be more tty-related locks, break them up here too!] | ||
| 361 | */ | ||
| 362 | |||
| 363 | static DEFINE_PER_CPU(unsigned, last_irq_sum); | ||
| 364 | static DEFINE_PER_CPU(local_t, alert_counter); | ||
| 365 | static DEFINE_PER_CPU(int, nmi_touch); | ||
| 366 | |||
| 367 | void touch_nmi_watchdog(void) | ||
| 368 | { | ||
| 369 | if (nmi_watchdog_active()) { | ||
| 370 | unsigned cpu; | ||
| 371 | |||
| 372 | /* | ||
| 373 | * Tell other CPUs to reset their alert counters. We cannot | ||
| 374 | * do it ourselves because the alert count increase is not | ||
| 375 | * atomic. | ||
| 376 | */ | ||
| 377 | for_each_present_cpu(cpu) { | ||
| 378 | if (per_cpu(nmi_touch, cpu) != 1) | ||
| 379 | per_cpu(nmi_touch, cpu) = 1; | ||
| 380 | } | ||
| 381 | } | ||
| 382 | |||
| 383 | /* | ||
| 384 | * Tickle the softlockup detector too: | ||
| 385 | */ | ||
| 386 | touch_softlockup_watchdog(); | ||
| 387 | } | ||
| 388 | EXPORT_SYMBOL(touch_nmi_watchdog); | ||
| 389 | |||
| 390 | notrace __kprobes int | ||
| 391 | nmi_watchdog_tick(struct pt_regs *regs, unsigned reason) | ||
| 392 | { | ||
| 393 | /* | ||
| 394 | * Since current_thread_info()-> is always on the stack, and we | ||
| 395 | * always switch the stack NMI-atomically, it's safe to use | ||
| 396 | * smp_processor_id(). | ||
| 397 | */ | ||
| 398 | unsigned int sum; | ||
| 399 | int touched = 0; | ||
| 400 | int cpu = smp_processor_id(); | ||
| 401 | int rc = 0; | ||
| 402 | |||
| 403 | /* check for other users first */ | ||
| 404 | if (notify_die(DIE_NMI, "nmi", regs, reason, 2, SIGINT) | ||
| 405 | == NOTIFY_STOP) { | ||
| 406 | rc = 1; | ||
| 407 | touched = 1; | ||
| 408 | } | ||
| 409 | |||
| 410 | sum = get_timer_irqs(cpu); | ||
| 411 | |||
| 412 | if (__get_cpu_var(nmi_touch)) { | ||
| 413 | __get_cpu_var(nmi_touch) = 0; | ||
| 414 | touched = 1; | ||
| 415 | } | ||
| 416 | |||
| 417 | if (cpumask_test_cpu(cpu, backtrace_mask)) { | ||
| 418 | static DEFINE_SPINLOCK(lock); /* Serialise the printks */ | ||
| 419 | |||
| 420 | spin_lock(&lock); | ||
| 421 | printk(KERN_WARNING "NMI backtrace for cpu %d\n", cpu); | ||
| 422 | dump_stack(); | ||
| 423 | spin_unlock(&lock); | ||
| 424 | cpumask_clear_cpu(cpu, backtrace_mask); | ||
| 425 | } | ||
| 426 | |||
| 427 | /* Could check oops_in_progress here too, but it's safer not to */ | ||
| 428 | if (mce_in_progress()) | ||
| 429 | touched = 1; | ||
| 430 | |||
| 431 | /* if the none of the timers isn't firing, this cpu isn't doing much */ | ||
| 432 | if (!touched && __get_cpu_var(last_irq_sum) == sum) { | ||
| 433 | /* | ||
| 434 | * Ayiee, looks like this CPU is stuck ... | ||
| 435 | * wait a few IRQs (5 seconds) before doing the oops ... | ||
| 436 | */ | ||
| 437 | local_inc(&__get_cpu_var(alert_counter)); | ||
| 438 | if (local_read(&__get_cpu_var(alert_counter)) == 5 * nmi_hz) | ||
| 439 | /* | ||
| 440 | * die_nmi will return ONLY if NOTIFY_STOP happens.. | ||
| 441 | */ | ||
| 442 | die_nmi("BUG: NMI Watchdog detected LOCKUP", | ||
| 443 | regs, panic_on_timeout); | ||
| 444 | } else { | ||
| 445 | __get_cpu_var(last_irq_sum) = sum; | ||
| 446 | local_set(&__get_cpu_var(alert_counter), 0); | ||
| 447 | } | ||
| 448 | |||
| 449 | /* see if the nmi watchdog went off */ | ||
| 450 | if (!__get_cpu_var(wd_enabled)) | ||
| 451 | return rc; | ||
| 452 | switch (nmi_watchdog) { | ||
| 453 | case NMI_LOCAL_APIC: | ||
| 454 | rc |= lapic_wd_event(nmi_hz); | ||
| 455 | break; | ||
| 456 | case NMI_IO_APIC: | ||
| 457 | /* | ||
| 458 | * don't know how to accurately check for this. | ||
| 459 | * just assume it was a watchdog timer interrupt | ||
| 460 | * This matches the old behaviour. | ||
| 461 | */ | ||
| 462 | rc = 1; | ||
| 463 | break; | ||
| 464 | } | ||
| 465 | return rc; | ||
| 466 | } | ||
| 467 | |||
| 468 | #ifdef CONFIG_SYSCTL | ||
| 469 | |||
| 470 | static void enable_ioapic_nmi_watchdog_single(void *unused) | ||
| 471 | { | ||
| 472 | __get_cpu_var(wd_enabled) = 1; | ||
| 473 | atomic_inc(&nmi_active); | ||
| 474 | __acpi_nmi_enable(NULL); | ||
| 475 | } | ||
| 476 | |||
| 477 | static void enable_ioapic_nmi_watchdog(void) | ||
| 478 | { | ||
| 479 | on_each_cpu(enable_ioapic_nmi_watchdog_single, NULL, 1); | ||
| 480 | touch_nmi_watchdog(); | ||
| 481 | } | ||
| 482 | |||
| 483 | static void disable_ioapic_nmi_watchdog(void) | ||
| 484 | { | ||
| 485 | on_each_cpu(stop_apic_nmi_watchdog, NULL, 1); | ||
| 486 | } | ||
| 487 | |||
| 488 | static int __init setup_unknown_nmi_panic(char *str) | ||
| 489 | { | ||
| 490 | unknown_nmi_panic = 1; | ||
| 491 | return 1; | ||
| 492 | } | ||
| 493 | __setup("unknown_nmi_panic", setup_unknown_nmi_panic); | ||
| 494 | |||
| 495 | static int unknown_nmi_panic_callback(struct pt_regs *regs, int cpu) | ||
| 496 | { | ||
| 497 | unsigned char reason = get_nmi_reason(); | ||
| 498 | char buf[64]; | ||
| 499 | |||
| 500 | sprintf(buf, "NMI received for unknown reason %02x\n", reason); | ||
| 501 | die_nmi(buf, regs, 1); /* Always panic here */ | ||
| 502 | return 0; | ||
| 503 | } | ||
| 504 | |||
| 505 | /* | ||
| 506 | * proc handler for /proc/sys/kernel/nmi | ||
| 507 | */ | ||
| 508 | int proc_nmi_enabled(struct ctl_table *table, int write, struct file *file, | ||
| 509 | void __user *buffer, size_t *length, loff_t *ppos) | ||
| 510 | { | ||
| 511 | int old_state; | ||
| 512 | |||
| 513 | nmi_watchdog_enabled = (atomic_read(&nmi_active) > 0) ? 1 : 0; | ||
| 514 | old_state = nmi_watchdog_enabled; | ||
| 515 | proc_dointvec(table, write, file, buffer, length, ppos); | ||
| 516 | if (!!old_state == !!nmi_watchdog_enabled) | ||
| 517 | return 0; | ||
| 518 | |||
| 519 | if (atomic_read(&nmi_active) < 0 || !nmi_watchdog_active()) { | ||
| 520 | printk(KERN_WARNING | ||
| 521 | "NMI watchdog is permanently disabled\n"); | ||
| 522 | return -EIO; | ||
| 523 | } | ||
| 524 | |||
| 525 | if (nmi_watchdog == NMI_LOCAL_APIC) { | ||
| 526 | if (nmi_watchdog_enabled) | ||
| 527 | enable_lapic_nmi_watchdog(); | ||
| 528 | else | ||
| 529 | disable_lapic_nmi_watchdog(); | ||
| 530 | } else if (nmi_watchdog == NMI_IO_APIC) { | ||
| 531 | if (nmi_watchdog_enabled) | ||
| 532 | enable_ioapic_nmi_watchdog(); | ||
| 533 | else | ||
| 534 | disable_ioapic_nmi_watchdog(); | ||
| 535 | } else { | ||
| 536 | printk(KERN_WARNING | ||
| 537 | "NMI watchdog doesn't know what hardware to touch\n"); | ||
| 538 | return -EIO; | ||
| 539 | } | ||
| 540 | return 0; | ||
| 541 | } | ||
| 542 | |||
| 543 | #endif /* CONFIG_SYSCTL */ | ||
| 544 | |||
| 545 | int do_nmi_callback(struct pt_regs *regs, int cpu) | ||
| 546 | { | ||
| 547 | #ifdef CONFIG_SYSCTL | ||
| 548 | if (unknown_nmi_panic) | ||
| 549 | return unknown_nmi_panic_callback(regs, cpu); | ||
| 550 | #endif | ||
| 551 | return 0; | ||
| 552 | } | ||
| 553 | |||
| 554 | void __trigger_all_cpu_backtrace(void) | ||
| 555 | { | ||
| 556 | int i; | ||
| 557 | |||
| 558 | cpumask_copy(backtrace_mask, cpu_online_mask); | ||
| 559 | /* Wait for up to 10 seconds for all CPUs to do the backtrace */ | ||
| 560 | for (i = 0; i < 10 * 1000; i++) { | ||
| 561 | if (cpumask_empty(backtrace_mask)) | ||
| 562 | break; | ||
| 563 | mdelay(1); | ||
| 564 | } | ||
| 565 | } | ||
