diff options
Diffstat (limited to 'arch/x86/kernel/apic/apic.c')
-rw-r--r-- | arch/x86/kernel/apic/apic.c | 40 |
1 files changed, 15 insertions, 25 deletions
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c index 159740decc41..894aa97f0717 100644 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c | |||
@@ -14,7 +14,7 @@ | |||
14 | * Mikael Pettersson : PM converted to driver model. | 14 | * Mikael Pettersson : PM converted to driver model. |
15 | */ | 15 | */ |
16 | 16 | ||
17 | #include <linux/perf_counter.h> | 17 | #include <linux/perf_event.h> |
18 | #include <linux/kernel_stat.h> | 18 | #include <linux/kernel_stat.h> |
19 | #include <linux/mc146818rtc.h> | 19 | #include <linux/mc146818rtc.h> |
20 | #include <linux/acpi_pmtmr.h> | 20 | #include <linux/acpi_pmtmr.h> |
@@ -35,7 +35,8 @@ | |||
35 | #include <linux/smp.h> | 35 | #include <linux/smp.h> |
36 | #include <linux/mm.h> | 36 | #include <linux/mm.h> |
37 | 37 | ||
38 | #include <asm/perf_counter.h> | 38 | #include <asm/perf_event.h> |
39 | #include <asm/x86_init.h> | ||
39 | #include <asm/pgalloc.h> | 40 | #include <asm/pgalloc.h> |
40 | #include <asm/atomic.h> | 41 | #include <asm/atomic.h> |
41 | #include <asm/mpspec.h> | 42 | #include <asm/mpspec.h> |
@@ -61,7 +62,7 @@ unsigned int boot_cpu_physical_apicid = -1U; | |||
61 | /* | 62 | /* |
62 | * The highest APIC ID seen during enumeration. | 63 | * The highest APIC ID seen during enumeration. |
63 | * | 64 | * |
64 | * This determines the messaging protocol we can use: if all APIC IDs | 65 | * On AMD, this determines the messaging protocol we can use: if all APIC IDs |
65 | * are in the 0 ... 7 range, then we can use logical addressing which | 66 | * are in the 0 ... 7 range, then we can use logical addressing which |
66 | * has some performance advantages (better broadcasting). | 67 | * has some performance advantages (better broadcasting). |
67 | * | 68 | * |
@@ -978,7 +979,7 @@ void lapic_shutdown(void) | |||
978 | { | 979 | { |
979 | unsigned long flags; | 980 | unsigned long flags; |
980 | 981 | ||
981 | if (!cpu_has_apic) | 982 | if (!cpu_has_apic && !apic_from_smp_config()) |
982 | return; | 983 | return; |
983 | 984 | ||
984 | local_irq_save(flags); | 985 | local_irq_save(flags); |
@@ -1188,7 +1189,7 @@ void __cpuinit setup_local_APIC(void) | |||
1188 | apic_write(APIC_ESR, 0); | 1189 | apic_write(APIC_ESR, 0); |
1189 | } | 1190 | } |
1190 | #endif | 1191 | #endif |
1191 | perf_counters_lapic_init(); | 1192 | perf_events_lapic_init(); |
1192 | 1193 | ||
1193 | preempt_disable(); | 1194 | preempt_disable(); |
1194 | 1195 | ||
@@ -1196,8 +1197,7 @@ void __cpuinit setup_local_APIC(void) | |||
1196 | * Double-check whether this APIC is really registered. | 1197 | * Double-check whether this APIC is really registered. |
1197 | * This is meaningless in clustered apic mode, so we skip it. | 1198 | * This is meaningless in clustered apic mode, so we skip it. |
1198 | */ | 1199 | */ |
1199 | if (!apic->apic_id_registered()) | 1200 | BUG_ON(!apic->apic_id_registered()); |
1200 | BUG(); | ||
1201 | 1201 | ||
1202 | /* | 1202 | /* |
1203 | * Intel recommends to set DFR, LDR and TPR before enabling | 1203 | * Intel recommends to set DFR, LDR and TPR before enabling |
@@ -1709,7 +1709,7 @@ int __init APIC_init_uniprocessor(void) | |||
1709 | localise_nmi_watchdog(); | 1709 | localise_nmi_watchdog(); |
1710 | #endif | 1710 | #endif |
1711 | 1711 | ||
1712 | setup_boot_clock(); | 1712 | x86_init.timers.setup_percpu_clockev(); |
1713 | #ifdef CONFIG_X86_64 | 1713 | #ifdef CONFIG_X86_64 |
1714 | check_nmi_watchdog(); | 1714 | check_nmi_watchdog(); |
1715 | #endif | 1715 | #endif |
@@ -1916,24 +1916,14 @@ void __cpuinit generic_processor_info(int apicid, int version) | |||
1916 | max_physical_apicid = apicid; | 1916 | max_physical_apicid = apicid; |
1917 | 1917 | ||
1918 | #ifdef CONFIG_X86_32 | 1918 | #ifdef CONFIG_X86_32 |
1919 | /* | 1919 | switch (boot_cpu_data.x86_vendor) { |
1920 | * Would be preferable to switch to bigsmp when CONFIG_HOTPLUG_CPU=y | 1920 | case X86_VENDOR_INTEL: |
1921 | * but we need to work other dependencies like SMP_SUSPEND etc | 1921 | if (num_processors > 8) |
1922 | * before this can be done without some confusion. | 1922 | def_to_bigsmp = 1; |
1923 | * if (CPU_HOTPLUG_ENABLED || num_processors > 8) | 1923 | break; |
1924 | * - Ashok Raj <ashok.raj@intel.com> | 1924 | case X86_VENDOR_AMD: |
1925 | */ | 1925 | if (max_physical_apicid >= 8) |
1926 | if (max_physical_apicid >= 8) { | ||
1927 | switch (boot_cpu_data.x86_vendor) { | ||
1928 | case X86_VENDOR_INTEL: | ||
1929 | if (!APIC_XAPIC(version)) { | ||
1930 | def_to_bigsmp = 0; | ||
1931 | break; | ||
1932 | } | ||
1933 | /* If P4 and above fall through */ | ||
1934 | case X86_VENDOR_AMD: | ||
1935 | def_to_bigsmp = 1; | 1926 | def_to_bigsmp = 1; |
1936 | } | ||
1937 | } | 1927 | } |
1938 | #endif | 1928 | #endif |
1939 | 1929 | ||