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Diffstat (limited to 'arch/x86/kernel/apic/apic.c')
-rw-r--r--arch/x86/kernel/apic/apic.c35
1 files changed, 23 insertions, 12 deletions
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 4732768c5348..b0e5e712a7af 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -47,6 +47,7 @@
47#include <asm/idle.h> 47#include <asm/idle.h>
48#include <asm/mtrr.h> 48#include <asm/mtrr.h>
49#include <asm/smp.h> 49#include <asm/smp.h>
50#include <asm/mce.h>
50 51
51unsigned int num_processors; 52unsigned int num_processors;
52 53
@@ -811,7 +812,7 @@ void clear_local_APIC(void)
811 u32 v; 812 u32 v;
812 813
813 /* APIC hasn't been mapped yet */ 814 /* APIC hasn't been mapped yet */
814 if (!apic_phys) 815 if (!x2apic && !apic_phys)
815 return; 816 return;
816 817
817 maxlvt = lapic_get_maxlvt(); 818 maxlvt = lapic_get_maxlvt();
@@ -845,6 +846,14 @@ void clear_local_APIC(void)
845 apic_write(APIC_LVTTHMR, v | APIC_LVT_MASKED); 846 apic_write(APIC_LVTTHMR, v | APIC_LVT_MASKED);
846 } 847 }
847#endif 848#endif
849#ifdef CONFIG_X86_MCE_INTEL
850 if (maxlvt >= 6) {
851 v = apic_read(APIC_LVTCMCI);
852 if (!(v & APIC_LVT_MASKED))
853 apic_write(APIC_LVTCMCI, v | APIC_LVT_MASKED);
854 }
855#endif
856
848 /* 857 /*
849 * Clean APIC state for other OSs: 858 * Clean APIC state for other OSs:
850 */ 859 */
@@ -1245,6 +1254,12 @@ void __cpuinit setup_local_APIC(void)
1245 apic_write(APIC_LVT1, value); 1254 apic_write(APIC_LVT1, value);
1246 1255
1247 preempt_enable(); 1256 preempt_enable();
1257
1258#ifdef CONFIG_X86_MCE_INTEL
1259 /* Recheck CMCI information after local APIC is up on CPU #0 */
1260 if (smp_processor_id() == 0)
1261 cmci_recheck();
1262#endif
1248} 1263}
1249 1264
1250void __cpuinit end_local_APIC_setup(void) 1265void __cpuinit end_local_APIC_setup(void)
@@ -1323,15 +1338,16 @@ void __init enable_IR_x2apic(void)
1323 return; 1338 return;
1324 } 1339 }
1325 1340
1326 local_irq_save(flags); 1341 ret = save_IO_APIC_setup();
1327 mask_8259A();
1328
1329 ret = save_mask_IO_APIC_setup();
1330 if (ret) { 1342 if (ret) {
1331 pr_info("Saving IO-APIC state failed: %d\n", ret); 1343 pr_info("Saving IO-APIC state failed: %d\n", ret);
1332 goto end; 1344 goto end;
1333 } 1345 }
1334 1346
1347 local_irq_save(flags);
1348 mask_IO_APIC_setup();
1349 mask_8259A();
1350
1335 ret = enable_intr_remapping(1); 1351 ret = enable_intr_remapping(1);
1336 1352
1337 if (ret && x2apic_preenabled) { 1353 if (ret && x2apic_preenabled) {
@@ -1356,10 +1372,10 @@ end_restore:
1356 else 1372 else
1357 reinit_intr_remapped_IO_APIC(x2apic_preenabled); 1373 reinit_intr_remapped_IO_APIC(x2apic_preenabled);
1358 1374
1359end:
1360 unmask_8259A(); 1375 unmask_8259A();
1361 local_irq_restore(flags); 1376 local_irq_restore(flags);
1362 1377
1378end:
1363 if (!ret) { 1379 if (!ret) {
1364 if (!x2apic_preenabled) 1380 if (!x2apic_preenabled)
1365 pr_info("Enabled x2apic and interrupt-remapping\n"); 1381 pr_info("Enabled x2apic and interrupt-remapping\n");
@@ -1512,12 +1528,10 @@ void __init early_init_lapic_mapping(void)
1512 */ 1528 */
1513void __init init_apic_mappings(void) 1529void __init init_apic_mappings(void)
1514{ 1530{
1515#ifdef CONFIG_X86_X2APIC
1516 if (x2apic) { 1531 if (x2apic) {
1517 boot_cpu_physical_apicid = read_apic_id(); 1532 boot_cpu_physical_apicid = read_apic_id();
1518 return; 1533 return;
1519 } 1534 }
1520#endif
1521 1535
1522 /* 1536 /*
1523 * If no local APIC can be found then set up a fake all 1537 * If no local APIC can be found then set up a fake all
@@ -1961,12 +1975,9 @@ static int lapic_resume(struct sys_device *dev)
1961 1975
1962 local_irq_save(flags); 1976 local_irq_save(flags);
1963 1977
1964#ifdef CONFIG_X86_X2APIC
1965 if (x2apic) 1978 if (x2apic)
1966 enable_x2apic(); 1979 enable_x2apic();
1967 else 1980 else {
1968#endif
1969 {
1970 /* 1981 /*
1971 * Make sure the APICBASE points to the right address 1982 * Make sure the APICBASE points to the right address
1972 * 1983 *