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Diffstat (limited to 'arch/x86/kernel/apic.c')
-rw-r--r--arch/x86/kernel/apic.c127
1 files changed, 54 insertions, 73 deletions
diff --git a/arch/x86/kernel/apic.c b/arch/x86/kernel/apic.c
index 16f94879b525..20c6e12c0475 100644
--- a/arch/x86/kernel/apic.c
+++ b/arch/x86/kernel/apic.c
@@ -441,6 +441,7 @@ static void lapic_timer_setup(enum clock_event_mode mode,
441 v = apic_read(APIC_LVTT); 441 v = apic_read(APIC_LVTT);
442 v |= (APIC_LVT_MASKED | LOCAL_TIMER_VECTOR); 442 v |= (APIC_LVT_MASKED | LOCAL_TIMER_VECTOR);
443 apic_write(APIC_LVTT, v); 443 apic_write(APIC_LVTT, v);
444 apic_write(APIC_TMICT, 0xffffffff);
444 break; 445 break;
445 case CLOCK_EVT_MODE_RESUME: 446 case CLOCK_EVT_MODE_RESUME:
446 /* Nothing to do here */ 447 /* Nothing to do here */
@@ -559,13 +560,13 @@ static int __init calibrate_by_pmtimer(long deltapm, long *delta)
559 } else { 560 } else {
560 res = (((u64)deltapm) * mult) >> 22; 561 res = (((u64)deltapm) * mult) >> 22;
561 do_div(res, 1000000); 562 do_div(res, 1000000);
562 printk(KERN_WARNING "APIC calibration not consistent " 563 pr_warning("APIC calibration not consistent "
563 "with PM Timer: %ldms instead of 100ms\n", 564 "with PM Timer: %ldms instead of 100ms\n",
564 (long)res); 565 (long)res);
565 /* Correct the lapic counter value */ 566 /* Correct the lapic counter value */
566 res = (((u64)(*delta)) * pm_100ms); 567 res = (((u64)(*delta)) * pm_100ms);
567 do_div(res, deltapm); 568 do_div(res, deltapm);
568 printk(KERN_INFO "APIC delta adjusted to PM-Timer: " 569 pr_info("APIC delta adjusted to PM-Timer: "
569 "%lu (%ld)\n", (unsigned long)res, *delta); 570 "%lu (%ld)\n", (unsigned long)res, *delta);
570 *delta = (long)res; 571 *delta = (long)res;
571 } 572 }
@@ -645,8 +646,7 @@ static int __init calibrate_APIC_clock(void)
645 */ 646 */
646 if (calibration_result < (1000000 / HZ)) { 647 if (calibration_result < (1000000 / HZ)) {
647 local_irq_enable(); 648 local_irq_enable();
648 printk(KERN_WARNING 649 pr_warning("APIC frequency too slow, disabling apic timer\n");
649 "APIC frequency too slow, disabling apic timer\n");
650 return -1; 650 return -1;
651 } 651 }
652 652
@@ -672,13 +672,9 @@ static int __init calibrate_APIC_clock(void)
672 while (lapic_cal_loops <= LAPIC_CAL_LOOPS) 672 while (lapic_cal_loops <= LAPIC_CAL_LOOPS)
673 cpu_relax(); 673 cpu_relax();
674 674
675 local_irq_disable();
676
677 /* Stop the lapic timer */ 675 /* Stop the lapic timer */
678 lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, levt); 676 lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, levt);
679 677
680 local_irq_enable();
681
682 /* Jiffies delta */ 678 /* Jiffies delta */
683 deltaj = lapic_cal_j2 - lapic_cal_j1; 679 deltaj = lapic_cal_j2 - lapic_cal_j1;
684 apic_printk(APIC_VERBOSE, "... jiffies delta = %lu\n", deltaj); 680 apic_printk(APIC_VERBOSE, "... jiffies delta = %lu\n", deltaj);
@@ -692,8 +688,7 @@ static int __init calibrate_APIC_clock(void)
692 local_irq_enable(); 688 local_irq_enable();
693 689
694 if (levt->features & CLOCK_EVT_FEAT_DUMMY) { 690 if (levt->features & CLOCK_EVT_FEAT_DUMMY) {
695 printk(KERN_WARNING 691 pr_warning("APIC timer disabled due to verification failure.\n");
696 "APIC timer disabled due to verification failure.\n");
697 return -1; 692 return -1;
698 } 693 }
699 694
@@ -714,7 +709,7 @@ void __init setup_boot_APIC_clock(void)
714 * broadcast mechanism is used. On UP systems simply ignore it. 709 * broadcast mechanism is used. On UP systems simply ignore it.
715 */ 710 */
716 if (disable_apic_timer) { 711 if (disable_apic_timer) {
717 printk(KERN_INFO "Disabling APIC timer\n"); 712 pr_info("Disabling APIC timer\n");
718 /* No broadcast on UP ! */ 713 /* No broadcast on UP ! */
719 if (num_possible_cpus() > 1) { 714 if (num_possible_cpus() > 1) {
720 lapic_clockevent.mult = 1; 715 lapic_clockevent.mult = 1;
@@ -741,7 +736,7 @@ void __init setup_boot_APIC_clock(void)
741 if (nmi_watchdog != NMI_IO_APIC) 736 if (nmi_watchdog != NMI_IO_APIC)
742 lapic_clockevent.features &= ~CLOCK_EVT_FEAT_DUMMY; 737 lapic_clockevent.features &= ~CLOCK_EVT_FEAT_DUMMY;
743 else 738 else
744 printk(KERN_WARNING "APIC timer registered as dummy," 739 pr_warning("APIC timer registered as dummy,"
745 " due to nmi_watchdog=%d!\n", nmi_watchdog); 740 " due to nmi_watchdog=%d!\n", nmi_watchdog);
746 741
747 /* Setup the lapic or request the broadcast */ 742 /* Setup the lapic or request the broadcast */
@@ -773,8 +768,7 @@ static void local_apic_timer_interrupt(void)
773 * spurious. 768 * spurious.
774 */ 769 */
775 if (!evt->event_handler) { 770 if (!evt->event_handler) {
776 printk(KERN_WARNING 771 pr_warning("Spurious LAPIC timer interrupt on cpu %d\n", cpu);
777 "Spurious LAPIC timer interrupt on cpu %d\n", cpu);
778 /* Switch it off */ 772 /* Switch it off */
779 lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, evt); 773 lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, evt);
780 return; 774 return;
@@ -814,9 +808,7 @@ void smp_apic_timer_interrupt(struct pt_regs *regs)
814 * Besides, if we don't timer interrupts ignore the global 808 * Besides, if we don't timer interrupts ignore the global
815 * interrupt lock, which is the WrongThing (tm) to do. 809 * interrupt lock, which is the WrongThing (tm) to do.
816 */ 810 */
817#ifdef CONFIG_X86_64
818 exit_idle(); 811 exit_idle();
819#endif
820 irq_enter(); 812 irq_enter();
821 local_apic_timer_interrupt(); 813 local_apic_timer_interrupt();
822 irq_exit(); 814 irq_exit();
@@ -1093,7 +1085,7 @@ static void __cpuinit lapic_setup_esr(void)
1093 unsigned int oldvalue, value, maxlvt; 1085 unsigned int oldvalue, value, maxlvt;
1094 1086
1095 if (!lapic_is_integrated()) { 1087 if (!lapic_is_integrated()) {
1096 printk(KERN_INFO "No ESR for 82489DX.\n"); 1088 pr_info("No ESR for 82489DX.\n");
1097 return; 1089 return;
1098 } 1090 }
1099 1091
@@ -1104,7 +1096,7 @@ static void __cpuinit lapic_setup_esr(void)
1104 * ESR disabled - we can't do anything useful with the 1096 * ESR disabled - we can't do anything useful with the
1105 * errors anyway - mbligh 1097 * errors anyway - mbligh
1106 */ 1098 */
1107 printk(KERN_INFO "Leaving ESR disabled.\n"); 1099 pr_info("Leaving ESR disabled.\n");
1108 return; 1100 return;
1109 } 1101 }
1110 1102
@@ -1298,7 +1290,7 @@ void check_x2apic(void)
1298 rdmsr(MSR_IA32_APICBASE, msr, msr2); 1290 rdmsr(MSR_IA32_APICBASE, msr, msr2);
1299 1291
1300 if (msr & X2APIC_ENABLE) { 1292 if (msr & X2APIC_ENABLE) {
1301 printk("x2apic enabled by BIOS, switching to x2apic ops\n"); 1293 pr_info("x2apic enabled by BIOS, switching to x2apic ops\n");
1302 x2apic_preenabled = x2apic = 1; 1294 x2apic_preenabled = x2apic = 1;
1303 apic_ops = &x2apic_ops; 1295 apic_ops = &x2apic_ops;
1304 } 1296 }
@@ -1310,7 +1302,7 @@ void enable_x2apic(void)
1310 1302
1311 rdmsr(MSR_IA32_APICBASE, msr, msr2); 1303 rdmsr(MSR_IA32_APICBASE, msr, msr2);
1312 if (!(msr & X2APIC_ENABLE)) { 1304 if (!(msr & X2APIC_ENABLE)) {
1313 printk("Enabling x2apic\n"); 1305 pr_info("Enabling x2apic\n");
1314 wrmsr(MSR_IA32_APICBASE, msr | X2APIC_ENABLE, 0); 1306 wrmsr(MSR_IA32_APICBASE, msr | X2APIC_ENABLE, 0);
1315 } 1307 }
1316} 1308}
@@ -1325,9 +1317,8 @@ void __init enable_IR_x2apic(void)
1325 return; 1317 return;
1326 1318
1327 if (!x2apic_preenabled && disable_x2apic) { 1319 if (!x2apic_preenabled && disable_x2apic) {
1328 printk(KERN_INFO 1320 pr_info("Skipped enabling x2apic and Interrupt-remapping "
1329 "Skipped enabling x2apic and Interrupt-remapping " 1321 "because of nox2apic\n");
1330 "because of nox2apic\n");
1331 return; 1322 return;
1332 } 1323 }
1333 1324
@@ -1335,22 +1326,19 @@ void __init enable_IR_x2apic(void)
1335 panic("Bios already enabled x2apic, can't enforce nox2apic"); 1326 panic("Bios already enabled x2apic, can't enforce nox2apic");
1336 1327
1337 if (!x2apic_preenabled && skip_ioapic_setup) { 1328 if (!x2apic_preenabled && skip_ioapic_setup) {
1338 printk(KERN_INFO 1329 pr_info("Skipped enabling x2apic and Interrupt-remapping "
1339 "Skipped enabling x2apic and Interrupt-remapping " 1330 "because of skipping io-apic setup\n");
1340 "because of skipping io-apic setup\n");
1341 return; 1331 return;
1342 } 1332 }
1343 1333
1344 ret = dmar_table_init(); 1334 ret = dmar_table_init();
1345 if (ret) { 1335 if (ret) {
1346 printk(KERN_INFO 1336 pr_info("dmar_table_init() failed with %d:\n", ret);
1347 "dmar_table_init() failed with %d:\n", ret);
1348 1337
1349 if (x2apic_preenabled) 1338 if (x2apic_preenabled)
1350 panic("x2apic enabled by bios. But IR enabling failed"); 1339 panic("x2apic enabled by bios. But IR enabling failed");
1351 else 1340 else
1352 printk(KERN_INFO 1341 pr_info("Not enabling x2apic,Intr-remapping\n");
1353 "Not enabling x2apic,Intr-remapping\n");
1354 return; 1342 return;
1355 } 1343 }
1356 1344
@@ -1359,7 +1347,7 @@ void __init enable_IR_x2apic(void)
1359 1347
1360 ret = save_mask_IO_APIC_setup(); 1348 ret = save_mask_IO_APIC_setup();
1361 if (ret) { 1349 if (ret) {
1362 printk(KERN_INFO "Saving IO-APIC state failed: %d\n", ret); 1350 pr_info("Saving IO-APIC state failed: %d\n", ret);
1363 goto end; 1351 goto end;
1364 } 1352 }
1365 1353
@@ -1394,14 +1382,11 @@ end:
1394 1382
1395 if (!ret) { 1383 if (!ret) {
1396 if (!x2apic_preenabled) 1384 if (!x2apic_preenabled)
1397 printk(KERN_INFO 1385 pr_info("Enabled x2apic and interrupt-remapping\n");
1398 "Enabled x2apic and interrupt-remapping\n");
1399 else 1386 else
1400 printk(KERN_INFO 1387 pr_info("Enabled Interrupt-remapping\n");
1401 "Enabled Interrupt-remapping\n");
1402 } else 1388 } else
1403 printk(KERN_ERR 1389 pr_err("Failed to enable Interrupt-remapping and x2apic\n");
1404 "Failed to enable Interrupt-remapping and x2apic\n");
1405#else 1390#else
1406 if (!cpu_has_x2apic) 1391 if (!cpu_has_x2apic)
1407 return; 1392 return;
@@ -1410,8 +1395,8 @@ end:
1410 panic("x2apic enabled prior OS handover," 1395 panic("x2apic enabled prior OS handover,"
1411 " enable CONFIG_INTR_REMAP"); 1396 " enable CONFIG_INTR_REMAP");
1412 1397
1413 printk(KERN_INFO "Enable CONFIG_INTR_REMAP for enabling intr-remapping " 1398 pr_info("Enable CONFIG_INTR_REMAP for enabling intr-remapping "
1414 " and x2apic\n"); 1399 " and x2apic\n");
1415#endif 1400#endif
1416 1401
1417 return; 1402 return;
@@ -1428,7 +1413,7 @@ end:
1428static int __init detect_init_APIC(void) 1413static int __init detect_init_APIC(void)
1429{ 1414{
1430 if (!cpu_has_apic) { 1415 if (!cpu_has_apic) {
1431 printk(KERN_INFO "No local APIC present\n"); 1416 pr_info("No local APIC present\n");
1432 return -1; 1417 return -1;
1433 } 1418 }
1434 1419
@@ -1469,8 +1454,8 @@ static int __init detect_init_APIC(void)
1469 * "lapic" specified. 1454 * "lapic" specified.
1470 */ 1455 */
1471 if (!force_enable_local_apic) { 1456 if (!force_enable_local_apic) {
1472 printk(KERN_INFO "Local APIC disabled by BIOS -- " 1457 pr_info("Local APIC disabled by BIOS -- "
1473 "you can enable it with \"lapic\"\n"); 1458 "you can enable it with \"lapic\"\n");
1474 return -1; 1459 return -1;
1475 } 1460 }
1476 /* 1461 /*
@@ -1480,8 +1465,7 @@ static int __init detect_init_APIC(void)
1480 */ 1465 */
1481 rdmsr(MSR_IA32_APICBASE, l, h); 1466 rdmsr(MSR_IA32_APICBASE, l, h);
1482 if (!(l & MSR_IA32_APICBASE_ENABLE)) { 1467 if (!(l & MSR_IA32_APICBASE_ENABLE)) {
1483 printk(KERN_INFO 1468 pr_info("Local APIC disabled by BIOS -- reenabling.\n");
1484 "Local APIC disabled by BIOS -- reenabling.\n");
1485 l &= ~MSR_IA32_APICBASE_BASE; 1469 l &= ~MSR_IA32_APICBASE_BASE;
1486 l |= MSR_IA32_APICBASE_ENABLE | APIC_DEFAULT_PHYS_BASE; 1470 l |= MSR_IA32_APICBASE_ENABLE | APIC_DEFAULT_PHYS_BASE;
1487 wrmsr(MSR_IA32_APICBASE, l, h); 1471 wrmsr(MSR_IA32_APICBASE, l, h);
@@ -1494,7 +1478,7 @@ static int __init detect_init_APIC(void)
1494 */ 1478 */
1495 features = cpuid_edx(1); 1479 features = cpuid_edx(1);
1496 if (!(features & (1 << X86_FEATURE_APIC))) { 1480 if (!(features & (1 << X86_FEATURE_APIC))) {
1497 printk(KERN_WARNING "Could not enable APIC!\n"); 1481 pr_warning("Could not enable APIC!\n");
1498 return -1; 1482 return -1;
1499 } 1483 }
1500 set_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC); 1484 set_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC);
@@ -1505,14 +1489,14 @@ static int __init detect_init_APIC(void)
1505 if (l & MSR_IA32_APICBASE_ENABLE) 1489 if (l & MSR_IA32_APICBASE_ENABLE)
1506 mp_lapic_addr = l & MSR_IA32_APICBASE_BASE; 1490 mp_lapic_addr = l & MSR_IA32_APICBASE_BASE;
1507 1491
1508 printk(KERN_INFO "Found and enabled local APIC!\n"); 1492 pr_info("Found and enabled local APIC!\n");
1509 1493
1510 apic_pm_activate(); 1494 apic_pm_activate();
1511 1495
1512 return 0; 1496 return 0;
1513 1497
1514no_apic: 1498no_apic:
1515 printk(KERN_INFO "No local APIC present or hardware disabled\n"); 1499 pr_info("No local APIC present or hardware disabled\n");
1516 return -1; 1500 return -1;
1517} 1501}
1518#endif 1502#endif
@@ -1588,12 +1572,12 @@ int __init APIC_init_uniprocessor(void)
1588{ 1572{
1589#ifdef CONFIG_X86_64 1573#ifdef CONFIG_X86_64
1590 if (disable_apic) { 1574 if (disable_apic) {
1591 printk(KERN_INFO "Apic disabled\n"); 1575 pr_info("Apic disabled\n");
1592 return -1; 1576 return -1;
1593 } 1577 }
1594 if (!cpu_has_apic) { 1578 if (!cpu_has_apic) {
1595 disable_apic = 1; 1579 disable_apic = 1;
1596 printk(KERN_INFO "Apic disabled by BIOS\n"); 1580 pr_info("Apic disabled by BIOS\n");
1597 return -1; 1581 return -1;
1598 } 1582 }
1599#else 1583#else
@@ -1605,8 +1589,8 @@ int __init APIC_init_uniprocessor(void)
1605 */ 1589 */
1606 if (!cpu_has_apic && 1590 if (!cpu_has_apic &&
1607 APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) { 1591 APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
1608 printk(KERN_ERR "BIOS bug, local APIC 0x%x not detected!...\n", 1592 pr_err("BIOS bug, local APIC 0x%x not detected!...\n",
1609 boot_cpu_physical_apicid); 1593 boot_cpu_physical_apicid);
1610 clear_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC); 1594 clear_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC);
1611 return -1; 1595 return -1;
1612 } 1596 }
@@ -1682,9 +1666,7 @@ void smp_spurious_interrupt(struct pt_regs *regs)
1682{ 1666{
1683 u32 v; 1667 u32 v;
1684 1668
1685#ifdef CONFIG_X86_64
1686 exit_idle(); 1669 exit_idle();
1687#endif
1688 irq_enter(); 1670 irq_enter();
1689 /* 1671 /*
1690 * Check if this really is a spurious interrupt and ACK it 1672 * Check if this really is a spurious interrupt and ACK it
@@ -1699,8 +1681,8 @@ void smp_spurious_interrupt(struct pt_regs *regs)
1699 add_pda(irq_spurious_count, 1); 1681 add_pda(irq_spurious_count, 1);
1700#else 1682#else
1701 /* see sw-dev-man vol 3, chapter 7.4.13.5 */ 1683 /* see sw-dev-man vol 3, chapter 7.4.13.5 */
1702 printk(KERN_INFO "spurious APIC interrupt on CPU#%d, " 1684 pr_info("spurious APIC interrupt on CPU#%d, "
1703 "should never happen.\n", smp_processor_id()); 1685 "should never happen.\n", smp_processor_id());
1704 __get_cpu_var(irq_stat).irq_spurious_count++; 1686 __get_cpu_var(irq_stat).irq_spurious_count++;
1705#endif 1687#endif
1706 irq_exit(); 1688 irq_exit();
@@ -1713,9 +1695,7 @@ void smp_error_interrupt(struct pt_regs *regs)
1713{ 1695{
1714 u32 v, v1; 1696 u32 v, v1;
1715 1697
1716#ifdef CONFIG_X86_64
1717 exit_idle(); 1698 exit_idle();
1718#endif
1719 irq_enter(); 1699 irq_enter();
1720 /* First tickle the hardware, only then report what went on. -- REW */ 1700 /* First tickle the hardware, only then report what went on. -- REW */
1721 v = apic_read(APIC_ESR); 1701 v = apic_read(APIC_ESR);
@@ -1724,17 +1704,18 @@ void smp_error_interrupt(struct pt_regs *regs)
1724 ack_APIC_irq(); 1704 ack_APIC_irq();
1725 atomic_inc(&irq_err_count); 1705 atomic_inc(&irq_err_count);
1726 1706
1727 /* Here is what the APIC error bits mean: 1707 /*
1728 0: Send CS error 1708 * Here is what the APIC error bits mean:
1729 1: Receive CS error 1709 * 0: Send CS error
1730 2: Send accept error 1710 * 1: Receive CS error
1731 3: Receive accept error 1711 * 2: Send accept error
1732 4: Reserved 1712 * 3: Receive accept error
1733 5: Send illegal vector 1713 * 4: Reserved
1734 6: Received illegal vector 1714 * 5: Send illegal vector
1735 7: Illegal register address 1715 * 6: Received illegal vector
1736 */ 1716 * 7: Illegal register address
1737 printk(KERN_DEBUG "APIC error on CPU%d: %02x(%02x)\n", 1717 */
1718 pr_debug("APIC error on CPU%d: %02x(%02x)\n",
1738 smp_processor_id(), v , v1); 1719 smp_processor_id(), v , v1);
1739 irq_exit(); 1720 irq_exit();
1740} 1721}
@@ -1838,15 +1819,15 @@ void __cpuinit generic_processor_info(int apicid, int version)
1838 * Validate version 1819 * Validate version
1839 */ 1820 */
1840 if (version == 0x0) { 1821 if (version == 0x0) {
1841 printk(KERN_WARNING "BIOS bug, APIC version is 0 for CPU#%d! " 1822 pr_warning("BIOS bug, APIC version is 0 for CPU#%d! "
1842 "fixing up to 0x10. (tell your hw vendor)\n", 1823 "fixing up to 0x10. (tell your hw vendor)\n",
1843 version); 1824 version);
1844 version = 0x10; 1825 version = 0x10;
1845 } 1826 }
1846 apic_version[apicid] = version; 1827 apic_version[apicid] = version;
1847 1828
1848 if (num_processors >= NR_CPUS) { 1829 if (num_processors >= NR_CPUS) {
1849 printk(KERN_WARNING "WARNING: NR_CPUS limit of %i reached." 1830 pr_warning("WARNING: NR_CPUS limit of %i reached."
1850 " Processor ignored.\n", NR_CPUS); 1831 " Processor ignored.\n", NR_CPUS);
1851 return; 1832 return;
1852 } 1833 }
@@ -2209,7 +2190,7 @@ static int __init apic_set_verbosity(char *arg)
2209 else if (strcmp("verbose", arg) == 0) 2190 else if (strcmp("verbose", arg) == 0)
2210 apic_verbosity = APIC_VERBOSE; 2191 apic_verbosity = APIC_VERBOSE;
2211 else { 2192 else {
2212 printk(KERN_WARNING "APIC Verbosity level %s not recognised" 2193 pr_warning("APIC Verbosity level %s not recognised"
2213 " use apic=verbose or apic=debug\n", arg); 2194 " use apic=verbose or apic=debug\n", arg);
2214 return -EINVAL; 2195 return -EINVAL;
2215 } 2196 }