diff options
Diffstat (limited to 'arch/x86/kernel/apic.c')
-rw-r--r-- | arch/x86/kernel/apic.c | 130 |
1 files changed, 56 insertions, 74 deletions
diff --git a/arch/x86/kernel/apic.c b/arch/x86/kernel/apic.c index 4f859acb1563..6c83ac10e6d3 100644 --- a/arch/x86/kernel/apic.c +++ b/arch/x86/kernel/apic.c | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <linux/module.h> | 30 | #include <linux/module.h> |
31 | #include <linux/dmi.h> | 31 | #include <linux/dmi.h> |
32 | #include <linux/dmar.h> | 32 | #include <linux/dmar.h> |
33 | #include <linux/ftrace.h> | ||
33 | 34 | ||
34 | #include <asm/perf_counter.h> | 35 | #include <asm/perf_counter.h> |
35 | #include <asm/atomic.h> | 36 | #include <asm/atomic.h> |
@@ -442,6 +443,7 @@ static void lapic_timer_setup(enum clock_event_mode mode, | |||
442 | v = apic_read(APIC_LVTT); | 443 | v = apic_read(APIC_LVTT); |
443 | v |= (APIC_LVT_MASKED | LOCAL_TIMER_VECTOR); | 444 | v |= (APIC_LVT_MASKED | LOCAL_TIMER_VECTOR); |
444 | apic_write(APIC_LVTT, v); | 445 | apic_write(APIC_LVTT, v); |
446 | apic_write(APIC_TMICT, 0xffffffff); | ||
445 | break; | 447 | break; |
446 | case CLOCK_EVT_MODE_RESUME: | 448 | case CLOCK_EVT_MODE_RESUME: |
447 | /* Nothing to do here */ | 449 | /* Nothing to do here */ |
@@ -560,13 +562,13 @@ static int __init calibrate_by_pmtimer(long deltapm, long *delta) | |||
560 | } else { | 562 | } else { |
561 | res = (((u64)deltapm) * mult) >> 22; | 563 | res = (((u64)deltapm) * mult) >> 22; |
562 | do_div(res, 1000000); | 564 | do_div(res, 1000000); |
563 | printk(KERN_WARNING "APIC calibration not consistent " | 565 | pr_warning("APIC calibration not consistent " |
564 | "with PM Timer: %ldms instead of 100ms\n", | 566 | "with PM Timer: %ldms instead of 100ms\n", |
565 | (long)res); | 567 | (long)res); |
566 | /* Correct the lapic counter value */ | 568 | /* Correct the lapic counter value */ |
567 | res = (((u64)(*delta)) * pm_100ms); | 569 | res = (((u64)(*delta)) * pm_100ms); |
568 | do_div(res, deltapm); | 570 | do_div(res, deltapm); |
569 | printk(KERN_INFO "APIC delta adjusted to PM-Timer: " | 571 | pr_info("APIC delta adjusted to PM-Timer: " |
570 | "%lu (%ld)\n", (unsigned long)res, *delta); | 572 | "%lu (%ld)\n", (unsigned long)res, *delta); |
571 | *delta = (long)res; | 573 | *delta = (long)res; |
572 | } | 574 | } |
@@ -646,8 +648,7 @@ static int __init calibrate_APIC_clock(void) | |||
646 | */ | 648 | */ |
647 | if (calibration_result < (1000000 / HZ)) { | 649 | if (calibration_result < (1000000 / HZ)) { |
648 | local_irq_enable(); | 650 | local_irq_enable(); |
649 | printk(KERN_WARNING | 651 | pr_warning("APIC frequency too slow, disabling apic timer\n"); |
650 | "APIC frequency too slow, disabling apic timer\n"); | ||
651 | return -1; | 652 | return -1; |
652 | } | 653 | } |
653 | 654 | ||
@@ -673,13 +674,9 @@ static int __init calibrate_APIC_clock(void) | |||
673 | while (lapic_cal_loops <= LAPIC_CAL_LOOPS) | 674 | while (lapic_cal_loops <= LAPIC_CAL_LOOPS) |
674 | cpu_relax(); | 675 | cpu_relax(); |
675 | 676 | ||
676 | local_irq_disable(); | ||
677 | |||
678 | /* Stop the lapic timer */ | 677 | /* Stop the lapic timer */ |
679 | lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, levt); | 678 | lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, levt); |
680 | 679 | ||
681 | local_irq_enable(); | ||
682 | |||
683 | /* Jiffies delta */ | 680 | /* Jiffies delta */ |
684 | deltaj = lapic_cal_j2 - lapic_cal_j1; | 681 | deltaj = lapic_cal_j2 - lapic_cal_j1; |
685 | apic_printk(APIC_VERBOSE, "... jiffies delta = %lu\n", deltaj); | 682 | apic_printk(APIC_VERBOSE, "... jiffies delta = %lu\n", deltaj); |
@@ -693,8 +690,7 @@ static int __init calibrate_APIC_clock(void) | |||
693 | local_irq_enable(); | 690 | local_irq_enable(); |
694 | 691 | ||
695 | if (levt->features & CLOCK_EVT_FEAT_DUMMY) { | 692 | if (levt->features & CLOCK_EVT_FEAT_DUMMY) { |
696 | printk(KERN_WARNING | 693 | pr_warning("APIC timer disabled due to verification failure.\n"); |
697 | "APIC timer disabled due to verification failure.\n"); | ||
698 | return -1; | 694 | return -1; |
699 | } | 695 | } |
700 | 696 | ||
@@ -715,7 +711,7 @@ void __init setup_boot_APIC_clock(void) | |||
715 | * broadcast mechanism is used. On UP systems simply ignore it. | 711 | * broadcast mechanism is used. On UP systems simply ignore it. |
716 | */ | 712 | */ |
717 | if (disable_apic_timer) { | 713 | if (disable_apic_timer) { |
718 | printk(KERN_INFO "Disabling APIC timer\n"); | 714 | pr_info("Disabling APIC timer\n"); |
719 | /* No broadcast on UP ! */ | 715 | /* No broadcast on UP ! */ |
720 | if (num_possible_cpus() > 1) { | 716 | if (num_possible_cpus() > 1) { |
721 | lapic_clockevent.mult = 1; | 717 | lapic_clockevent.mult = 1; |
@@ -742,7 +738,7 @@ void __init setup_boot_APIC_clock(void) | |||
742 | if (nmi_watchdog != NMI_IO_APIC) | 738 | if (nmi_watchdog != NMI_IO_APIC) |
743 | lapic_clockevent.features &= ~CLOCK_EVT_FEAT_DUMMY; | 739 | lapic_clockevent.features &= ~CLOCK_EVT_FEAT_DUMMY; |
744 | else | 740 | else |
745 | printk(KERN_WARNING "APIC timer registered as dummy," | 741 | pr_warning("APIC timer registered as dummy," |
746 | " due to nmi_watchdog=%d!\n", nmi_watchdog); | 742 | " due to nmi_watchdog=%d!\n", nmi_watchdog); |
747 | 743 | ||
748 | /* Setup the lapic or request the broadcast */ | 744 | /* Setup the lapic or request the broadcast */ |
@@ -774,8 +770,7 @@ static void local_apic_timer_interrupt(void) | |||
774 | * spurious. | 770 | * spurious. |
775 | */ | 771 | */ |
776 | if (!evt->event_handler) { | 772 | if (!evt->event_handler) { |
777 | printk(KERN_WARNING | 773 | pr_warning("Spurious LAPIC timer interrupt on cpu %d\n", cpu); |
778 | "Spurious LAPIC timer interrupt on cpu %d\n", cpu); | ||
779 | /* Switch it off */ | 774 | /* Switch it off */ |
780 | lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, evt); | 775 | lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, evt); |
781 | return; | 776 | return; |
@@ -797,7 +792,7 @@ static void local_apic_timer_interrupt(void) | |||
797 | * [ if a single-CPU system runs an SMP kernel then we call the local | 792 | * [ if a single-CPU system runs an SMP kernel then we call the local |
798 | * interrupt as well. Thus we cannot inline the local irq ... ] | 793 | * interrupt as well. Thus we cannot inline the local irq ... ] |
799 | */ | 794 | */ |
800 | void smp_apic_timer_interrupt(struct pt_regs *regs) | 795 | void __irq_entry smp_apic_timer_interrupt(struct pt_regs *regs) |
801 | { | 796 | { |
802 | struct pt_regs *old_regs = set_irq_regs(regs); | 797 | struct pt_regs *old_regs = set_irq_regs(regs); |
803 | 798 | ||
@@ -811,9 +806,7 @@ void smp_apic_timer_interrupt(struct pt_regs *regs) | |||
811 | * Besides, if we don't timer interrupts ignore the global | 806 | * Besides, if we don't timer interrupts ignore the global |
812 | * interrupt lock, which is the WrongThing (tm) to do. | 807 | * interrupt lock, which is the WrongThing (tm) to do. |
813 | */ | 808 | */ |
814 | #ifdef CONFIG_X86_64 | ||
815 | exit_idle(); | 809 | exit_idle(); |
816 | #endif | ||
817 | irq_enter(); | 810 | irq_enter(); |
818 | local_apic_timer_interrupt(); | 811 | local_apic_timer_interrupt(); |
819 | irq_exit(); | 812 | irq_exit(); |
@@ -1090,7 +1083,7 @@ static void __cpuinit lapic_setup_esr(void) | |||
1090 | unsigned int oldvalue, value, maxlvt; | 1083 | unsigned int oldvalue, value, maxlvt; |
1091 | 1084 | ||
1092 | if (!lapic_is_integrated()) { | 1085 | if (!lapic_is_integrated()) { |
1093 | printk(KERN_INFO "No ESR for 82489DX.\n"); | 1086 | pr_info("No ESR for 82489DX.\n"); |
1094 | return; | 1087 | return; |
1095 | } | 1088 | } |
1096 | 1089 | ||
@@ -1101,7 +1094,7 @@ static void __cpuinit lapic_setup_esr(void) | |||
1101 | * ESR disabled - we can't do anything useful with the | 1094 | * ESR disabled - we can't do anything useful with the |
1102 | * errors anyway - mbligh | 1095 | * errors anyway - mbligh |
1103 | */ | 1096 | */ |
1104 | printk(KERN_INFO "Leaving ESR disabled.\n"); | 1097 | pr_info("Leaving ESR disabled.\n"); |
1105 | return; | 1098 | return; |
1106 | } | 1099 | } |
1107 | 1100 | ||
@@ -1296,7 +1289,7 @@ void check_x2apic(void) | |||
1296 | rdmsr(MSR_IA32_APICBASE, msr, msr2); | 1289 | rdmsr(MSR_IA32_APICBASE, msr, msr2); |
1297 | 1290 | ||
1298 | if (msr & X2APIC_ENABLE) { | 1291 | if (msr & X2APIC_ENABLE) { |
1299 | printk("x2apic enabled by BIOS, switching to x2apic ops\n"); | 1292 | pr_info("x2apic enabled by BIOS, switching to x2apic ops\n"); |
1300 | x2apic_preenabled = x2apic = 1; | 1293 | x2apic_preenabled = x2apic = 1; |
1301 | apic_ops = &x2apic_ops; | 1294 | apic_ops = &x2apic_ops; |
1302 | } | 1295 | } |
@@ -1308,7 +1301,7 @@ void enable_x2apic(void) | |||
1308 | 1301 | ||
1309 | rdmsr(MSR_IA32_APICBASE, msr, msr2); | 1302 | rdmsr(MSR_IA32_APICBASE, msr, msr2); |
1310 | if (!(msr & X2APIC_ENABLE)) { | 1303 | if (!(msr & X2APIC_ENABLE)) { |
1311 | printk("Enabling x2apic\n"); | 1304 | pr_info("Enabling x2apic\n"); |
1312 | wrmsr(MSR_IA32_APICBASE, msr | X2APIC_ENABLE, 0); | 1305 | wrmsr(MSR_IA32_APICBASE, msr | X2APIC_ENABLE, 0); |
1313 | } | 1306 | } |
1314 | } | 1307 | } |
@@ -1323,9 +1316,8 @@ void __init enable_IR_x2apic(void) | |||
1323 | return; | 1316 | return; |
1324 | 1317 | ||
1325 | if (!x2apic_preenabled && disable_x2apic) { | 1318 | if (!x2apic_preenabled && disable_x2apic) { |
1326 | printk(KERN_INFO | 1319 | pr_info("Skipped enabling x2apic and Interrupt-remapping " |
1327 | "Skipped enabling x2apic and Interrupt-remapping " | 1320 | "because of nox2apic\n"); |
1328 | "because of nox2apic\n"); | ||
1329 | return; | 1321 | return; |
1330 | } | 1322 | } |
1331 | 1323 | ||
@@ -1333,22 +1325,19 @@ void __init enable_IR_x2apic(void) | |||
1333 | panic("Bios already enabled x2apic, can't enforce nox2apic"); | 1325 | panic("Bios already enabled x2apic, can't enforce nox2apic"); |
1334 | 1326 | ||
1335 | if (!x2apic_preenabled && skip_ioapic_setup) { | 1327 | if (!x2apic_preenabled && skip_ioapic_setup) { |
1336 | printk(KERN_INFO | 1328 | pr_info("Skipped enabling x2apic and Interrupt-remapping " |
1337 | "Skipped enabling x2apic and Interrupt-remapping " | 1329 | "because of skipping io-apic setup\n"); |
1338 | "because of skipping io-apic setup\n"); | ||
1339 | return; | 1330 | return; |
1340 | } | 1331 | } |
1341 | 1332 | ||
1342 | ret = dmar_table_init(); | 1333 | ret = dmar_table_init(); |
1343 | if (ret) { | 1334 | if (ret) { |
1344 | printk(KERN_INFO | 1335 | pr_info("dmar_table_init() failed with %d:\n", ret); |
1345 | "dmar_table_init() failed with %d:\n", ret); | ||
1346 | 1336 | ||
1347 | if (x2apic_preenabled) | 1337 | if (x2apic_preenabled) |
1348 | panic("x2apic enabled by bios. But IR enabling failed"); | 1338 | panic("x2apic enabled by bios. But IR enabling failed"); |
1349 | else | 1339 | else |
1350 | printk(KERN_INFO | 1340 | pr_info("Not enabling x2apic,Intr-remapping\n"); |
1351 | "Not enabling x2apic,Intr-remapping\n"); | ||
1352 | return; | 1341 | return; |
1353 | } | 1342 | } |
1354 | 1343 | ||
@@ -1357,7 +1346,7 @@ void __init enable_IR_x2apic(void) | |||
1357 | 1346 | ||
1358 | ret = save_mask_IO_APIC_setup(); | 1347 | ret = save_mask_IO_APIC_setup(); |
1359 | if (ret) { | 1348 | if (ret) { |
1360 | printk(KERN_INFO "Saving IO-APIC state failed: %d\n", ret); | 1349 | pr_info("Saving IO-APIC state failed: %d\n", ret); |
1361 | goto end; | 1350 | goto end; |
1362 | } | 1351 | } |
1363 | 1352 | ||
@@ -1392,14 +1381,11 @@ end: | |||
1392 | 1381 | ||
1393 | if (!ret) { | 1382 | if (!ret) { |
1394 | if (!x2apic_preenabled) | 1383 | if (!x2apic_preenabled) |
1395 | printk(KERN_INFO | 1384 | pr_info("Enabled x2apic and interrupt-remapping\n"); |
1396 | "Enabled x2apic and interrupt-remapping\n"); | ||
1397 | else | 1385 | else |
1398 | printk(KERN_INFO | 1386 | pr_info("Enabled Interrupt-remapping\n"); |
1399 | "Enabled Interrupt-remapping\n"); | ||
1400 | } else | 1387 | } else |
1401 | printk(KERN_ERR | 1388 | pr_err("Failed to enable Interrupt-remapping and x2apic\n"); |
1402 | "Failed to enable Interrupt-remapping and x2apic\n"); | ||
1403 | #else | 1389 | #else |
1404 | if (!cpu_has_x2apic) | 1390 | if (!cpu_has_x2apic) |
1405 | return; | 1391 | return; |
@@ -1408,8 +1394,8 @@ end: | |||
1408 | panic("x2apic enabled prior OS handover," | 1394 | panic("x2apic enabled prior OS handover," |
1409 | " enable CONFIG_INTR_REMAP"); | 1395 | " enable CONFIG_INTR_REMAP"); |
1410 | 1396 | ||
1411 | printk(KERN_INFO "Enable CONFIG_INTR_REMAP for enabling intr-remapping " | 1397 | pr_info("Enable CONFIG_INTR_REMAP for enabling intr-remapping " |
1412 | " and x2apic\n"); | 1398 | " and x2apic\n"); |
1413 | #endif | 1399 | #endif |
1414 | 1400 | ||
1415 | return; | 1401 | return; |
@@ -1426,7 +1412,7 @@ end: | |||
1426 | static int __init detect_init_APIC(void) | 1412 | static int __init detect_init_APIC(void) |
1427 | { | 1413 | { |
1428 | if (!cpu_has_apic) { | 1414 | if (!cpu_has_apic) { |
1429 | printk(KERN_INFO "No local APIC present\n"); | 1415 | pr_info("No local APIC present\n"); |
1430 | return -1; | 1416 | return -1; |
1431 | } | 1417 | } |
1432 | 1418 | ||
@@ -1467,8 +1453,8 @@ static int __init detect_init_APIC(void) | |||
1467 | * "lapic" specified. | 1453 | * "lapic" specified. |
1468 | */ | 1454 | */ |
1469 | if (!force_enable_local_apic) { | 1455 | if (!force_enable_local_apic) { |
1470 | printk(KERN_INFO "Local APIC disabled by BIOS -- " | 1456 | pr_info("Local APIC disabled by BIOS -- " |
1471 | "you can enable it with \"lapic\"\n"); | 1457 | "you can enable it with \"lapic\"\n"); |
1472 | return -1; | 1458 | return -1; |
1473 | } | 1459 | } |
1474 | /* | 1460 | /* |
@@ -1478,8 +1464,7 @@ static int __init detect_init_APIC(void) | |||
1478 | */ | 1464 | */ |
1479 | rdmsr(MSR_IA32_APICBASE, l, h); | 1465 | rdmsr(MSR_IA32_APICBASE, l, h); |
1480 | if (!(l & MSR_IA32_APICBASE_ENABLE)) { | 1466 | if (!(l & MSR_IA32_APICBASE_ENABLE)) { |
1481 | printk(KERN_INFO | 1467 | pr_info("Local APIC disabled by BIOS -- reenabling.\n"); |
1482 | "Local APIC disabled by BIOS -- reenabling.\n"); | ||
1483 | l &= ~MSR_IA32_APICBASE_BASE; | 1468 | l &= ~MSR_IA32_APICBASE_BASE; |
1484 | l |= MSR_IA32_APICBASE_ENABLE | APIC_DEFAULT_PHYS_BASE; | 1469 | l |= MSR_IA32_APICBASE_ENABLE | APIC_DEFAULT_PHYS_BASE; |
1485 | wrmsr(MSR_IA32_APICBASE, l, h); | 1470 | wrmsr(MSR_IA32_APICBASE, l, h); |
@@ -1492,7 +1477,7 @@ static int __init detect_init_APIC(void) | |||
1492 | */ | 1477 | */ |
1493 | features = cpuid_edx(1); | 1478 | features = cpuid_edx(1); |
1494 | if (!(features & (1 << X86_FEATURE_APIC))) { | 1479 | if (!(features & (1 << X86_FEATURE_APIC))) { |
1495 | printk(KERN_WARNING "Could not enable APIC!\n"); | 1480 | pr_warning("Could not enable APIC!\n"); |
1496 | return -1; | 1481 | return -1; |
1497 | } | 1482 | } |
1498 | set_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC); | 1483 | set_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC); |
@@ -1503,14 +1488,14 @@ static int __init detect_init_APIC(void) | |||
1503 | if (l & MSR_IA32_APICBASE_ENABLE) | 1488 | if (l & MSR_IA32_APICBASE_ENABLE) |
1504 | mp_lapic_addr = l & MSR_IA32_APICBASE_BASE; | 1489 | mp_lapic_addr = l & MSR_IA32_APICBASE_BASE; |
1505 | 1490 | ||
1506 | printk(KERN_INFO "Found and enabled local APIC!\n"); | 1491 | pr_info("Found and enabled local APIC!\n"); |
1507 | 1492 | ||
1508 | apic_pm_activate(); | 1493 | apic_pm_activate(); |
1509 | 1494 | ||
1510 | return 0; | 1495 | return 0; |
1511 | 1496 | ||
1512 | no_apic: | 1497 | no_apic: |
1513 | printk(KERN_INFO "No local APIC present or hardware disabled\n"); | 1498 | pr_info("No local APIC present or hardware disabled\n"); |
1514 | return -1; | 1499 | return -1; |
1515 | } | 1500 | } |
1516 | #endif | 1501 | #endif |
@@ -1586,12 +1571,12 @@ int __init APIC_init_uniprocessor(void) | |||
1586 | { | 1571 | { |
1587 | #ifdef CONFIG_X86_64 | 1572 | #ifdef CONFIG_X86_64 |
1588 | if (disable_apic) { | 1573 | if (disable_apic) { |
1589 | printk(KERN_INFO "Apic disabled\n"); | 1574 | pr_info("Apic disabled\n"); |
1590 | return -1; | 1575 | return -1; |
1591 | } | 1576 | } |
1592 | if (!cpu_has_apic) { | 1577 | if (!cpu_has_apic) { |
1593 | disable_apic = 1; | 1578 | disable_apic = 1; |
1594 | printk(KERN_INFO "Apic disabled by BIOS\n"); | 1579 | pr_info("Apic disabled by BIOS\n"); |
1595 | return -1; | 1580 | return -1; |
1596 | } | 1581 | } |
1597 | #else | 1582 | #else |
@@ -1603,8 +1588,8 @@ int __init APIC_init_uniprocessor(void) | |||
1603 | */ | 1588 | */ |
1604 | if (!cpu_has_apic && | 1589 | if (!cpu_has_apic && |
1605 | APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) { | 1590 | APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) { |
1606 | printk(KERN_ERR "BIOS bug, local APIC 0x%x not detected!...\n", | 1591 | pr_err("BIOS bug, local APIC 0x%x not detected!...\n", |
1607 | boot_cpu_physical_apicid); | 1592 | boot_cpu_physical_apicid); |
1608 | clear_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC); | 1593 | clear_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC); |
1609 | return -1; | 1594 | return -1; |
1610 | } | 1595 | } |
@@ -1680,9 +1665,7 @@ void smp_spurious_interrupt(struct pt_regs *regs) | |||
1680 | { | 1665 | { |
1681 | u32 v; | 1666 | u32 v; |
1682 | 1667 | ||
1683 | #ifdef CONFIG_X86_64 | ||
1684 | exit_idle(); | 1668 | exit_idle(); |
1685 | #endif | ||
1686 | irq_enter(); | 1669 | irq_enter(); |
1687 | /* | 1670 | /* |
1688 | * Check if this really is a spurious interrupt and ACK it | 1671 | * Check if this really is a spurious interrupt and ACK it |
@@ -1696,8 +1679,8 @@ void smp_spurious_interrupt(struct pt_regs *regs) | |||
1696 | inc_irq_stat(irq_spurious_count); | 1679 | inc_irq_stat(irq_spurious_count); |
1697 | 1680 | ||
1698 | /* see sw-dev-man vol 3, chapter 7.4.13.5 */ | 1681 | /* see sw-dev-man vol 3, chapter 7.4.13.5 */ |
1699 | printk(KERN_INFO "spurious APIC interrupt on CPU#%d, " | 1682 | pr_info("spurious APIC interrupt on CPU#%d, " |
1700 | "should never happen.\n", smp_processor_id()); | 1683 | "should never happen.\n", smp_processor_id()); |
1701 | irq_exit(); | 1684 | irq_exit(); |
1702 | } | 1685 | } |
1703 | 1686 | ||
@@ -1708,9 +1691,7 @@ void smp_error_interrupt(struct pt_regs *regs) | |||
1708 | { | 1691 | { |
1709 | u32 v, v1; | 1692 | u32 v, v1; |
1710 | 1693 | ||
1711 | #ifdef CONFIG_X86_64 | ||
1712 | exit_idle(); | 1694 | exit_idle(); |
1713 | #endif | ||
1714 | irq_enter(); | 1695 | irq_enter(); |
1715 | /* First tickle the hardware, only then report what went on. -- REW */ | 1696 | /* First tickle the hardware, only then report what went on. -- REW */ |
1716 | v = apic_read(APIC_ESR); | 1697 | v = apic_read(APIC_ESR); |
@@ -1719,17 +1700,18 @@ void smp_error_interrupt(struct pt_regs *regs) | |||
1719 | ack_APIC_irq(); | 1700 | ack_APIC_irq(); |
1720 | atomic_inc(&irq_err_count); | 1701 | atomic_inc(&irq_err_count); |
1721 | 1702 | ||
1722 | /* Here is what the APIC error bits mean: | 1703 | /* |
1723 | 0: Send CS error | 1704 | * Here is what the APIC error bits mean: |
1724 | 1: Receive CS error | 1705 | * 0: Send CS error |
1725 | 2: Send accept error | 1706 | * 1: Receive CS error |
1726 | 3: Receive accept error | 1707 | * 2: Send accept error |
1727 | 4: Reserved | 1708 | * 3: Receive accept error |
1728 | 5: Send illegal vector | 1709 | * 4: Reserved |
1729 | 6: Received illegal vector | 1710 | * 5: Send illegal vector |
1730 | 7: Illegal register address | 1711 | * 6: Received illegal vector |
1731 | */ | 1712 | * 7: Illegal register address |
1732 | printk(KERN_DEBUG "APIC error on CPU%d: %02x(%02x)\n", | 1713 | */ |
1714 | pr_debug("APIC error on CPU%d: %02x(%02x)\n", | ||
1733 | smp_processor_id(), v , v1); | 1715 | smp_processor_id(), v , v1); |
1734 | irq_exit(); | 1716 | irq_exit(); |
1735 | } | 1717 | } |
@@ -1833,15 +1815,15 @@ void __cpuinit generic_processor_info(int apicid, int version) | |||
1833 | * Validate version | 1815 | * Validate version |
1834 | */ | 1816 | */ |
1835 | if (version == 0x0) { | 1817 | if (version == 0x0) { |
1836 | printk(KERN_WARNING "BIOS bug, APIC version is 0 for CPU#%d! " | 1818 | pr_warning("BIOS bug, APIC version is 0 for CPU#%d! " |
1837 | "fixing up to 0x10. (tell your hw vendor)\n", | 1819 | "fixing up to 0x10. (tell your hw vendor)\n", |
1838 | version); | 1820 | version); |
1839 | version = 0x10; | 1821 | version = 0x10; |
1840 | } | 1822 | } |
1841 | apic_version[apicid] = version; | 1823 | apic_version[apicid] = version; |
1842 | 1824 | ||
1843 | if (num_processors >= NR_CPUS) { | 1825 | if (num_processors >= NR_CPUS) { |
1844 | printk(KERN_WARNING "WARNING: NR_CPUS limit of %i reached." | 1826 | pr_warning("WARNING: NR_CPUS limit of %i reached." |
1845 | " Processor ignored.\n", NR_CPUS); | 1827 | " Processor ignored.\n", NR_CPUS); |
1846 | return; | 1828 | return; |
1847 | } | 1829 | } |
@@ -2204,7 +2186,7 @@ static int __init apic_set_verbosity(char *arg) | |||
2204 | else if (strcmp("verbose", arg) == 0) | 2186 | else if (strcmp("verbose", arg) == 0) |
2205 | apic_verbosity = APIC_VERBOSE; | 2187 | apic_verbosity = APIC_VERBOSE; |
2206 | else { | 2188 | else { |
2207 | printk(KERN_WARNING "APIC Verbosity level %s not recognised" | 2189 | pr_warning("APIC Verbosity level %s not recognised" |
2208 | " use apic=verbose or apic=debug\n", arg); | 2190 | " use apic=verbose or apic=debug\n", arg); |
2209 | return -EINVAL; | 2191 | return -EINVAL; |
2210 | } | 2192 | } |