diff options
Diffstat (limited to 'arch/x86/kernel/amd_iommu_init.c')
-rw-r--r-- | arch/x86/kernel/amd_iommu_init.c | 26 |
1 files changed, 19 insertions, 7 deletions
diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c index 238989ec077d..10b2accd12ea 100644 --- a/arch/x86/kernel/amd_iommu_init.c +++ b/arch/x86/kernel/amd_iommu_init.c | |||
@@ -260,6 +260,14 @@ static void iommu_enable(struct amd_iommu *iommu) | |||
260 | 260 | ||
261 | static void iommu_disable(struct amd_iommu *iommu) | 261 | static void iommu_disable(struct amd_iommu *iommu) |
262 | { | 262 | { |
263 | /* Disable command buffer */ | ||
264 | iommu_feature_disable(iommu, CONTROL_CMDBUF_EN); | ||
265 | |||
266 | /* Disable event logging and event interrupts */ | ||
267 | iommu_feature_disable(iommu, CONTROL_EVT_INT_EN); | ||
268 | iommu_feature_disable(iommu, CONTROL_EVT_LOG_EN); | ||
269 | |||
270 | /* Disable IOMMU hardware itself */ | ||
263 | iommu_feature_disable(iommu, CONTROL_IOMMU_EN); | 271 | iommu_feature_disable(iommu, CONTROL_IOMMU_EN); |
264 | } | 272 | } |
265 | 273 | ||
@@ -478,6 +486,10 @@ static void iommu_enable_event_buffer(struct amd_iommu *iommu) | |||
478 | memcpy_toio(iommu->mmio_base + MMIO_EVT_BUF_OFFSET, | 486 | memcpy_toio(iommu->mmio_base + MMIO_EVT_BUF_OFFSET, |
479 | &entry, sizeof(entry)); | 487 | &entry, sizeof(entry)); |
480 | 488 | ||
489 | /* set head and tail to zero manually */ | ||
490 | writel(0x00, iommu->mmio_base + MMIO_EVT_HEAD_OFFSET); | ||
491 | writel(0x00, iommu->mmio_base + MMIO_EVT_TAIL_OFFSET); | ||
492 | |||
481 | iommu_feature_enable(iommu, CONTROL_EVT_LOG_EN); | 493 | iommu_feature_enable(iommu, CONTROL_EVT_LOG_EN); |
482 | } | 494 | } |
483 | 495 | ||
@@ -1042,6 +1054,7 @@ static void enable_iommus(void) | |||
1042 | struct amd_iommu *iommu; | 1054 | struct amd_iommu *iommu; |
1043 | 1055 | ||
1044 | for_each_iommu(iommu) { | 1056 | for_each_iommu(iommu) { |
1057 | iommu_disable(iommu); | ||
1045 | iommu_set_device_table(iommu); | 1058 | iommu_set_device_table(iommu); |
1046 | iommu_enable_command_buffer(iommu); | 1059 | iommu_enable_command_buffer(iommu); |
1047 | iommu_enable_event_buffer(iommu); | 1060 | iommu_enable_event_buffer(iommu); |
@@ -1066,12 +1079,6 @@ static void disable_iommus(void) | |||
1066 | 1079 | ||
1067 | static int amd_iommu_resume(struct sys_device *dev) | 1080 | static int amd_iommu_resume(struct sys_device *dev) |
1068 | { | 1081 | { |
1069 | /* | ||
1070 | * Disable IOMMUs before reprogramming the hardware registers. | ||
1071 | * IOMMU is still enabled from the resume kernel. | ||
1072 | */ | ||
1073 | disable_iommus(); | ||
1074 | |||
1075 | /* re-load the hardware */ | 1082 | /* re-load the hardware */ |
1076 | enable_iommus(); | 1083 | enable_iommus(); |
1077 | 1084 | ||
@@ -1079,8 +1086,8 @@ static int amd_iommu_resume(struct sys_device *dev) | |||
1079 | * we have to flush after the IOMMUs are enabled because a | 1086 | * we have to flush after the IOMMUs are enabled because a |
1080 | * disabled IOMMU will never execute the commands we send | 1087 | * disabled IOMMU will never execute the commands we send |
1081 | */ | 1088 | */ |
1082 | amd_iommu_flush_all_domains(); | ||
1083 | amd_iommu_flush_all_devices(); | 1089 | amd_iommu_flush_all_devices(); |
1090 | amd_iommu_flush_all_domains(); | ||
1084 | 1091 | ||
1085 | return 0; | 1092 | return 0; |
1086 | } | 1093 | } |
@@ -1273,6 +1280,11 @@ free: | |||
1273 | goto out; | 1280 | goto out; |
1274 | } | 1281 | } |
1275 | 1282 | ||
1283 | void amd_iommu_shutdown(void) | ||
1284 | { | ||
1285 | disable_iommus(); | ||
1286 | } | ||
1287 | |||
1276 | /**************************************************************************** | 1288 | /**************************************************************************** |
1277 | * | 1289 | * |
1278 | * Early detect code. This code runs at IOMMU detection time in the DMA | 1290 | * Early detect code. This code runs at IOMMU detection time in the DMA |