diff options
Diffstat (limited to 'arch/x86/kernel/amd_iommu.c')
-rw-r--r-- | arch/x86/kernel/amd_iommu.c | 231 |
1 files changed, 218 insertions, 13 deletions
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c index f2766d84c7a0..c25210e6ac88 100644 --- a/arch/x86/kernel/amd_iommu.c +++ b/arch/x86/kernel/amd_iommu.c | |||
@@ -23,7 +23,7 @@ | |||
23 | #include <linux/scatterlist.h> | 23 | #include <linux/scatterlist.h> |
24 | #include <linux/iommu-helper.h> | 24 | #include <linux/iommu-helper.h> |
25 | #include <asm/proto.h> | 25 | #include <asm/proto.h> |
26 | #include <asm/gart.h> | 26 | #include <asm/iommu.h> |
27 | #include <asm/amd_iommu_types.h> | 27 | #include <asm/amd_iommu_types.h> |
28 | #include <asm/amd_iommu.h> | 28 | #include <asm/amd_iommu.h> |
29 | 29 | ||
@@ -32,21 +32,37 @@ | |||
32 | #define to_pages(addr, size) \ | 32 | #define to_pages(addr, size) \ |
33 | (round_up(((addr) & ~PAGE_MASK) + (size), PAGE_SIZE) >> PAGE_SHIFT) | 33 | (round_up(((addr) & ~PAGE_MASK) + (size), PAGE_SIZE) >> PAGE_SHIFT) |
34 | 34 | ||
35 | #define EXIT_LOOP_COUNT 10000000 | ||
36 | |||
35 | static DEFINE_RWLOCK(amd_iommu_devtable_lock); | 37 | static DEFINE_RWLOCK(amd_iommu_devtable_lock); |
36 | 38 | ||
37 | struct command { | 39 | /* |
40 | * general struct to manage commands send to an IOMMU | ||
41 | */ | ||
42 | struct iommu_cmd { | ||
38 | u32 data[4]; | 43 | u32 data[4]; |
39 | }; | 44 | }; |
40 | 45 | ||
41 | static int dma_ops_unity_map(struct dma_ops_domain *dma_dom, | 46 | static int dma_ops_unity_map(struct dma_ops_domain *dma_dom, |
42 | struct unity_map_entry *e); | 47 | struct unity_map_entry *e); |
43 | 48 | ||
49 | /* returns !0 if the IOMMU is caching non-present entries in its TLB */ | ||
44 | static int iommu_has_npcache(struct amd_iommu *iommu) | 50 | static int iommu_has_npcache(struct amd_iommu *iommu) |
45 | { | 51 | { |
46 | return iommu->cap & IOMMU_CAP_NPCACHE; | 52 | return iommu->cap & IOMMU_CAP_NPCACHE; |
47 | } | 53 | } |
48 | 54 | ||
49 | static int __iommu_queue_command(struct amd_iommu *iommu, struct command *cmd) | 55 | /**************************************************************************** |
56 | * | ||
57 | * IOMMU command queuing functions | ||
58 | * | ||
59 | ****************************************************************************/ | ||
60 | |||
61 | /* | ||
62 | * Writes the command to the IOMMUs command buffer and informs the | ||
63 | * hardware about the new command. Must be called with iommu->lock held. | ||
64 | */ | ||
65 | static int __iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd) | ||
50 | { | 66 | { |
51 | u32 tail, head; | 67 | u32 tail, head; |
52 | u8 *target; | 68 | u8 *target; |
@@ -63,7 +79,11 @@ static int __iommu_queue_command(struct amd_iommu *iommu, struct command *cmd) | |||
63 | return 0; | 79 | return 0; |
64 | } | 80 | } |
65 | 81 | ||
66 | static int iommu_queue_command(struct amd_iommu *iommu, struct command *cmd) | 82 | /* |
83 | * General queuing function for commands. Takes iommu->lock and calls | ||
84 | * __iommu_queue_command(). | ||
85 | */ | ||
86 | static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd) | ||
67 | { | 87 | { |
68 | unsigned long flags; | 88 | unsigned long flags; |
69 | int ret; | 89 | int ret; |
@@ -75,16 +95,24 @@ static int iommu_queue_command(struct amd_iommu *iommu, struct command *cmd) | |||
75 | return ret; | 95 | return ret; |
76 | } | 96 | } |
77 | 97 | ||
98 | /* | ||
99 | * This function is called whenever we need to ensure that the IOMMU has | ||
100 | * completed execution of all commands we sent. It sends a | ||
101 | * COMPLETION_WAIT command and waits for it to finish. The IOMMU informs | ||
102 | * us about that by writing a value to a physical address we pass with | ||
103 | * the command. | ||
104 | */ | ||
78 | static int iommu_completion_wait(struct amd_iommu *iommu) | 105 | static int iommu_completion_wait(struct amd_iommu *iommu) |
79 | { | 106 | { |
80 | int ret; | 107 | int ret; |
81 | struct command cmd; | 108 | struct iommu_cmd cmd; |
82 | volatile u64 ready = 0; | 109 | volatile u64 ready = 0; |
83 | unsigned long ready_phys = virt_to_phys(&ready); | 110 | unsigned long ready_phys = virt_to_phys(&ready); |
111 | unsigned long i = 0; | ||
84 | 112 | ||
85 | memset(&cmd, 0, sizeof(cmd)); | 113 | memset(&cmd, 0, sizeof(cmd)); |
86 | cmd.data[0] = LOW_U32(ready_phys) | CMD_COMPL_WAIT_STORE_MASK; | 114 | cmd.data[0] = LOW_U32(ready_phys) | CMD_COMPL_WAIT_STORE_MASK; |
87 | cmd.data[1] = HIGH_U32(ready_phys); | 115 | cmd.data[1] = upper_32_bits(ready_phys); |
88 | cmd.data[2] = 1; /* value written to 'ready' */ | 116 | cmd.data[2] = 1; /* value written to 'ready' */ |
89 | CMD_SET_TYPE(&cmd, CMD_COMPL_WAIT); | 117 | CMD_SET_TYPE(&cmd, CMD_COMPL_WAIT); |
90 | 118 | ||
@@ -95,15 +123,23 @@ static int iommu_completion_wait(struct amd_iommu *iommu) | |||
95 | if (ret) | 123 | if (ret) |
96 | return ret; | 124 | return ret; |
97 | 125 | ||
98 | while (!ready) | 126 | while (!ready && (i < EXIT_LOOP_COUNT)) { |
127 | ++i; | ||
99 | cpu_relax(); | 128 | cpu_relax(); |
129 | } | ||
130 | |||
131 | if (unlikely((i == EXIT_LOOP_COUNT) && printk_ratelimit())) | ||
132 | printk(KERN_WARNING "AMD IOMMU: Completion wait loop failed\n"); | ||
100 | 133 | ||
101 | return 0; | 134 | return 0; |
102 | } | 135 | } |
103 | 136 | ||
137 | /* | ||
138 | * Command send function for invalidating a device table entry | ||
139 | */ | ||
104 | static int iommu_queue_inv_dev_entry(struct amd_iommu *iommu, u16 devid) | 140 | static int iommu_queue_inv_dev_entry(struct amd_iommu *iommu, u16 devid) |
105 | { | 141 | { |
106 | struct command cmd; | 142 | struct iommu_cmd cmd; |
107 | 143 | ||
108 | BUG_ON(iommu == NULL); | 144 | BUG_ON(iommu == NULL); |
109 | 145 | ||
@@ -116,20 +152,23 @@ static int iommu_queue_inv_dev_entry(struct amd_iommu *iommu, u16 devid) | |||
116 | return iommu_queue_command(iommu, &cmd); | 152 | return iommu_queue_command(iommu, &cmd); |
117 | } | 153 | } |
118 | 154 | ||
155 | /* | ||
156 | * Generic command send function for invalidaing TLB entries | ||
157 | */ | ||
119 | static int iommu_queue_inv_iommu_pages(struct amd_iommu *iommu, | 158 | static int iommu_queue_inv_iommu_pages(struct amd_iommu *iommu, |
120 | u64 address, u16 domid, int pde, int s) | 159 | u64 address, u16 domid, int pde, int s) |
121 | { | 160 | { |
122 | struct command cmd; | 161 | struct iommu_cmd cmd; |
123 | 162 | ||
124 | memset(&cmd, 0, sizeof(cmd)); | 163 | memset(&cmd, 0, sizeof(cmd)); |
125 | address &= PAGE_MASK; | 164 | address &= PAGE_MASK; |
126 | CMD_SET_TYPE(&cmd, CMD_INV_IOMMU_PAGES); | 165 | CMD_SET_TYPE(&cmd, CMD_INV_IOMMU_PAGES); |
127 | cmd.data[1] |= domid; | 166 | cmd.data[1] |= domid; |
128 | cmd.data[2] = LOW_U32(address); | 167 | cmd.data[2] = LOW_U32(address); |
129 | cmd.data[3] = HIGH_U32(address); | 168 | cmd.data[3] = upper_32_bits(address); |
130 | if (s) | 169 | if (s) /* size bit - we flush more than one 4kb page */ |
131 | cmd.data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK; | 170 | cmd.data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK; |
132 | if (pde) | 171 | if (pde) /* PDE bit - we wan't flush everything not only the PTEs */ |
133 | cmd.data[2] |= CMD_INV_IOMMU_PAGES_PDE_MASK; | 172 | cmd.data[2] |= CMD_INV_IOMMU_PAGES_PDE_MASK; |
134 | 173 | ||
135 | iommu->need_sync = 1; | 174 | iommu->need_sync = 1; |
@@ -137,6 +176,11 @@ static int iommu_queue_inv_iommu_pages(struct amd_iommu *iommu, | |||
137 | return iommu_queue_command(iommu, &cmd); | 176 | return iommu_queue_command(iommu, &cmd); |
138 | } | 177 | } |
139 | 178 | ||
179 | /* | ||
180 | * TLB invalidation function which is called from the mapping functions. | ||
181 | * It invalidates a single PTE if the range to flush is within a single | ||
182 | * page. Otherwise it flushes the whole TLB of the IOMMU. | ||
183 | */ | ||
140 | static int iommu_flush_pages(struct amd_iommu *iommu, u16 domid, | 184 | static int iommu_flush_pages(struct amd_iommu *iommu, u16 domid, |
141 | u64 address, size_t size) | 185 | u64 address, size_t size) |
142 | { | 186 | { |
@@ -159,6 +203,20 @@ static int iommu_flush_pages(struct amd_iommu *iommu, u16 domid, | |||
159 | return 0; | 203 | return 0; |
160 | } | 204 | } |
161 | 205 | ||
206 | /**************************************************************************** | ||
207 | * | ||
208 | * The functions below are used the create the page table mappings for | ||
209 | * unity mapped regions. | ||
210 | * | ||
211 | ****************************************************************************/ | ||
212 | |||
213 | /* | ||
214 | * Generic mapping functions. It maps a physical address into a DMA | ||
215 | * address space. It allocates the page table pages if necessary. | ||
216 | * In the future it can be extended to a generic mapping function | ||
217 | * supporting all features of AMD IOMMU page tables like level skipping | ||
218 | * and full 64 bit address spaces. | ||
219 | */ | ||
162 | static int iommu_map(struct protection_domain *dom, | 220 | static int iommu_map(struct protection_domain *dom, |
163 | unsigned long bus_addr, | 221 | unsigned long bus_addr, |
164 | unsigned long phys_addr, | 222 | unsigned long phys_addr, |
@@ -209,6 +267,10 @@ static int iommu_map(struct protection_domain *dom, | |||
209 | return 0; | 267 | return 0; |
210 | } | 268 | } |
211 | 269 | ||
270 | /* | ||
271 | * This function checks if a specific unity mapping entry is needed for | ||
272 | * this specific IOMMU. | ||
273 | */ | ||
212 | static int iommu_for_unity_map(struct amd_iommu *iommu, | 274 | static int iommu_for_unity_map(struct amd_iommu *iommu, |
213 | struct unity_map_entry *entry) | 275 | struct unity_map_entry *entry) |
214 | { | 276 | { |
@@ -223,6 +285,12 @@ static int iommu_for_unity_map(struct amd_iommu *iommu, | |||
223 | return 0; | 285 | return 0; |
224 | } | 286 | } |
225 | 287 | ||
288 | /* | ||
289 | * Init the unity mappings for a specific IOMMU in the system | ||
290 | * | ||
291 | * Basically iterates over all unity mapping entries and applies them to | ||
292 | * the default domain DMA of that IOMMU if necessary. | ||
293 | */ | ||
226 | static int iommu_init_unity_mappings(struct amd_iommu *iommu) | 294 | static int iommu_init_unity_mappings(struct amd_iommu *iommu) |
227 | { | 295 | { |
228 | struct unity_map_entry *entry; | 296 | struct unity_map_entry *entry; |
@@ -239,6 +307,10 @@ static int iommu_init_unity_mappings(struct amd_iommu *iommu) | |||
239 | return 0; | 307 | return 0; |
240 | } | 308 | } |
241 | 309 | ||
310 | /* | ||
311 | * This function actually applies the mapping to the page table of the | ||
312 | * dma_ops domain. | ||
313 | */ | ||
242 | static int dma_ops_unity_map(struct dma_ops_domain *dma_dom, | 314 | static int dma_ops_unity_map(struct dma_ops_domain *dma_dom, |
243 | struct unity_map_entry *e) | 315 | struct unity_map_entry *e) |
244 | { | 316 | { |
@@ -261,6 +333,9 @@ static int dma_ops_unity_map(struct dma_ops_domain *dma_dom, | |||
261 | return 0; | 333 | return 0; |
262 | } | 334 | } |
263 | 335 | ||
336 | /* | ||
337 | * Inits the unity mappings required for a specific device | ||
338 | */ | ||
264 | static int init_unity_mappings_for_device(struct dma_ops_domain *dma_dom, | 339 | static int init_unity_mappings_for_device(struct dma_ops_domain *dma_dom, |
265 | u16 devid) | 340 | u16 devid) |
266 | { | 341 | { |
@@ -278,12 +353,26 @@ static int init_unity_mappings_for_device(struct dma_ops_domain *dma_dom, | |||
278 | return 0; | 353 | return 0; |
279 | } | 354 | } |
280 | 355 | ||
356 | /**************************************************************************** | ||
357 | * | ||
358 | * The next functions belong to the address allocator for the dma_ops | ||
359 | * interface functions. They work like the allocators in the other IOMMU | ||
360 | * drivers. Its basically a bitmap which marks the allocated pages in | ||
361 | * the aperture. Maybe it could be enhanced in the future to a more | ||
362 | * efficient allocator. | ||
363 | * | ||
364 | ****************************************************************************/ | ||
281 | static unsigned long dma_mask_to_pages(unsigned long mask) | 365 | static unsigned long dma_mask_to_pages(unsigned long mask) |
282 | { | 366 | { |
283 | return (mask >> PAGE_SHIFT) + | 367 | return (mask >> PAGE_SHIFT) + |
284 | (PAGE_ALIGN(mask & ~PAGE_MASK) >> PAGE_SHIFT); | 368 | (PAGE_ALIGN(mask & ~PAGE_MASK) >> PAGE_SHIFT); |
285 | } | 369 | } |
286 | 370 | ||
371 | /* | ||
372 | * The address allocator core function. | ||
373 | * | ||
374 | * called with domain->lock held | ||
375 | */ | ||
287 | static unsigned long dma_ops_alloc_addresses(struct device *dev, | 376 | static unsigned long dma_ops_alloc_addresses(struct device *dev, |
288 | struct dma_ops_domain *dom, | 377 | struct dma_ops_domain *dom, |
289 | unsigned int pages) | 378 | unsigned int pages) |
@@ -317,6 +406,11 @@ static unsigned long dma_ops_alloc_addresses(struct device *dev, | |||
317 | return address; | 406 | return address; |
318 | } | 407 | } |
319 | 408 | ||
409 | /* | ||
410 | * The address free function. | ||
411 | * | ||
412 | * called with domain->lock held | ||
413 | */ | ||
320 | static void dma_ops_free_addresses(struct dma_ops_domain *dom, | 414 | static void dma_ops_free_addresses(struct dma_ops_domain *dom, |
321 | unsigned long address, | 415 | unsigned long address, |
322 | unsigned int pages) | 416 | unsigned int pages) |
@@ -325,6 +419,16 @@ static void dma_ops_free_addresses(struct dma_ops_domain *dom, | |||
325 | iommu_area_free(dom->bitmap, address, pages); | 419 | iommu_area_free(dom->bitmap, address, pages); |
326 | } | 420 | } |
327 | 421 | ||
422 | /**************************************************************************** | ||
423 | * | ||
424 | * The next functions belong to the domain allocation. A domain is | ||
425 | * allocated for every IOMMU as the default domain. If device isolation | ||
426 | * is enabled, every device get its own domain. The most important thing | ||
427 | * about domains is the page table mapping the DMA address space they | ||
428 | * contain. | ||
429 | * | ||
430 | ****************************************************************************/ | ||
431 | |||
328 | static u16 domain_id_alloc(void) | 432 | static u16 domain_id_alloc(void) |
329 | { | 433 | { |
330 | unsigned long flags; | 434 | unsigned long flags; |
@@ -342,6 +446,10 @@ static u16 domain_id_alloc(void) | |||
342 | return id; | 446 | return id; |
343 | } | 447 | } |
344 | 448 | ||
449 | /* | ||
450 | * Used to reserve address ranges in the aperture (e.g. for exclusion | ||
451 | * ranges. | ||
452 | */ | ||
345 | static void dma_ops_reserve_addresses(struct dma_ops_domain *dom, | 453 | static void dma_ops_reserve_addresses(struct dma_ops_domain *dom, |
346 | unsigned long start_page, | 454 | unsigned long start_page, |
347 | unsigned int pages) | 455 | unsigned int pages) |
@@ -382,6 +490,10 @@ static void dma_ops_free_pagetable(struct dma_ops_domain *dma_dom) | |||
382 | free_page((unsigned long)p1); | 490 | free_page((unsigned long)p1); |
383 | } | 491 | } |
384 | 492 | ||
493 | /* | ||
494 | * Free a domain, only used if something went wrong in the | ||
495 | * allocation path and we need to free an already allocated page table | ||
496 | */ | ||
385 | static void dma_ops_domain_free(struct dma_ops_domain *dom) | 497 | static void dma_ops_domain_free(struct dma_ops_domain *dom) |
386 | { | 498 | { |
387 | if (!dom) | 499 | if (!dom) |
@@ -396,6 +508,11 @@ static void dma_ops_domain_free(struct dma_ops_domain *dom) | |||
396 | kfree(dom); | 508 | kfree(dom); |
397 | } | 509 | } |
398 | 510 | ||
511 | /* | ||
512 | * Allocates a new protection domain usable for the dma_ops functions. | ||
513 | * It also intializes the page table and the address allocator data | ||
514 | * structures required for the dma_ops interface | ||
515 | */ | ||
399 | static struct dma_ops_domain *dma_ops_domain_alloc(struct amd_iommu *iommu, | 516 | static struct dma_ops_domain *dma_ops_domain_alloc(struct amd_iommu *iommu, |
400 | unsigned order) | 517 | unsigned order) |
401 | { | 518 | { |
@@ -436,6 +553,7 @@ static struct dma_ops_domain *dma_ops_domain_alloc(struct amd_iommu *iommu, | |||
436 | dma_dom->bitmap[0] = 1; | 553 | dma_dom->bitmap[0] = 1; |
437 | dma_dom->next_bit = 0; | 554 | dma_dom->next_bit = 0; |
438 | 555 | ||
556 | /* Intialize the exclusion range if necessary */ | ||
439 | if (iommu->exclusion_start && | 557 | if (iommu->exclusion_start && |
440 | iommu->exclusion_start < dma_dom->aperture_size) { | 558 | iommu->exclusion_start < dma_dom->aperture_size) { |
441 | unsigned long startpage = iommu->exclusion_start >> PAGE_SHIFT; | 559 | unsigned long startpage = iommu->exclusion_start >> PAGE_SHIFT; |
@@ -444,6 +562,11 @@ static struct dma_ops_domain *dma_ops_domain_alloc(struct amd_iommu *iommu, | |||
444 | dma_ops_reserve_addresses(dma_dom, startpage, pages); | 562 | dma_ops_reserve_addresses(dma_dom, startpage, pages); |
445 | } | 563 | } |
446 | 564 | ||
565 | /* | ||
566 | * At the last step, build the page tables so we don't need to | ||
567 | * allocate page table pages in the dma_ops mapping/unmapping | ||
568 | * path. | ||
569 | */ | ||
447 | num_pte_pages = dma_dom->aperture_size / (PAGE_SIZE * 512); | 570 | num_pte_pages = dma_dom->aperture_size / (PAGE_SIZE * 512); |
448 | dma_dom->pte_pages = kzalloc(num_pte_pages * sizeof(void *), | 571 | dma_dom->pte_pages = kzalloc(num_pte_pages * sizeof(void *), |
449 | GFP_KERNEL); | 572 | GFP_KERNEL); |
@@ -472,6 +595,10 @@ free_dma_dom: | |||
472 | return NULL; | 595 | return NULL; |
473 | } | 596 | } |
474 | 597 | ||
598 | /* | ||
599 | * Find out the protection domain structure for a given PCI device. This | ||
600 | * will give us the pointer to the page table root for example. | ||
601 | */ | ||
475 | static struct protection_domain *domain_for_device(u16 devid) | 602 | static struct protection_domain *domain_for_device(u16 devid) |
476 | { | 603 | { |
477 | struct protection_domain *dom; | 604 | struct protection_domain *dom; |
@@ -484,6 +611,10 @@ static struct protection_domain *domain_for_device(u16 devid) | |||
484 | return dom; | 611 | return dom; |
485 | } | 612 | } |
486 | 613 | ||
614 | /* | ||
615 | * If a device is not yet associated with a domain, this function does | ||
616 | * assigns it visible for the hardware | ||
617 | */ | ||
487 | static void set_device_domain(struct amd_iommu *iommu, | 618 | static void set_device_domain(struct amd_iommu *iommu, |
488 | struct protection_domain *domain, | 619 | struct protection_domain *domain, |
489 | u16 devid) | 620 | u16 devid) |
@@ -508,6 +639,19 @@ static void set_device_domain(struct amd_iommu *iommu, | |||
508 | iommu->need_sync = 1; | 639 | iommu->need_sync = 1; |
509 | } | 640 | } |
510 | 641 | ||
642 | /***************************************************************************** | ||
643 | * | ||
644 | * The next functions belong to the dma_ops mapping/unmapping code. | ||
645 | * | ||
646 | *****************************************************************************/ | ||
647 | |||
648 | /* | ||
649 | * In the dma_ops path we only have the struct device. This function | ||
650 | * finds the corresponding IOMMU, the protection domain and the | ||
651 | * requestor id for a given device. | ||
652 | * If the device is not yet associated with a domain this is also done | ||
653 | * in this function. | ||
654 | */ | ||
511 | static int get_device_resources(struct device *dev, | 655 | static int get_device_resources(struct device *dev, |
512 | struct amd_iommu **iommu, | 656 | struct amd_iommu **iommu, |
513 | struct protection_domain **domain, | 657 | struct protection_domain **domain, |
@@ -520,8 +664,9 @@ static int get_device_resources(struct device *dev, | |||
520 | BUG_ON(!dev || dev->bus != &pci_bus_type || !dev->dma_mask); | 664 | BUG_ON(!dev || dev->bus != &pci_bus_type || !dev->dma_mask); |
521 | 665 | ||
522 | pcidev = to_pci_dev(dev); | 666 | pcidev = to_pci_dev(dev); |
523 | _bdf = (pcidev->bus->number << 8) | pcidev->devfn; | 667 | _bdf = calc_devid(pcidev->bus->number, pcidev->devfn); |
524 | 668 | ||
669 | /* device not translated by any IOMMU in the system? */ | ||
525 | if (_bdf >= amd_iommu_last_bdf) { | 670 | if (_bdf >= amd_iommu_last_bdf) { |
526 | *iommu = NULL; | 671 | *iommu = NULL; |
527 | *domain = NULL; | 672 | *domain = NULL; |
@@ -547,6 +692,10 @@ static int get_device_resources(struct device *dev, | |||
547 | return 1; | 692 | return 1; |
548 | } | 693 | } |
549 | 694 | ||
695 | /* | ||
696 | * This is the generic map function. It maps one 4kb page at paddr to | ||
697 | * the given address in the DMA address space for the domain. | ||
698 | */ | ||
550 | static dma_addr_t dma_ops_domain_map(struct amd_iommu *iommu, | 699 | static dma_addr_t dma_ops_domain_map(struct amd_iommu *iommu, |
551 | struct dma_ops_domain *dom, | 700 | struct dma_ops_domain *dom, |
552 | unsigned long address, | 701 | unsigned long address, |
@@ -578,6 +727,9 @@ static dma_addr_t dma_ops_domain_map(struct amd_iommu *iommu, | |||
578 | return (dma_addr_t)address; | 727 | return (dma_addr_t)address; |
579 | } | 728 | } |
580 | 729 | ||
730 | /* | ||
731 | * The generic unmapping function for on page in the DMA address space. | ||
732 | */ | ||
581 | static void dma_ops_domain_unmap(struct amd_iommu *iommu, | 733 | static void dma_ops_domain_unmap(struct amd_iommu *iommu, |
582 | struct dma_ops_domain *dom, | 734 | struct dma_ops_domain *dom, |
583 | unsigned long address) | 735 | unsigned long address) |
@@ -597,6 +749,12 @@ static void dma_ops_domain_unmap(struct amd_iommu *iommu, | |||
597 | *pte = 0ULL; | 749 | *pte = 0ULL; |
598 | } | 750 | } |
599 | 751 | ||
752 | /* | ||
753 | * This function contains common code for mapping of a physically | ||
754 | * contiguous memory region into DMA address space. It is uses by all | ||
755 | * mapping functions provided by this IOMMU driver. | ||
756 | * Must be called with the domain lock held. | ||
757 | */ | ||
600 | static dma_addr_t __map_single(struct device *dev, | 758 | static dma_addr_t __map_single(struct device *dev, |
601 | struct amd_iommu *iommu, | 759 | struct amd_iommu *iommu, |
602 | struct dma_ops_domain *dma_dom, | 760 | struct dma_ops_domain *dma_dom, |
@@ -628,6 +786,10 @@ out: | |||
628 | return address; | 786 | return address; |
629 | } | 787 | } |
630 | 788 | ||
789 | /* | ||
790 | * Does the reverse of the __map_single function. Must be called with | ||
791 | * the domain lock held too | ||
792 | */ | ||
631 | static void __unmap_single(struct amd_iommu *iommu, | 793 | static void __unmap_single(struct amd_iommu *iommu, |
632 | struct dma_ops_domain *dma_dom, | 794 | struct dma_ops_domain *dma_dom, |
633 | dma_addr_t dma_addr, | 795 | dma_addr_t dma_addr, |
@@ -652,6 +814,9 @@ static void __unmap_single(struct amd_iommu *iommu, | |||
652 | dma_ops_free_addresses(dma_dom, dma_addr, pages); | 814 | dma_ops_free_addresses(dma_dom, dma_addr, pages); |
653 | } | 815 | } |
654 | 816 | ||
817 | /* | ||
818 | * The exported map_single function for dma_ops. | ||
819 | */ | ||
655 | static dma_addr_t map_single(struct device *dev, phys_addr_t paddr, | 820 | static dma_addr_t map_single(struct device *dev, phys_addr_t paddr, |
656 | size_t size, int dir) | 821 | size_t size, int dir) |
657 | { | 822 | { |
@@ -664,6 +829,7 @@ static dma_addr_t map_single(struct device *dev, phys_addr_t paddr, | |||
664 | get_device_resources(dev, &iommu, &domain, &devid); | 829 | get_device_resources(dev, &iommu, &domain, &devid); |
665 | 830 | ||
666 | if (iommu == NULL || domain == NULL) | 831 | if (iommu == NULL || domain == NULL) |
832 | /* device not handled by any AMD IOMMU */ | ||
667 | return (dma_addr_t)paddr; | 833 | return (dma_addr_t)paddr; |
668 | 834 | ||
669 | spin_lock_irqsave(&domain->lock, flags); | 835 | spin_lock_irqsave(&domain->lock, flags); |
@@ -683,6 +849,9 @@ out: | |||
683 | return addr; | 849 | return addr; |
684 | } | 850 | } |
685 | 851 | ||
852 | /* | ||
853 | * The exported unmap_single function for dma_ops. | ||
854 | */ | ||
686 | static void unmap_single(struct device *dev, dma_addr_t dma_addr, | 855 | static void unmap_single(struct device *dev, dma_addr_t dma_addr, |
687 | size_t size, int dir) | 856 | size_t size, int dir) |
688 | { | 857 | { |
@@ -692,6 +861,7 @@ static void unmap_single(struct device *dev, dma_addr_t dma_addr, | |||
692 | u16 devid; | 861 | u16 devid; |
693 | 862 | ||
694 | if (!get_device_resources(dev, &iommu, &domain, &devid)) | 863 | if (!get_device_resources(dev, &iommu, &domain, &devid)) |
864 | /* device not handled by any AMD IOMMU */ | ||
695 | return; | 865 | return; |
696 | 866 | ||
697 | spin_lock_irqsave(&domain->lock, flags); | 867 | spin_lock_irqsave(&domain->lock, flags); |
@@ -706,6 +876,10 @@ static void unmap_single(struct device *dev, dma_addr_t dma_addr, | |||
706 | spin_unlock_irqrestore(&domain->lock, flags); | 876 | spin_unlock_irqrestore(&domain->lock, flags); |
707 | } | 877 | } |
708 | 878 | ||
879 | /* | ||
880 | * This is a special map_sg function which is used if we should map a | ||
881 | * device which is not handled by an AMD IOMMU in the system. | ||
882 | */ | ||
709 | static int map_sg_no_iommu(struct device *dev, struct scatterlist *sglist, | 883 | static int map_sg_no_iommu(struct device *dev, struct scatterlist *sglist, |
710 | int nelems, int dir) | 884 | int nelems, int dir) |
711 | { | 885 | { |
@@ -720,6 +894,10 @@ static int map_sg_no_iommu(struct device *dev, struct scatterlist *sglist, | |||
720 | return nelems; | 894 | return nelems; |
721 | } | 895 | } |
722 | 896 | ||
897 | /* | ||
898 | * The exported map_sg function for dma_ops (handles scatter-gather | ||
899 | * lists). | ||
900 | */ | ||
723 | static int map_sg(struct device *dev, struct scatterlist *sglist, | 901 | static int map_sg(struct device *dev, struct scatterlist *sglist, |
724 | int nelems, int dir) | 902 | int nelems, int dir) |
725 | { | 903 | { |
@@ -775,6 +953,10 @@ unmap: | |||
775 | goto out; | 953 | goto out; |
776 | } | 954 | } |
777 | 955 | ||
956 | /* | ||
957 | * The exported map_sg function for dma_ops (handles scatter-gather | ||
958 | * lists). | ||
959 | */ | ||
778 | static void unmap_sg(struct device *dev, struct scatterlist *sglist, | 960 | static void unmap_sg(struct device *dev, struct scatterlist *sglist, |
779 | int nelems, int dir) | 961 | int nelems, int dir) |
780 | { | 962 | { |
@@ -804,6 +986,9 @@ static void unmap_sg(struct device *dev, struct scatterlist *sglist, | |||
804 | spin_unlock_irqrestore(&domain->lock, flags); | 986 | spin_unlock_irqrestore(&domain->lock, flags); |
805 | } | 987 | } |
806 | 988 | ||
989 | /* | ||
990 | * The exported alloc_coherent function for dma_ops. | ||
991 | */ | ||
807 | static void *alloc_coherent(struct device *dev, size_t size, | 992 | static void *alloc_coherent(struct device *dev, size_t size, |
808 | dma_addr_t *dma_addr, gfp_t flag) | 993 | dma_addr_t *dma_addr, gfp_t flag) |
809 | { | 994 | { |
@@ -851,6 +1036,11 @@ out: | |||
851 | return virt_addr; | 1036 | return virt_addr; |
852 | } | 1037 | } |
853 | 1038 | ||
1039 | /* | ||
1040 | * The exported free_coherent function for dma_ops. | ||
1041 | * FIXME: fix the generic x86 DMA layer so that it actually calls that | ||
1042 | * function. | ||
1043 | */ | ||
854 | static void free_coherent(struct device *dev, size_t size, | 1044 | static void free_coherent(struct device *dev, size_t size, |
855 | void *virt_addr, dma_addr_t dma_addr) | 1045 | void *virt_addr, dma_addr_t dma_addr) |
856 | { | 1046 | { |
@@ -879,6 +1069,8 @@ free_mem: | |||
879 | } | 1069 | } |
880 | 1070 | ||
881 | /* | 1071 | /* |
1072 | * The function for pre-allocating protection domains. | ||
1073 | * | ||
882 | * If the driver core informs the DMA layer if a driver grabs a device | 1074 | * If the driver core informs the DMA layer if a driver grabs a device |
883 | * we don't need to preallocate the protection domains anymore. | 1075 | * we don't need to preallocate the protection domains anymore. |
884 | * For now we have to. | 1076 | * For now we have to. |
@@ -921,12 +1113,20 @@ static struct dma_mapping_ops amd_iommu_dma_ops = { | |||
921 | .unmap_sg = unmap_sg, | 1113 | .unmap_sg = unmap_sg, |
922 | }; | 1114 | }; |
923 | 1115 | ||
1116 | /* | ||
1117 | * The function which clues the AMD IOMMU driver into dma_ops. | ||
1118 | */ | ||
924 | int __init amd_iommu_init_dma_ops(void) | 1119 | int __init amd_iommu_init_dma_ops(void) |
925 | { | 1120 | { |
926 | struct amd_iommu *iommu; | 1121 | struct amd_iommu *iommu; |
927 | int order = amd_iommu_aperture_order; | 1122 | int order = amd_iommu_aperture_order; |
928 | int ret; | 1123 | int ret; |
929 | 1124 | ||
1125 | /* | ||
1126 | * first allocate a default protection domain for every IOMMU we | ||
1127 | * found in the system. Devices not assigned to any other | ||
1128 | * protection domain will be assigned to the default one. | ||
1129 | */ | ||
930 | list_for_each_entry(iommu, &amd_iommu_list, list) { | 1130 | list_for_each_entry(iommu, &amd_iommu_list, list) { |
931 | iommu->default_dom = dma_ops_domain_alloc(iommu, order); | 1131 | iommu->default_dom = dma_ops_domain_alloc(iommu, order); |
932 | if (iommu->default_dom == NULL) | 1132 | if (iommu->default_dom == NULL) |
@@ -936,6 +1136,10 @@ int __init amd_iommu_init_dma_ops(void) | |||
936 | goto free_domains; | 1136 | goto free_domains; |
937 | } | 1137 | } |
938 | 1138 | ||
1139 | /* | ||
1140 | * If device isolation is enabled, pre-allocate the protection | ||
1141 | * domains for each device. | ||
1142 | */ | ||
939 | if (amd_iommu_isolate) | 1143 | if (amd_iommu_isolate) |
940 | prealloc_protection_domains(); | 1144 | prealloc_protection_domains(); |
941 | 1145 | ||
@@ -947,6 +1151,7 @@ int __init amd_iommu_init_dma_ops(void) | |||
947 | gart_iommu_aperture = 0; | 1151 | gart_iommu_aperture = 0; |
948 | #endif | 1152 | #endif |
949 | 1153 | ||
1154 | /* Make the driver finally visible to the drivers */ | ||
950 | dma_ops = &amd_iommu_dma_ops; | 1155 | dma_ops = &amd_iommu_dma_ops; |
951 | 1156 | ||
952 | return 0; | 1157 | return 0; |