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Diffstat (limited to 'arch/x86/kernel/amd_iommu.c')
-rw-r--r--arch/x86/kernel/amd_iommu.c36
1 files changed, 16 insertions, 20 deletions
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c
index e4899e0e8787..5662e226b0c9 100644
--- a/arch/x86/kernel/amd_iommu.c
+++ b/arch/x86/kernel/amd_iommu.c
@@ -187,6 +187,8 @@ static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd)
187 187
188 spin_lock_irqsave(&iommu->lock, flags); 188 spin_lock_irqsave(&iommu->lock, flags);
189 ret = __iommu_queue_command(iommu, cmd); 189 ret = __iommu_queue_command(iommu, cmd);
190 if (!ret)
191 iommu->need_sync = 1;
190 spin_unlock_irqrestore(&iommu->lock, flags); 192 spin_unlock_irqrestore(&iommu->lock, flags);
191 193
192 return ret; 194 return ret;
@@ -210,10 +212,13 @@ static int iommu_completion_wait(struct amd_iommu *iommu)
210 cmd.data[0] = CMD_COMPL_WAIT_INT_MASK; 212 cmd.data[0] = CMD_COMPL_WAIT_INT_MASK;
211 CMD_SET_TYPE(&cmd, CMD_COMPL_WAIT); 213 CMD_SET_TYPE(&cmd, CMD_COMPL_WAIT);
212 214
213 iommu->need_sync = 0;
214
215 spin_lock_irqsave(&iommu->lock, flags); 215 spin_lock_irqsave(&iommu->lock, flags);
216 216
217 if (!iommu->need_sync)
218 goto out;
219
220 iommu->need_sync = 0;
221
217 ret = __iommu_queue_command(iommu, &cmd); 222 ret = __iommu_queue_command(iommu, &cmd);
218 223
219 if (ret) 224 if (ret)
@@ -254,8 +259,6 @@ static int iommu_queue_inv_dev_entry(struct amd_iommu *iommu, u16 devid)
254 259
255 ret = iommu_queue_command(iommu, &cmd); 260 ret = iommu_queue_command(iommu, &cmd);
256 261
257 iommu->need_sync = 1;
258
259 return ret; 262 return ret;
260} 263}
261 264
@@ -281,8 +284,6 @@ static int iommu_queue_inv_iommu_pages(struct amd_iommu *iommu,
281 284
282 ret = iommu_queue_command(iommu, &cmd); 285 ret = iommu_queue_command(iommu, &cmd);
283 286
284 iommu->need_sync = 1;
285
286 return ret; 287 return ret;
287} 288}
288 289
@@ -762,8 +763,6 @@ static void set_device_domain(struct amd_iommu *iommu,
762 write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); 763 write_unlock_irqrestore(&amd_iommu_devtable_lock, flags);
763 764
764 iommu_queue_inv_dev_entry(iommu, devid); 765 iommu_queue_inv_dev_entry(iommu, devid);
765
766 iommu->need_sync = 1;
767} 766}
768 767
769/***************************************************************************** 768/*****************************************************************************
@@ -858,6 +857,9 @@ static int get_device_resources(struct device *dev,
858 print_devid(_bdf, 1); 857 print_devid(_bdf, 1);
859 } 858 }
860 859
860 if (domain_for_device(_bdf) == NULL)
861 set_device_domain(*iommu, *domain, _bdf);
862
861 return 1; 863 return 1;
862} 864}
863 865
@@ -1031,8 +1033,7 @@ static dma_addr_t map_single(struct device *dev, phys_addr_t paddr,
1031 if (addr == bad_dma_address) 1033 if (addr == bad_dma_address)
1032 goto out; 1034 goto out;
1033 1035
1034 if (unlikely(iommu->need_sync)) 1036 iommu_completion_wait(iommu);
1035 iommu_completion_wait(iommu);
1036 1037
1037out: 1038out:
1038 spin_unlock_irqrestore(&domain->lock, flags); 1039 spin_unlock_irqrestore(&domain->lock, flags);
@@ -1060,8 +1061,7 @@ static void unmap_single(struct device *dev, dma_addr_t dma_addr,
1060 1061
1061 __unmap_single(iommu, domain->priv, dma_addr, size, dir); 1062 __unmap_single(iommu, domain->priv, dma_addr, size, dir);
1062 1063
1063 if (unlikely(iommu->need_sync)) 1064 iommu_completion_wait(iommu);
1064 iommu_completion_wait(iommu);
1065 1065
1066 spin_unlock_irqrestore(&domain->lock, flags); 1066 spin_unlock_irqrestore(&domain->lock, flags);
1067} 1067}
@@ -1127,8 +1127,7 @@ static int map_sg(struct device *dev, struct scatterlist *sglist,
1127 goto unmap; 1127 goto unmap;
1128 } 1128 }
1129 1129
1130 if (unlikely(iommu->need_sync)) 1130 iommu_completion_wait(iommu);
1131 iommu_completion_wait(iommu);
1132 1131
1133out: 1132out:
1134 spin_unlock_irqrestore(&domain->lock, flags); 1133 spin_unlock_irqrestore(&domain->lock, flags);
@@ -1173,8 +1172,7 @@ static void unmap_sg(struct device *dev, struct scatterlist *sglist,
1173 s->dma_address = s->dma_length = 0; 1172 s->dma_address = s->dma_length = 0;
1174 } 1173 }
1175 1174
1176 if (unlikely(iommu->need_sync)) 1175 iommu_completion_wait(iommu);
1177 iommu_completion_wait(iommu);
1178 1176
1179 spin_unlock_irqrestore(&domain->lock, flags); 1177 spin_unlock_irqrestore(&domain->lock, flags);
1180} 1178}
@@ -1225,8 +1223,7 @@ static void *alloc_coherent(struct device *dev, size_t size,
1225 goto out; 1223 goto out;
1226 } 1224 }
1227 1225
1228 if (unlikely(iommu->need_sync)) 1226 iommu_completion_wait(iommu);
1229 iommu_completion_wait(iommu);
1230 1227
1231out: 1228out:
1232 spin_unlock_irqrestore(&domain->lock, flags); 1229 spin_unlock_irqrestore(&domain->lock, flags);
@@ -1257,8 +1254,7 @@ static void free_coherent(struct device *dev, size_t size,
1257 1254
1258 __unmap_single(iommu, domain->priv, dma_addr, size, DMA_BIDIRECTIONAL); 1255 __unmap_single(iommu, domain->priv, dma_addr, size, DMA_BIDIRECTIONAL);
1259 1256
1260 if (unlikely(iommu->need_sync)) 1257 iommu_completion_wait(iommu);
1261 iommu_completion_wait(iommu);
1262 1258
1263 spin_unlock_irqrestore(&domain->lock, flags); 1259 spin_unlock_irqrestore(&domain->lock, flags);
1264 1260