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Diffstat (limited to 'arch/x86/kernel/amd_iommu.c')
-rw-r--r--arch/x86/kernel/amd_iommu.c54
1 files changed, 26 insertions, 28 deletions
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c
index e4899e0e8787..0a60d60ed036 100644
--- a/arch/x86/kernel/amd_iommu.c
+++ b/arch/x86/kernel/amd_iommu.c
@@ -187,6 +187,8 @@ static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd)
187 187
188 spin_lock_irqsave(&iommu->lock, flags); 188 spin_lock_irqsave(&iommu->lock, flags);
189 ret = __iommu_queue_command(iommu, cmd); 189 ret = __iommu_queue_command(iommu, cmd);
190 if (!ret)
191 iommu->need_sync = 1;
190 spin_unlock_irqrestore(&iommu->lock, flags); 192 spin_unlock_irqrestore(&iommu->lock, flags);
191 193
192 return ret; 194 return ret;
@@ -210,10 +212,13 @@ static int iommu_completion_wait(struct amd_iommu *iommu)
210 cmd.data[0] = CMD_COMPL_WAIT_INT_MASK; 212 cmd.data[0] = CMD_COMPL_WAIT_INT_MASK;
211 CMD_SET_TYPE(&cmd, CMD_COMPL_WAIT); 213 CMD_SET_TYPE(&cmd, CMD_COMPL_WAIT);
212 214
213 iommu->need_sync = 0;
214
215 spin_lock_irqsave(&iommu->lock, flags); 215 spin_lock_irqsave(&iommu->lock, flags);
216 216
217 if (!iommu->need_sync)
218 goto out;
219
220 iommu->need_sync = 0;
221
217 ret = __iommu_queue_command(iommu, &cmd); 222 ret = __iommu_queue_command(iommu, &cmd);
218 223
219 if (ret) 224 if (ret)
@@ -230,8 +235,9 @@ static int iommu_completion_wait(struct amd_iommu *iommu)
230 status &= ~MMIO_STATUS_COM_WAIT_INT_MASK; 235 status &= ~MMIO_STATUS_COM_WAIT_INT_MASK;
231 writel(status, iommu->mmio_base + MMIO_STATUS_OFFSET); 236 writel(status, iommu->mmio_base + MMIO_STATUS_OFFSET);
232 237
233 if (unlikely((i == EXIT_LOOP_COUNT) && printk_ratelimit())) 238 if (unlikely(i == EXIT_LOOP_COUNT))
234 printk(KERN_WARNING "AMD IOMMU: Completion wait loop failed\n"); 239 panic("AMD IOMMU: Completion wait loop failed\n");
240
235out: 241out:
236 spin_unlock_irqrestore(&iommu->lock, flags); 242 spin_unlock_irqrestore(&iommu->lock, flags);
237 243
@@ -254,8 +260,6 @@ static int iommu_queue_inv_dev_entry(struct amd_iommu *iommu, u16 devid)
254 260
255 ret = iommu_queue_command(iommu, &cmd); 261 ret = iommu_queue_command(iommu, &cmd);
256 262
257 iommu->need_sync = 1;
258
259 return ret; 263 return ret;
260} 264}
261 265
@@ -281,8 +285,6 @@ static int iommu_queue_inv_iommu_pages(struct amd_iommu *iommu,
281 285
282 ret = iommu_queue_command(iommu, &cmd); 286 ret = iommu_queue_command(iommu, &cmd);
283 287
284 iommu->need_sync = 1;
285
286 return ret; 288 return ret;
287} 289}
288 290
@@ -343,7 +345,7 @@ static int iommu_map(struct protection_domain *dom,
343 u64 __pte, *pte, *page; 345 u64 __pte, *pte, *page;
344 346
345 bus_addr = PAGE_ALIGN(bus_addr); 347 bus_addr = PAGE_ALIGN(bus_addr);
346 phys_addr = PAGE_ALIGN(bus_addr); 348 phys_addr = PAGE_ALIGN(phys_addr);
347 349
348 /* only support 512GB address spaces for now */ 350 /* only support 512GB address spaces for now */
349 if (bus_addr > IOMMU_MAP_SIZE_L3 || !(prot & IOMMU_PROT_MASK)) 351 if (bus_addr > IOMMU_MAP_SIZE_L3 || !(prot & IOMMU_PROT_MASK))
@@ -599,7 +601,7 @@ static void dma_ops_free_pagetable(struct dma_ops_domain *dma_dom)
599 continue; 601 continue;
600 602
601 p2 = IOMMU_PTE_PAGE(p1[i]); 603 p2 = IOMMU_PTE_PAGE(p1[i]);
602 for (j = 0; j < 512; ++i) { 604 for (j = 0; j < 512; ++j) {
603 if (!IOMMU_PTE_PRESENT(p2[j])) 605 if (!IOMMU_PTE_PRESENT(p2[j]))
604 continue; 606 continue;
605 p3 = IOMMU_PTE_PAGE(p2[j]); 607 p3 = IOMMU_PTE_PAGE(p2[j]);
@@ -762,8 +764,6 @@ static void set_device_domain(struct amd_iommu *iommu,
762 write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); 764 write_unlock_irqrestore(&amd_iommu_devtable_lock, flags);
763 765
764 iommu_queue_inv_dev_entry(iommu, devid); 766 iommu_queue_inv_dev_entry(iommu, devid);
765
766 iommu->need_sync = 1;
767} 767}
768 768
769/***************************************************************************** 769/*****************************************************************************
@@ -858,6 +858,9 @@ static int get_device_resources(struct device *dev,
858 print_devid(_bdf, 1); 858 print_devid(_bdf, 1);
859 } 859 }
860 860
861 if (domain_for_device(_bdf) == NULL)
862 set_device_domain(*iommu, *domain, _bdf);
863
861 return 1; 864 return 1;
862} 865}
863 866
@@ -908,7 +911,7 @@ static void dma_ops_domain_unmap(struct amd_iommu *iommu,
908 if (address >= dom->aperture_size) 911 if (address >= dom->aperture_size)
909 return; 912 return;
910 913
911 WARN_ON(address & 0xfffULL || address > dom->aperture_size); 914 WARN_ON(address & ~PAGE_MASK || address >= dom->aperture_size);
912 915
913 pte = dom->pte_pages[IOMMU_PTE_L1_INDEX(address)]; 916 pte = dom->pte_pages[IOMMU_PTE_L1_INDEX(address)];
914 pte += IOMMU_PTE_L0_INDEX(address); 917 pte += IOMMU_PTE_L0_INDEX(address);
@@ -920,8 +923,8 @@ static void dma_ops_domain_unmap(struct amd_iommu *iommu,
920 923
921/* 924/*
922 * This function contains common code for mapping of a physically 925 * This function contains common code for mapping of a physically
923 * contiguous memory region into DMA address space. It is uses by all 926 * contiguous memory region into DMA address space. It is used by all
924 * mapping functions provided by this IOMMU driver. 927 * mapping functions provided with this IOMMU driver.
925 * Must be called with the domain lock held. 928 * Must be called with the domain lock held.
926 */ 929 */
927static dma_addr_t __map_single(struct device *dev, 930static dma_addr_t __map_single(struct device *dev,
@@ -981,7 +984,8 @@ static void __unmap_single(struct amd_iommu *iommu,
981 dma_addr_t i, start; 984 dma_addr_t i, start;
982 unsigned int pages; 985 unsigned int pages;
983 986
984 if ((dma_addr == 0) || (dma_addr + size > dma_dom->aperture_size)) 987 if ((dma_addr == bad_dma_address) ||
988 (dma_addr + size > dma_dom->aperture_size))
985 return; 989 return;
986 990
987 pages = iommu_num_pages(dma_addr, size, PAGE_SIZE); 991 pages = iommu_num_pages(dma_addr, size, PAGE_SIZE);
@@ -1031,8 +1035,7 @@ static dma_addr_t map_single(struct device *dev, phys_addr_t paddr,
1031 if (addr == bad_dma_address) 1035 if (addr == bad_dma_address)
1032 goto out; 1036 goto out;
1033 1037
1034 if (unlikely(iommu->need_sync)) 1038 iommu_completion_wait(iommu);
1035 iommu_completion_wait(iommu);
1036 1039
1037out: 1040out:
1038 spin_unlock_irqrestore(&domain->lock, flags); 1041 spin_unlock_irqrestore(&domain->lock, flags);
@@ -1060,8 +1063,7 @@ static void unmap_single(struct device *dev, dma_addr_t dma_addr,
1060 1063
1061 __unmap_single(iommu, domain->priv, dma_addr, size, dir); 1064 __unmap_single(iommu, domain->priv, dma_addr, size, dir);
1062 1065
1063 if (unlikely(iommu->need_sync)) 1066 iommu_completion_wait(iommu);
1064 iommu_completion_wait(iommu);
1065 1067
1066 spin_unlock_irqrestore(&domain->lock, flags); 1068 spin_unlock_irqrestore(&domain->lock, flags);
1067} 1069}
@@ -1127,8 +1129,7 @@ static int map_sg(struct device *dev, struct scatterlist *sglist,
1127 goto unmap; 1129 goto unmap;
1128 } 1130 }
1129 1131
1130 if (unlikely(iommu->need_sync)) 1132 iommu_completion_wait(iommu);
1131 iommu_completion_wait(iommu);
1132 1133
1133out: 1134out:
1134 spin_unlock_irqrestore(&domain->lock, flags); 1135 spin_unlock_irqrestore(&domain->lock, flags);
@@ -1173,8 +1174,7 @@ static void unmap_sg(struct device *dev, struct scatterlist *sglist,
1173 s->dma_address = s->dma_length = 0; 1174 s->dma_address = s->dma_length = 0;
1174 } 1175 }
1175 1176
1176 if (unlikely(iommu->need_sync)) 1177 iommu_completion_wait(iommu);
1177 iommu_completion_wait(iommu);
1178 1178
1179 spin_unlock_irqrestore(&domain->lock, flags); 1179 spin_unlock_irqrestore(&domain->lock, flags);
1180} 1180}
@@ -1225,8 +1225,7 @@ static void *alloc_coherent(struct device *dev, size_t size,
1225 goto out; 1225 goto out;
1226 } 1226 }
1227 1227
1228 if (unlikely(iommu->need_sync)) 1228 iommu_completion_wait(iommu);
1229 iommu_completion_wait(iommu);
1230 1229
1231out: 1230out:
1232 spin_unlock_irqrestore(&domain->lock, flags); 1231 spin_unlock_irqrestore(&domain->lock, flags);
@@ -1257,8 +1256,7 @@ static void free_coherent(struct device *dev, size_t size,
1257 1256
1258 __unmap_single(iommu, domain->priv, dma_addr, size, DMA_BIDIRECTIONAL); 1257 __unmap_single(iommu, domain->priv, dma_addr, size, DMA_BIDIRECTIONAL);
1259 1258
1260 if (unlikely(iommu->need_sync)) 1259 iommu_completion_wait(iommu);
1261 iommu_completion_wait(iommu);
1262 1260
1263 spin_unlock_irqrestore(&domain->lock, flags); 1261 spin_unlock_irqrestore(&domain->lock, flags);
1264 1262