diff options
Diffstat (limited to 'arch/x86/include')
-rw-r--r-- | arch/x86/include/asm/hpet.h | 1 | ||||
-rw-r--r-- | arch/x86/include/asm/hugetlb.h | 1 | ||||
-rw-r--r-- | arch/x86/include/asm/kvm_host.h | 2 | ||||
-rw-r--r-- | arch/x86/include/asm/page_64_types.h | 2 | ||||
-rw-r--r-- | arch/x86/include/uapi/asm/msr-index.h | 2 |
5 files changed, 5 insertions, 3 deletions
diff --git a/arch/x86/include/asm/hpet.h b/arch/x86/include/asm/hpet.h index b18df579c0e9..36f7125945e3 100644 --- a/arch/x86/include/asm/hpet.h +++ b/arch/x86/include/asm/hpet.h | |||
@@ -63,6 +63,7 @@ | |||
63 | /* hpet memory map physical address */ | 63 | /* hpet memory map physical address */ |
64 | extern unsigned long hpet_address; | 64 | extern unsigned long hpet_address; |
65 | extern unsigned long force_hpet_address; | 65 | extern unsigned long force_hpet_address; |
66 | extern int boot_hpet_disable; | ||
66 | extern u8 hpet_blockid; | 67 | extern u8 hpet_blockid; |
67 | extern int hpet_force_user; | 68 | extern int hpet_force_user; |
68 | extern u8 hpet_msi_disable; | 69 | extern u8 hpet_msi_disable; |
diff --git a/arch/x86/include/asm/hugetlb.h b/arch/x86/include/asm/hugetlb.h index a8091216963b..68c05398bba9 100644 --- a/arch/x86/include/asm/hugetlb.h +++ b/arch/x86/include/asm/hugetlb.h | |||
@@ -52,6 +52,7 @@ static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm, | |||
52 | static inline void huge_ptep_clear_flush(struct vm_area_struct *vma, | 52 | static inline void huge_ptep_clear_flush(struct vm_area_struct *vma, |
53 | unsigned long addr, pte_t *ptep) | 53 | unsigned long addr, pte_t *ptep) |
54 | { | 54 | { |
55 | ptep_clear_flush(vma, addr, ptep); | ||
55 | } | 56 | } |
56 | 57 | ||
57 | static inline int huge_pte_none(pte_t pte) | 58 | static inline int huge_pte_none(pte_t pte) |
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index fcaf9c961265..7de069afb382 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h | |||
@@ -60,7 +60,7 @@ | |||
60 | | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ | 60 | | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ |
61 | | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ | 61 | | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ |
62 | | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ | 62 | | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ |
63 | | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE)) | 63 | | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE | X86_CR4_SMAP)) |
64 | 64 | ||
65 | #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) | 65 | #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) |
66 | 66 | ||
diff --git a/arch/x86/include/asm/page_64_types.h b/arch/x86/include/asm/page_64_types.h index 8de6d9cf3b95..678205195ae1 100644 --- a/arch/x86/include/asm/page_64_types.h +++ b/arch/x86/include/asm/page_64_types.h | |||
@@ -1,7 +1,7 @@ | |||
1 | #ifndef _ASM_X86_PAGE_64_DEFS_H | 1 | #ifndef _ASM_X86_PAGE_64_DEFS_H |
2 | #define _ASM_X86_PAGE_64_DEFS_H | 2 | #define _ASM_X86_PAGE_64_DEFS_H |
3 | 3 | ||
4 | #define THREAD_SIZE_ORDER 1 | 4 | #define THREAD_SIZE_ORDER 2 |
5 | #define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER) | 5 | #define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER) |
6 | #define CURRENT_MASK (~(THREAD_SIZE - 1)) | 6 | #define CURRENT_MASK (~(THREAD_SIZE - 1)) |
7 | 7 | ||
diff --git a/arch/x86/include/uapi/asm/msr-index.h b/arch/x86/include/uapi/asm/msr-index.h index c827ace3121b..fcf2b3ae1bf0 100644 --- a/arch/x86/include/uapi/asm/msr-index.h +++ b/arch/x86/include/uapi/asm/msr-index.h | |||
@@ -384,7 +384,7 @@ | |||
384 | #define MSR_IA32_MISC_ENABLE_MWAIT_BIT 18 | 384 | #define MSR_IA32_MISC_ENABLE_MWAIT_BIT 18 |
385 | #define MSR_IA32_MISC_ENABLE_MWAIT (1ULL << MSR_IA32_MISC_ENABLE_MWAIT_BIT) | 385 | #define MSR_IA32_MISC_ENABLE_MWAIT (1ULL << MSR_IA32_MISC_ENABLE_MWAIT_BIT) |
386 | #define MSR_IA32_MISC_ENABLE_LIMIT_CPUID_BIT 22 | 386 | #define MSR_IA32_MISC_ENABLE_LIMIT_CPUID_BIT 22 |
387 | #define MSR_IA32_MISC_ENABLE_LIMIT_CPUID (1ULL << MSR_IA32_MISC_ENABLE_LIMIT_CPUID_BIT); | 387 | #define MSR_IA32_MISC_ENABLE_LIMIT_CPUID (1ULL << MSR_IA32_MISC_ENABLE_LIMIT_CPUID_BIT) |
388 | #define MSR_IA32_MISC_ENABLE_XTPR_DISABLE_BIT 23 | 388 | #define MSR_IA32_MISC_ENABLE_XTPR_DISABLE_BIT 23 |
389 | #define MSR_IA32_MISC_ENABLE_XTPR_DISABLE (1ULL << MSR_IA32_MISC_ENABLE_XTPR_DISABLE_BIT) | 389 | #define MSR_IA32_MISC_ENABLE_XTPR_DISABLE (1ULL << MSR_IA32_MISC_ENABLE_XTPR_DISABLE_BIT) |
390 | #define MSR_IA32_MISC_ENABLE_XD_DISABLE_BIT 34 | 390 | #define MSR_IA32_MISC_ENABLE_XD_DISABLE_BIT 34 |