diff options
Diffstat (limited to 'arch/x86/include')
63 files changed, 798 insertions, 390 deletions
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h index 3b1510b4fc57..25caa0738af5 100644 --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h | |||
@@ -193,6 +193,7 @@ extern u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask); | |||
193 | static inline void lapic_shutdown(void) { } | 193 | static inline void lapic_shutdown(void) { } |
194 | #define local_apic_timer_c2_ok 1 | 194 | #define local_apic_timer_c2_ok 1 |
195 | static inline void init_apic_mappings(void) { } | 195 | static inline void init_apic_mappings(void) { } |
196 | static inline void disable_local_APIC(void) { } | ||
196 | 197 | ||
197 | #endif /* !CONFIG_X86_LOCAL_APIC */ | 198 | #endif /* !CONFIG_X86_LOCAL_APIC */ |
198 | 199 | ||
diff --git a/arch/x86/include/asm/bigsmp/apic.h b/arch/x86/include/asm/bigsmp/apic.h index 1d9543b9d358..ce547f24a1cd 100644 --- a/arch/x86/include/asm/bigsmp/apic.h +++ b/arch/x86/include/asm/bigsmp/apic.h | |||
@@ -24,8 +24,6 @@ static inline cpumask_t target_cpus(void) | |||
24 | #define INT_DELIVERY_MODE (dest_Fixed) | 24 | #define INT_DELIVERY_MODE (dest_Fixed) |
25 | #define INT_DEST_MODE (0) /* phys delivery to target proc */ | 25 | #define INT_DEST_MODE (0) /* phys delivery to target proc */ |
26 | #define NO_BALANCE_IRQ (0) | 26 | #define NO_BALANCE_IRQ (0) |
27 | #define WAKE_SECONDARY_VIA_INIT | ||
28 | |||
29 | 27 | ||
30 | static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid) | 28 | static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid) |
31 | { | 29 | { |
diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h index 360010322711..9fa9dcdf344b 100644 --- a/arch/x86/include/asm/bitops.h +++ b/arch/x86/include/asm/bitops.h | |||
@@ -168,7 +168,15 @@ static inline void __change_bit(int nr, volatile unsigned long *addr) | |||
168 | */ | 168 | */ |
169 | static inline void change_bit(int nr, volatile unsigned long *addr) | 169 | static inline void change_bit(int nr, volatile unsigned long *addr) |
170 | { | 170 | { |
171 | asm volatile(LOCK_PREFIX "btc %1,%0" : ADDR : "Ir" (nr)); | 171 | if (IS_IMMEDIATE(nr)) { |
172 | asm volatile(LOCK_PREFIX "xorb %1,%0" | ||
173 | : CONST_MASK_ADDR(nr, addr) | ||
174 | : "iq" ((u8)CONST_MASK(nr))); | ||
175 | } else { | ||
176 | asm volatile(LOCK_PREFIX "btc %1,%0" | ||
177 | : BITOP_ADDR(addr) | ||
178 | : "Ir" (nr)); | ||
179 | } | ||
172 | } | 180 | } |
173 | 181 | ||
174 | /** | 182 | /** |
diff --git a/arch/x86/include/asm/bug.h b/arch/x86/include/asm/bug.h index 3def2065fcea..d9cf1cd156d2 100644 --- a/arch/x86/include/asm/bug.h +++ b/arch/x86/include/asm/bug.h | |||
@@ -9,7 +9,7 @@ | |||
9 | #ifdef CONFIG_X86_32 | 9 | #ifdef CONFIG_X86_32 |
10 | # define __BUG_C0 "2:\t.long 1b, %c0\n" | 10 | # define __BUG_C0 "2:\t.long 1b, %c0\n" |
11 | #else | 11 | #else |
12 | # define __BUG_C0 "2:\t.quad 1b, %c0\n" | 12 | # define __BUG_C0 "2:\t.long 1b - 2b, %c0 - 2b\n" |
13 | #endif | 13 | #endif |
14 | 14 | ||
15 | #define BUG() \ | 15 | #define BUG() \ |
diff --git a/arch/x86/include/asm/byteorder.h b/arch/x86/include/asm/byteorder.h index e02ae2d89acf..f110ad417df3 100644 --- a/arch/x86/include/asm/byteorder.h +++ b/arch/x86/include/asm/byteorder.h | |||
@@ -4,26 +4,33 @@ | |||
4 | #include <asm/types.h> | 4 | #include <asm/types.h> |
5 | #include <linux/compiler.h> | 5 | #include <linux/compiler.h> |
6 | 6 | ||
7 | #ifdef __GNUC__ | 7 | #define __LITTLE_ENDIAN |
8 | 8 | ||
9 | #ifdef __i386__ | 9 | static inline __attribute_const__ __u32 __arch_swab32(__u32 val) |
10 | |||
11 | static inline __attribute_const__ __u32 ___arch__swab32(__u32 x) | ||
12 | { | 10 | { |
13 | #ifdef CONFIG_X86_BSWAP | 11 | #ifdef __i386__ |
14 | asm("bswap %0" : "=r" (x) : "0" (x)); | 12 | # ifdef CONFIG_X86_BSWAP |
15 | #else | 13 | asm("bswap %0" : "=r" (val) : "0" (val)); |
14 | # else | ||
16 | asm("xchgb %b0,%h0\n\t" /* swap lower bytes */ | 15 | asm("xchgb %b0,%h0\n\t" /* swap lower bytes */ |
17 | "rorl $16,%0\n\t" /* swap words */ | 16 | "rorl $16,%0\n\t" /* swap words */ |
18 | "xchgb %b0,%h0" /* swap higher bytes */ | 17 | "xchgb %b0,%h0" /* swap higher bytes */ |
19 | : "=q" (x) | 18 | : "=q" (val) |
20 | : "0" (x)); | 19 | : "0" (val)); |
20 | # endif | ||
21 | |||
22 | #else /* __i386__ */ | ||
23 | asm("bswapl %0" | ||
24 | : "=r" (val) | ||
25 | : "0" (val)); | ||
21 | #endif | 26 | #endif |
22 | return x; | 27 | return val; |
23 | } | 28 | } |
29 | #define __arch_swab32 __arch_swab32 | ||
24 | 30 | ||
25 | static inline __attribute_const__ __u64 ___arch__swab64(__u64 val) | 31 | static inline __attribute_const__ __u64 __arch_swab64(__u64 val) |
26 | { | 32 | { |
33 | #ifdef __i386__ | ||
27 | union { | 34 | union { |
28 | struct { | 35 | struct { |
29 | __u32 a; | 36 | __u32 a; |
@@ -32,50 +39,27 @@ static inline __attribute_const__ __u64 ___arch__swab64(__u64 val) | |||
32 | __u64 u; | 39 | __u64 u; |
33 | } v; | 40 | } v; |
34 | v.u = val; | 41 | v.u = val; |
35 | #ifdef CONFIG_X86_BSWAP | 42 | # ifdef CONFIG_X86_BSWAP |
36 | asm("bswapl %0 ; bswapl %1 ; xchgl %0,%1" | 43 | asm("bswapl %0 ; bswapl %1 ; xchgl %0,%1" |
37 | : "=r" (v.s.a), "=r" (v.s.b) | 44 | : "=r" (v.s.a), "=r" (v.s.b) |
38 | : "0" (v.s.a), "1" (v.s.b)); | 45 | : "0" (v.s.a), "1" (v.s.b)); |
39 | #else | 46 | # else |
40 | v.s.a = ___arch__swab32(v.s.a); | 47 | v.s.a = __arch_swab32(v.s.a); |
41 | v.s.b = ___arch__swab32(v.s.b); | 48 | v.s.b = __arch_swab32(v.s.b); |
42 | asm("xchgl %0,%1" | 49 | asm("xchgl %0,%1" |
43 | : "=r" (v.s.a), "=r" (v.s.b) | 50 | : "=r" (v.s.a), "=r" (v.s.b) |
44 | : "0" (v.s.a), "1" (v.s.b)); | 51 | : "0" (v.s.a), "1" (v.s.b)); |
45 | #endif | 52 | # endif |
46 | return v.u; | 53 | return v.u; |
47 | } | ||
48 | |||
49 | #else /* __i386__ */ | 54 | #else /* __i386__ */ |
50 | |||
51 | static inline __attribute_const__ __u64 ___arch__swab64(__u64 x) | ||
52 | { | ||
53 | asm("bswapq %0" | 55 | asm("bswapq %0" |
54 | : "=r" (x) | 56 | : "=r" (val) |
55 | : "0" (x)); | 57 | : "0" (val)); |
56 | return x; | 58 | return val; |
57 | } | ||
58 | |||
59 | static inline __attribute_const__ __u32 ___arch__swab32(__u32 x) | ||
60 | { | ||
61 | asm("bswapl %0" | ||
62 | : "=r" (x) | ||
63 | : "0" (x)); | ||
64 | return x; | ||
65 | } | ||
66 | |||
67 | #endif | 59 | #endif |
60 | } | ||
61 | #define __arch_swab64 __arch_swab64 | ||
68 | 62 | ||
69 | /* Do not define swab16. Gcc is smart enough to recognize "C" version and | 63 | #include <linux/byteorder.h> |
70 | convert it into rotation or exhange. */ | ||
71 | |||
72 | #define __arch__swab64(x) ___arch__swab64(x) | ||
73 | #define __arch__swab32(x) ___arch__swab32(x) | ||
74 | |||
75 | #define __BYTEORDER_HAS_U64__ | ||
76 | |||
77 | #endif /* __GNUC__ */ | ||
78 | |||
79 | #include <linux/byteorder/little_endian.h> | ||
80 | 64 | ||
81 | #endif /* _ASM_X86_BYTEORDER_H */ | 65 | #endif /* _ASM_X86_BYTEORDER_H */ |
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h index cfdf8c2c5c31..ea408dcba513 100644 --- a/arch/x86/include/asm/cpufeature.h +++ b/arch/x86/include/asm/cpufeature.h | |||
@@ -80,7 +80,6 @@ | |||
80 | #define X86_FEATURE_UP (3*32+ 9) /* smp kernel running on up */ | 80 | #define X86_FEATURE_UP (3*32+ 9) /* smp kernel running on up */ |
81 | #define X86_FEATURE_FXSAVE_LEAK (3*32+10) /* "" FXSAVE leaks FOP/FIP/FOP */ | 81 | #define X86_FEATURE_FXSAVE_LEAK (3*32+10) /* "" FXSAVE leaks FOP/FIP/FOP */ |
82 | #define X86_FEATURE_ARCH_PERFMON (3*32+11) /* Intel Architectural PerfMon */ | 82 | #define X86_FEATURE_ARCH_PERFMON (3*32+11) /* Intel Architectural PerfMon */ |
83 | #define X86_FEATURE_NOPL (3*32+20) /* The NOPL (0F 1F) instructions */ | ||
84 | #define X86_FEATURE_PEBS (3*32+12) /* Precise-Event Based Sampling */ | 83 | #define X86_FEATURE_PEBS (3*32+12) /* Precise-Event Based Sampling */ |
85 | #define X86_FEATURE_BTS (3*32+13) /* Branch Trace Store */ | 84 | #define X86_FEATURE_BTS (3*32+13) /* Branch Trace Store */ |
86 | #define X86_FEATURE_SYSCALL32 (3*32+14) /* "" syscall in ia32 userspace */ | 85 | #define X86_FEATURE_SYSCALL32 (3*32+14) /* "" syscall in ia32 userspace */ |
@@ -92,6 +91,8 @@ | |||
92 | #define X86_FEATURE_NOPL (3*32+20) /* The NOPL (0F 1F) instructions */ | 91 | #define X86_FEATURE_NOPL (3*32+20) /* The NOPL (0F 1F) instructions */ |
93 | #define X86_FEATURE_AMDC1E (3*32+21) /* AMD C1E detected */ | 92 | #define X86_FEATURE_AMDC1E (3*32+21) /* AMD C1E detected */ |
94 | #define X86_FEATURE_XTOPOLOGY (3*32+22) /* cpu topology enum extensions */ | 93 | #define X86_FEATURE_XTOPOLOGY (3*32+22) /* cpu topology enum extensions */ |
94 | #define X86_FEATURE_TSC_RELIABLE (3*32+23) /* TSC is known to be reliable */ | ||
95 | #define X86_FEATURE_NONSTOP_TSC (3*32+24) /* TSC does not stop in C states */ | ||
95 | 96 | ||
96 | /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ | 97 | /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ |
97 | #define X86_FEATURE_XMM3 (4*32+ 0) /* "pni" SSE-3 */ | 98 | #define X86_FEATURE_XMM3 (4*32+ 0) /* "pni" SSE-3 */ |
@@ -117,6 +118,7 @@ | |||
117 | #define X86_FEATURE_XSAVE (4*32+26) /* XSAVE/XRSTOR/XSETBV/XGETBV */ | 118 | #define X86_FEATURE_XSAVE (4*32+26) /* XSAVE/XRSTOR/XSETBV/XGETBV */ |
118 | #define X86_FEATURE_OSXSAVE (4*32+27) /* "" XSAVE enabled in the OS */ | 119 | #define X86_FEATURE_OSXSAVE (4*32+27) /* "" XSAVE enabled in the OS */ |
119 | #define X86_FEATURE_AVX (4*32+28) /* Advanced Vector Extensions */ | 120 | #define X86_FEATURE_AVX (4*32+28) /* Advanced Vector Extensions */ |
121 | #define X86_FEATURE_HYPERVISOR (4*32+31) /* Running on a hypervisor */ | ||
120 | 122 | ||
121 | /* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */ | 123 | /* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */ |
122 | #define X86_FEATURE_XSTORE (5*32+ 2) /* "rng" RNG present (xstore) */ | 124 | #define X86_FEATURE_XSTORE (5*32+ 2) /* "rng" RNG present (xstore) */ |
@@ -237,6 +239,7 @@ extern const char * const x86_power_flags[32]; | |||
237 | #define cpu_has_xmm4_2 boot_cpu_has(X86_FEATURE_XMM4_2) | 239 | #define cpu_has_xmm4_2 boot_cpu_has(X86_FEATURE_XMM4_2) |
238 | #define cpu_has_x2apic boot_cpu_has(X86_FEATURE_X2APIC) | 240 | #define cpu_has_x2apic boot_cpu_has(X86_FEATURE_X2APIC) |
239 | #define cpu_has_xsave boot_cpu_has(X86_FEATURE_XSAVE) | 241 | #define cpu_has_xsave boot_cpu_has(X86_FEATURE_XSAVE) |
242 | #define cpu_has_hypervisor boot_cpu_has(X86_FEATURE_HYPERVISOR) | ||
240 | 243 | ||
241 | #if defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_64) | 244 | #if defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_64) |
242 | # define cpu_has_invlpg 1 | 245 | # define cpu_has_invlpg 1 |
diff --git a/arch/x86/include/asm/dma-mapping.h b/arch/x86/include/asm/dma-mapping.h index 097794ff6b79..dc22c0733282 100644 --- a/arch/x86/include/asm/dma-mapping.h +++ b/arch/x86/include/asm/dma-mapping.h | |||
@@ -71,12 +71,10 @@ static inline struct dma_mapping_ops *get_dma_ops(struct device *dev) | |||
71 | /* Make sure we keep the same behaviour */ | 71 | /* Make sure we keep the same behaviour */ |
72 | static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) | 72 | static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) |
73 | { | 73 | { |
74 | #ifdef CONFIG_X86_64 | ||
75 | struct dma_mapping_ops *ops = get_dma_ops(dev); | 74 | struct dma_mapping_ops *ops = get_dma_ops(dev); |
76 | if (ops->mapping_error) | 75 | if (ops->mapping_error) |
77 | return ops->mapping_error(dev, dma_addr); | 76 | return ops->mapping_error(dev, dma_addr); |
78 | 77 | ||
79 | #endif | ||
80 | return (dma_addr == bad_dma_address); | 78 | return (dma_addr == bad_dma_address); |
81 | } | 79 | } |
82 | 80 | ||
diff --git a/arch/x86/include/asm/dwarf2.h b/arch/x86/include/asm/dwarf2.h index 804b6e6be929..3afc5e87cfdd 100644 --- a/arch/x86/include/asm/dwarf2.h +++ b/arch/x86/include/asm/dwarf2.h | |||
@@ -6,56 +6,91 @@ | |||
6 | #endif | 6 | #endif |
7 | 7 | ||
8 | /* | 8 | /* |
9 | Macros for dwarf2 CFI unwind table entries. | 9 | * Macros for dwarf2 CFI unwind table entries. |
10 | See "as.info" for details on these pseudo ops. Unfortunately | 10 | * See "as.info" for details on these pseudo ops. Unfortunately |
11 | they are only supported in very new binutils, so define them | 11 | * they are only supported in very new binutils, so define them |
12 | away for older version. | 12 | * away for older version. |
13 | */ | 13 | */ |
14 | 14 | ||
15 | #ifdef CONFIG_AS_CFI | 15 | #ifdef CONFIG_AS_CFI |
16 | 16 | ||
17 | #define CFI_STARTPROC .cfi_startproc | 17 | #define CFI_STARTPROC .cfi_startproc |
18 | #define CFI_ENDPROC .cfi_endproc | 18 | #define CFI_ENDPROC .cfi_endproc |
19 | #define CFI_DEF_CFA .cfi_def_cfa | 19 | #define CFI_DEF_CFA .cfi_def_cfa |
20 | #define CFI_DEF_CFA_REGISTER .cfi_def_cfa_register | 20 | #define CFI_DEF_CFA_REGISTER .cfi_def_cfa_register |
21 | #define CFI_DEF_CFA_OFFSET .cfi_def_cfa_offset | 21 | #define CFI_DEF_CFA_OFFSET .cfi_def_cfa_offset |
22 | #define CFI_ADJUST_CFA_OFFSET .cfi_adjust_cfa_offset | 22 | #define CFI_ADJUST_CFA_OFFSET .cfi_adjust_cfa_offset |
23 | #define CFI_OFFSET .cfi_offset | 23 | #define CFI_OFFSET .cfi_offset |
24 | #define CFI_REL_OFFSET .cfi_rel_offset | 24 | #define CFI_REL_OFFSET .cfi_rel_offset |
25 | #define CFI_REGISTER .cfi_register | 25 | #define CFI_REGISTER .cfi_register |
26 | #define CFI_RESTORE .cfi_restore | 26 | #define CFI_RESTORE .cfi_restore |
27 | #define CFI_REMEMBER_STATE .cfi_remember_state | 27 | #define CFI_REMEMBER_STATE .cfi_remember_state |
28 | #define CFI_RESTORE_STATE .cfi_restore_state | 28 | #define CFI_RESTORE_STATE .cfi_restore_state |
29 | #define CFI_UNDEFINED .cfi_undefined | 29 | #define CFI_UNDEFINED .cfi_undefined |
30 | 30 | ||
31 | #ifdef CONFIG_AS_CFI_SIGNAL_FRAME | 31 | #ifdef CONFIG_AS_CFI_SIGNAL_FRAME |
32 | #define CFI_SIGNAL_FRAME .cfi_signal_frame | 32 | #define CFI_SIGNAL_FRAME .cfi_signal_frame |
33 | #else | 33 | #else |
34 | #define CFI_SIGNAL_FRAME | 34 | #define CFI_SIGNAL_FRAME |
35 | #endif | 35 | #endif |
36 | 36 | ||
37 | #else | 37 | #else |
38 | 38 | ||
39 | /* Due to the structure of pre-exisiting code, don't use assembler line | 39 | /* |
40 | comment character # to ignore the arguments. Instead, use a dummy macro. */ | 40 | * Due to the structure of pre-exisiting code, don't use assembler line |
41 | * comment character # to ignore the arguments. Instead, use a dummy macro. | ||
42 | */ | ||
41 | .macro cfi_ignore a=0, b=0, c=0, d=0 | 43 | .macro cfi_ignore a=0, b=0, c=0, d=0 |
42 | .endm | 44 | .endm |
43 | 45 | ||
44 | #define CFI_STARTPROC cfi_ignore | 46 | #define CFI_STARTPROC cfi_ignore |
45 | #define CFI_ENDPROC cfi_ignore | 47 | #define CFI_ENDPROC cfi_ignore |
46 | #define CFI_DEF_CFA cfi_ignore | 48 | #define CFI_DEF_CFA cfi_ignore |
47 | #define CFI_DEF_CFA_REGISTER cfi_ignore | 49 | #define CFI_DEF_CFA_REGISTER cfi_ignore |
48 | #define CFI_DEF_CFA_OFFSET cfi_ignore | 50 | #define CFI_DEF_CFA_OFFSET cfi_ignore |
49 | #define CFI_ADJUST_CFA_OFFSET cfi_ignore | 51 | #define CFI_ADJUST_CFA_OFFSET cfi_ignore |
50 | #define CFI_OFFSET cfi_ignore | 52 | #define CFI_OFFSET cfi_ignore |
51 | #define CFI_REL_OFFSET cfi_ignore | 53 | #define CFI_REL_OFFSET cfi_ignore |
52 | #define CFI_REGISTER cfi_ignore | 54 | #define CFI_REGISTER cfi_ignore |
53 | #define CFI_RESTORE cfi_ignore | 55 | #define CFI_RESTORE cfi_ignore |
54 | #define CFI_REMEMBER_STATE cfi_ignore | 56 | #define CFI_REMEMBER_STATE cfi_ignore |
55 | #define CFI_RESTORE_STATE cfi_ignore | 57 | #define CFI_RESTORE_STATE cfi_ignore |
56 | #define CFI_UNDEFINED cfi_ignore | 58 | #define CFI_UNDEFINED cfi_ignore |
57 | #define CFI_SIGNAL_FRAME cfi_ignore | 59 | #define CFI_SIGNAL_FRAME cfi_ignore |
58 | 60 | ||
59 | #endif | 61 | #endif |
60 | 62 | ||
63 | /* | ||
64 | * An attempt to make CFI annotations more or less | ||
65 | * correct and shorter. It is implied that you know | ||
66 | * what you're doing if you use them. | ||
67 | */ | ||
68 | #ifdef __ASSEMBLY__ | ||
69 | #ifdef CONFIG_X86_64 | ||
70 | .macro pushq_cfi reg | ||
71 | pushq \reg | ||
72 | CFI_ADJUST_CFA_OFFSET 8 | ||
73 | .endm | ||
74 | |||
75 | .macro popq_cfi reg | ||
76 | popq \reg | ||
77 | CFI_ADJUST_CFA_OFFSET -8 | ||
78 | .endm | ||
79 | |||
80 | .macro movq_cfi reg offset=0 | ||
81 | movq %\reg, \offset(%rsp) | ||
82 | CFI_REL_OFFSET \reg, \offset | ||
83 | .endm | ||
84 | |||
85 | .macro movq_cfi_restore offset reg | ||
86 | movq \offset(%rsp), %\reg | ||
87 | CFI_RESTORE \reg | ||
88 | .endm | ||
89 | #else /*!CONFIG_X86_64*/ | ||
90 | |||
91 | /* 32bit defenitions are missed yet */ | ||
92 | |||
93 | #endif /*!CONFIG_X86_64*/ | ||
94 | #endif /*__ASSEMBLY__*/ | ||
95 | |||
61 | #endif /* _ASM_X86_DWARF2_H */ | 96 | #endif /* _ASM_X86_DWARF2_H */ |
diff --git a/arch/x86/include/asm/emergency-restart.h b/arch/x86/include/asm/emergency-restart.h index 94826cf87455..cc70c1c78ca4 100644 --- a/arch/x86/include/asm/emergency-restart.h +++ b/arch/x86/include/asm/emergency-restart.h | |||
@@ -8,7 +8,9 @@ enum reboot_type { | |||
8 | BOOT_BIOS = 'b', | 8 | BOOT_BIOS = 'b', |
9 | #endif | 9 | #endif |
10 | BOOT_ACPI = 'a', | 10 | BOOT_ACPI = 'a', |
11 | BOOT_EFI = 'e' | 11 | BOOT_EFI = 'e', |
12 | BOOT_CF9 = 'p', | ||
13 | BOOT_CF9_COND = 'q', | ||
12 | }; | 14 | }; |
13 | 15 | ||
14 | extern enum reboot_type reboot_type; | 16 | extern enum reboot_type reboot_type; |
diff --git a/arch/x86/include/asm/es7000/apic.h b/arch/x86/include/asm/es7000/apic.h index 380f0b4f17ed..e24ef876915f 100644 --- a/arch/x86/include/asm/es7000/apic.h +++ b/arch/x86/include/asm/es7000/apic.h | |||
@@ -9,31 +9,27 @@ static inline int apic_id_registered(void) | |||
9 | return (1); | 9 | return (1); |
10 | } | 10 | } |
11 | 11 | ||
12 | static inline cpumask_t target_cpus(void) | 12 | static inline cpumask_t target_cpus_cluster(void) |
13 | { | 13 | { |
14 | #if defined CONFIG_ES7000_CLUSTERED_APIC | ||
15 | return CPU_MASK_ALL; | 14 | return CPU_MASK_ALL; |
16 | #else | 15 | } |
16 | |||
17 | static inline cpumask_t target_cpus(void) | ||
18 | { | ||
17 | return cpumask_of_cpu(smp_processor_id()); | 19 | return cpumask_of_cpu(smp_processor_id()); |
18 | #endif | ||
19 | } | 20 | } |
20 | 21 | ||
21 | #if defined CONFIG_ES7000_CLUSTERED_APIC | 22 | #define APIC_DFR_VALUE_CLUSTER (APIC_DFR_CLUSTER) |
22 | #define APIC_DFR_VALUE (APIC_DFR_CLUSTER) | 23 | #define INT_DELIVERY_MODE_CLUSTER (dest_LowestPrio) |
23 | #define INT_DELIVERY_MODE (dest_LowestPrio) | 24 | #define INT_DEST_MODE_CLUSTER (1) /* logical delivery broadcast to all procs */ |
24 | #define INT_DEST_MODE (1) /* logical delivery broadcast to all procs */ | 25 | #define NO_BALANCE_IRQ_CLUSTER (1) |
25 | #define NO_BALANCE_IRQ (1) | 26 | |
26 | #undef WAKE_SECONDARY_VIA_INIT | ||
27 | #define WAKE_SECONDARY_VIA_MIP | ||
28 | #else | ||
29 | #define APIC_DFR_VALUE (APIC_DFR_FLAT) | 27 | #define APIC_DFR_VALUE (APIC_DFR_FLAT) |
30 | #define INT_DELIVERY_MODE (dest_Fixed) | 28 | #define INT_DELIVERY_MODE (dest_Fixed) |
31 | #define INT_DEST_MODE (0) /* phys delivery to target procs */ | 29 | #define INT_DEST_MODE (0) /* phys delivery to target procs */ |
32 | #define NO_BALANCE_IRQ (0) | 30 | #define NO_BALANCE_IRQ (0) |
33 | #undef APIC_DEST_LOGICAL | 31 | #undef APIC_DEST_LOGICAL |
34 | #define APIC_DEST_LOGICAL 0x0 | 32 | #define APIC_DEST_LOGICAL 0x0 |
35 | #define WAKE_SECONDARY_VIA_INIT | ||
36 | #endif | ||
37 | 33 | ||
38 | static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid) | 34 | static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid) |
39 | { | 35 | { |
@@ -60,6 +56,16 @@ static inline unsigned long calculate_ldr(int cpu) | |||
60 | * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel | 56 | * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel |
61 | * document number 292116). So here it goes... | 57 | * document number 292116). So here it goes... |
62 | */ | 58 | */ |
59 | static inline void init_apic_ldr_cluster(void) | ||
60 | { | ||
61 | unsigned long val; | ||
62 | int cpu = smp_processor_id(); | ||
63 | |||
64 | apic_write(APIC_DFR, APIC_DFR_VALUE_CLUSTER); | ||
65 | val = calculate_ldr(cpu); | ||
66 | apic_write(APIC_LDR, val); | ||
67 | } | ||
68 | |||
63 | static inline void init_apic_ldr(void) | 69 | static inline void init_apic_ldr(void) |
64 | { | 70 | { |
65 | unsigned long val; | 71 | unsigned long val; |
@@ -70,10 +76,6 @@ static inline void init_apic_ldr(void) | |||
70 | apic_write(APIC_LDR, val); | 76 | apic_write(APIC_LDR, val); |
71 | } | 77 | } |
72 | 78 | ||
73 | #ifndef CONFIG_X86_GENERICARCH | ||
74 | extern void enable_apic_mode(void); | ||
75 | #endif | ||
76 | |||
77 | extern int apic_version [MAX_APICS]; | 79 | extern int apic_version [MAX_APICS]; |
78 | static inline void setup_apic_routing(void) | 80 | static inline void setup_apic_routing(void) |
79 | { | 81 | { |
@@ -144,7 +146,7 @@ static inline int check_phys_apicid_present(int cpu_physical_apicid) | |||
144 | return (1); | 146 | return (1); |
145 | } | 147 | } |
146 | 148 | ||
147 | static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask) | 149 | static inline unsigned int cpu_mask_to_apicid_cluster(cpumask_t cpumask) |
148 | { | 150 | { |
149 | int num_bits_set; | 151 | int num_bits_set; |
150 | int cpus_found = 0; | 152 | int cpus_found = 0; |
@@ -154,11 +156,7 @@ static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask) | |||
154 | num_bits_set = cpus_weight(cpumask); | 156 | num_bits_set = cpus_weight(cpumask); |
155 | /* Return id to all */ | 157 | /* Return id to all */ |
156 | if (num_bits_set == NR_CPUS) | 158 | if (num_bits_set == NR_CPUS) |
157 | #if defined CONFIG_ES7000_CLUSTERED_APIC | ||
158 | return 0xFF; | 159 | return 0xFF; |
159 | #else | ||
160 | return cpu_to_logical_apicid(0); | ||
161 | #endif | ||
162 | /* | 160 | /* |
163 | * The cpus in the mask must all be on the apic cluster. If are not | 161 | * The cpus in the mask must all be on the apic cluster. If are not |
164 | * on the same apicid cluster return default value of TARGET_CPUS. | 162 | * on the same apicid cluster return default value of TARGET_CPUS. |
@@ -171,11 +169,40 @@ static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask) | |||
171 | if (apicid_cluster(apicid) != | 169 | if (apicid_cluster(apicid) != |
172 | apicid_cluster(new_apicid)){ | 170 | apicid_cluster(new_apicid)){ |
173 | printk ("%s: Not a valid mask!\n", __func__); | 171 | printk ("%s: Not a valid mask!\n", __func__); |
174 | #if defined CONFIG_ES7000_CLUSTERED_APIC | ||
175 | return 0xFF; | 172 | return 0xFF; |
176 | #else | 173 | } |
174 | apicid = new_apicid; | ||
175 | cpus_found++; | ||
176 | } | ||
177 | cpu++; | ||
178 | } | ||
179 | return apicid; | ||
180 | } | ||
181 | |||
182 | static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask) | ||
183 | { | ||
184 | int num_bits_set; | ||
185 | int cpus_found = 0; | ||
186 | int cpu; | ||
187 | int apicid; | ||
188 | |||
189 | num_bits_set = cpus_weight(cpumask); | ||
190 | /* Return id to all */ | ||
191 | if (num_bits_set == NR_CPUS) | ||
192 | return cpu_to_logical_apicid(0); | ||
193 | /* | ||
194 | * The cpus in the mask must all be on the apic cluster. If are not | ||
195 | * on the same apicid cluster return default value of TARGET_CPUS. | ||
196 | */ | ||
197 | cpu = first_cpu(cpumask); | ||
198 | apicid = cpu_to_logical_apicid(cpu); | ||
199 | while (cpus_found < num_bits_set) { | ||
200 | if (cpu_isset(cpu, cpumask)) { | ||
201 | int new_apicid = cpu_to_logical_apicid(cpu); | ||
202 | if (apicid_cluster(apicid) != | ||
203 | apicid_cluster(new_apicid)){ | ||
204 | printk ("%s: Not a valid mask!\n", __func__); | ||
177 | return cpu_to_logical_apicid(0); | 205 | return cpu_to_logical_apicid(0); |
178 | #endif | ||
179 | } | 206 | } |
180 | apicid = new_apicid; | 207 | apicid = new_apicid; |
181 | cpus_found++; | 208 | cpus_found++; |
diff --git a/arch/x86/include/asm/es7000/wakecpu.h b/arch/x86/include/asm/es7000/wakecpu.h index 398493461913..78f0daaee436 100644 --- a/arch/x86/include/asm/es7000/wakecpu.h +++ b/arch/x86/include/asm/es7000/wakecpu.h | |||
@@ -1,36 +1,12 @@ | |||
1 | #ifndef __ASM_ES7000_WAKECPU_H | 1 | #ifndef __ASM_ES7000_WAKECPU_H |
2 | #define __ASM_ES7000_WAKECPU_H | 2 | #define __ASM_ES7000_WAKECPU_H |
3 | 3 | ||
4 | /* | 4 | #define TRAMPOLINE_PHYS_LOW 0x467 |
5 | * This file copes with machines that wakeup secondary CPUs by the | 5 | #define TRAMPOLINE_PHYS_HIGH 0x469 |
6 | * INIT, INIT, STARTUP sequence. | ||
7 | */ | ||
8 | |||
9 | #ifdef CONFIG_ES7000_CLUSTERED_APIC | ||
10 | #define WAKE_SECONDARY_VIA_MIP | ||
11 | #else | ||
12 | #define WAKE_SECONDARY_VIA_INIT | ||
13 | #endif | ||
14 | |||
15 | #ifdef WAKE_SECONDARY_VIA_MIP | ||
16 | extern int es7000_start_cpu(int cpu, unsigned long eip); | ||
17 | static inline int | ||
18 | wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip) | ||
19 | { | ||
20 | int boot_error = 0; | ||
21 | boot_error = es7000_start_cpu(phys_apicid, start_eip); | ||
22 | return boot_error; | ||
23 | } | ||
24 | #endif | ||
25 | |||
26 | #define TRAMPOLINE_LOW phys_to_virt(0x467) | ||
27 | #define TRAMPOLINE_HIGH phys_to_virt(0x469) | ||
28 | |||
29 | #define boot_cpu_apicid boot_cpu_physical_apicid | ||
30 | 6 | ||
31 | static inline void wait_for_init_deassert(atomic_t *deassert) | 7 | static inline void wait_for_init_deassert(atomic_t *deassert) |
32 | { | 8 | { |
33 | #ifdef WAKE_SECONDARY_VIA_INIT | 9 | #ifndef CONFIG_ES7000_CLUSTERED_APIC |
34 | while (!atomic_read(deassert)) | 10 | while (!atomic_read(deassert)) |
35 | cpu_relax(); | 11 | cpu_relax(); |
36 | #endif | 12 | #endif |
@@ -50,9 +26,12 @@ static inline void restore_NMI_vector(unsigned short *high, unsigned short *low) | |||
50 | { | 26 | { |
51 | } | 27 | } |
52 | 28 | ||
53 | #define inquire_remote_apic(apicid) do { \ | 29 | extern void __inquire_remote_apic(int apicid); |
54 | if (apic_verbosity >= APIC_DEBUG) \ | 30 | |
55 | __inquire_remote_apic(apicid); \ | 31 | static inline void inquire_remote_apic(int apicid) |
56 | } while (0) | 32 | { |
33 | if (apic_verbosity >= APIC_DEBUG) | ||
34 | __inquire_remote_apic(apicid); | ||
35 | } | ||
57 | 36 | ||
58 | #endif /* __ASM_MACH_WAKECPU_H */ | 37 | #endif /* __ASM_MACH_WAKECPU_H */ |
diff --git a/arch/x86/include/asm/gart.h b/arch/x86/include/asm/gart.h index 74252264433d..6cfdafa409d8 100644 --- a/arch/x86/include/asm/gart.h +++ b/arch/x86/include/asm/gart.h | |||
@@ -29,6 +29,39 @@ extern int fix_aperture; | |||
29 | #define AMD64_GARTCACHECTL 0x9c | 29 | #define AMD64_GARTCACHECTL 0x9c |
30 | #define AMD64_GARTEN (1<<0) | 30 | #define AMD64_GARTEN (1<<0) |
31 | 31 | ||
32 | #ifdef CONFIG_GART_IOMMU | ||
33 | extern int gart_iommu_aperture; | ||
34 | extern int gart_iommu_aperture_allowed; | ||
35 | extern int gart_iommu_aperture_disabled; | ||
36 | |||
37 | extern void early_gart_iommu_check(void); | ||
38 | extern void gart_iommu_init(void); | ||
39 | extern void gart_iommu_shutdown(void); | ||
40 | extern void __init gart_parse_options(char *); | ||
41 | extern void gart_iommu_hole_init(void); | ||
42 | |||
43 | #else | ||
44 | #define gart_iommu_aperture 0 | ||
45 | #define gart_iommu_aperture_allowed 0 | ||
46 | #define gart_iommu_aperture_disabled 1 | ||
47 | |||
48 | static inline void early_gart_iommu_check(void) | ||
49 | { | ||
50 | } | ||
51 | static inline void gart_iommu_init(void) | ||
52 | { | ||
53 | } | ||
54 | static inline void gart_iommu_shutdown(void) | ||
55 | { | ||
56 | } | ||
57 | static inline void gart_parse_options(char *options) | ||
58 | { | ||
59 | } | ||
60 | static inline void gart_iommu_hole_init(void) | ||
61 | { | ||
62 | } | ||
63 | #endif | ||
64 | |||
32 | extern int agp_amd64_init(void); | 65 | extern int agp_amd64_init(void); |
33 | 66 | ||
34 | static inline void enable_gart_translation(struct pci_dev *dev, u64 addr) | 67 | static inline void enable_gart_translation(struct pci_dev *dev, u64 addr) |
diff --git a/arch/x86/include/asm/genapic_32.h b/arch/x86/include/asm/genapic_32.h index 5cbd4fcc06fd..0ac17d33a8c7 100644 --- a/arch/x86/include/asm/genapic_32.h +++ b/arch/x86/include/asm/genapic_32.h | |||
@@ -2,6 +2,7 @@ | |||
2 | #define _ASM_X86_GENAPIC_32_H | 2 | #define _ASM_X86_GENAPIC_32_H |
3 | 3 | ||
4 | #include <asm/mpspec.h> | 4 | #include <asm/mpspec.h> |
5 | #include <asm/atomic.h> | ||
5 | 6 | ||
6 | /* | 7 | /* |
7 | * Generic APIC driver interface. | 8 | * Generic APIC driver interface. |
@@ -65,6 +66,14 @@ struct genapic { | |||
65 | void (*send_IPI_allbutself)(int vector); | 66 | void (*send_IPI_allbutself)(int vector); |
66 | void (*send_IPI_all)(int vector); | 67 | void (*send_IPI_all)(int vector); |
67 | #endif | 68 | #endif |
69 | int (*wakeup_cpu)(int apicid, unsigned long start_eip); | ||
70 | int trampoline_phys_low; | ||
71 | int trampoline_phys_high; | ||
72 | void (*wait_for_init_deassert)(atomic_t *deassert); | ||
73 | void (*smp_callin_clear_local_apic)(void); | ||
74 | void (*store_NMI_vector)(unsigned short *high, unsigned short *low); | ||
75 | void (*restore_NMI_vector)(unsigned short *high, unsigned short *low); | ||
76 | void (*inquire_remote_apic)(int apicid); | ||
68 | }; | 77 | }; |
69 | 78 | ||
70 | #define APICFUNC(x) .x = x, | 79 | #define APICFUNC(x) .x = x, |
@@ -105,16 +114,24 @@ struct genapic { | |||
105 | APICFUNC(get_apic_id) \ | 114 | APICFUNC(get_apic_id) \ |
106 | .apic_id_mask = APIC_ID_MASK, \ | 115 | .apic_id_mask = APIC_ID_MASK, \ |
107 | APICFUNC(cpu_mask_to_apicid) \ | 116 | APICFUNC(cpu_mask_to_apicid) \ |
108 | APICFUNC(vector_allocation_domain) \ | 117 | APICFUNC(vector_allocation_domain) \ |
109 | APICFUNC(acpi_madt_oem_check) \ | 118 | APICFUNC(acpi_madt_oem_check) \ |
110 | IPIFUNC(send_IPI_mask) \ | 119 | IPIFUNC(send_IPI_mask) \ |
111 | IPIFUNC(send_IPI_allbutself) \ | 120 | IPIFUNC(send_IPI_allbutself) \ |
112 | IPIFUNC(send_IPI_all) \ | 121 | IPIFUNC(send_IPI_all) \ |
113 | APICFUNC(enable_apic_mode) \ | 122 | APICFUNC(enable_apic_mode) \ |
114 | APICFUNC(phys_pkg_id) \ | 123 | APICFUNC(phys_pkg_id) \ |
124 | .trampoline_phys_low = TRAMPOLINE_PHYS_LOW, \ | ||
125 | .trampoline_phys_high = TRAMPOLINE_PHYS_HIGH, \ | ||
126 | APICFUNC(wait_for_init_deassert) \ | ||
127 | APICFUNC(smp_callin_clear_local_apic) \ | ||
128 | APICFUNC(store_NMI_vector) \ | ||
129 | APICFUNC(restore_NMI_vector) \ | ||
130 | APICFUNC(inquire_remote_apic) \ | ||
115 | } | 131 | } |
116 | 132 | ||
117 | extern struct genapic *genapic; | 133 | extern struct genapic *genapic; |
134 | extern void es7000_update_genapic_to_cluster(void); | ||
118 | 135 | ||
119 | enum uv_system_type {UV_NONE, UV_LEGACY_APIC, UV_X2APIC, UV_NON_UNIQUE_APIC}; | 136 | enum uv_system_type {UV_NONE, UV_LEGACY_APIC, UV_X2APIC, UV_NON_UNIQUE_APIC}; |
120 | #define get_uv_system_type() UV_NONE | 137 | #define get_uv_system_type() UV_NONE |
diff --git a/arch/x86/include/asm/genapic_64.h b/arch/x86/include/asm/genapic_64.h index 13c4e96199ea..2cae011668b7 100644 --- a/arch/x86/include/asm/genapic_64.h +++ b/arch/x86/include/asm/genapic_64.h | |||
@@ -32,6 +32,8 @@ struct genapic { | |||
32 | unsigned int (*get_apic_id)(unsigned long x); | 32 | unsigned int (*get_apic_id)(unsigned long x); |
33 | unsigned long (*set_apic_id)(unsigned int id); | 33 | unsigned long (*set_apic_id)(unsigned int id); |
34 | unsigned long apic_id_mask; | 34 | unsigned long apic_id_mask; |
35 | /* wakeup_secondary_cpu */ | ||
36 | int (*wakeup_cpu)(int apicid, unsigned long start_eip); | ||
35 | }; | 37 | }; |
36 | 38 | ||
37 | extern struct genapic *genapic; | 39 | extern struct genapic *genapic; |
diff --git a/arch/x86/include/asm/hardirq_32.h b/arch/x86/include/asm/hardirq_32.h index 5ca135e72f2b..cf7954d1405f 100644 --- a/arch/x86/include/asm/hardirq_32.h +++ b/arch/x86/include/asm/hardirq_32.h | |||
@@ -22,6 +22,8 @@ DECLARE_PER_CPU(irq_cpustat_t, irq_stat); | |||
22 | #define __ARCH_IRQ_STAT | 22 | #define __ARCH_IRQ_STAT |
23 | #define __IRQ_STAT(cpu, member) (per_cpu(irq_stat, cpu).member) | 23 | #define __IRQ_STAT(cpu, member) (per_cpu(irq_stat, cpu).member) |
24 | 24 | ||
25 | #define inc_irq_stat(member) (__get_cpu_var(irq_stat).member++) | ||
26 | |||
25 | void ack_bad_irq(unsigned int irq); | 27 | void ack_bad_irq(unsigned int irq); |
26 | #include <linux/irq_cpustat.h> | 28 | #include <linux/irq_cpustat.h> |
27 | 29 | ||
diff --git a/arch/x86/include/asm/hardirq_64.h b/arch/x86/include/asm/hardirq_64.h index 1ba381fc51d3..b5a6b5d56704 100644 --- a/arch/x86/include/asm/hardirq_64.h +++ b/arch/x86/include/asm/hardirq_64.h | |||
@@ -11,6 +11,8 @@ | |||
11 | 11 | ||
12 | #define __ARCH_IRQ_STAT 1 | 12 | #define __ARCH_IRQ_STAT 1 |
13 | 13 | ||
14 | #define inc_irq_stat(member) add_pda(member, 1) | ||
15 | |||
14 | #define local_softirq_pending() read_pda(__softirq_pending) | 16 | #define local_softirq_pending() read_pda(__softirq_pending) |
15 | 17 | ||
16 | #define __ARCH_SET_SOFTIRQ_PENDING 1 | 18 | #define __ARCH_SET_SOFTIRQ_PENDING 1 |
diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h index b97aecb0b61d..8de644b6b959 100644 --- a/arch/x86/include/asm/hw_irq.h +++ b/arch/x86/include/asm/hw_irq.h | |||
@@ -109,9 +109,7 @@ extern asmlinkage void smp_invalidate_interrupt(struct pt_regs *); | |||
109 | #endif | 109 | #endif |
110 | #endif | 110 | #endif |
111 | 111 | ||
112 | #ifdef CONFIG_X86_32 | 112 | extern void (*__initconst interrupt[NR_VECTORS-FIRST_EXTERNAL_VECTOR])(void); |
113 | extern void (*const interrupt[NR_VECTORS])(void); | ||
114 | #endif | ||
115 | 113 | ||
116 | typedef int vector_irq_t[NR_VECTORS]; | 114 | typedef int vector_irq_t[NR_VECTORS]; |
117 | DECLARE_PER_CPU(vector_irq_t, vector_irq); | 115 | DECLARE_PER_CPU(vector_irq_t, vector_irq); |
diff --git a/arch/x86/include/asm/hypervisor.h b/arch/x86/include/asm/hypervisor.h new file mode 100644 index 000000000000..369f5c5d09a1 --- /dev/null +++ b/arch/x86/include/asm/hypervisor.h | |||
@@ -0,0 +1,26 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2008, VMware, Inc. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License as published by | ||
6 | * the Free Software Foundation; either version 2 of the License, or | ||
7 | * (at your option) any later version. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, but | ||
10 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | ||
12 | * NON INFRINGEMENT. See the GNU General Public License for more | ||
13 | * details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | ||
18 | * | ||
19 | */ | ||
20 | #ifndef ASM_X86__HYPERVISOR_H | ||
21 | #define ASM_X86__HYPERVISOR_H | ||
22 | |||
23 | extern unsigned long get_hypervisor_tsc_freq(void); | ||
24 | extern void init_hypervisor(struct cpuinfo_x86 *c); | ||
25 | |||
26 | #endif | ||
diff --git a/arch/x86/include/asm/ia32.h b/arch/x86/include/asm/ia32.h index 97989c0e534c..50ca486fd88c 100644 --- a/arch/x86/include/asm/ia32.h +++ b/arch/x86/include/asm/ia32.h | |||
@@ -129,24 +129,6 @@ typedef struct compat_siginfo { | |||
129 | } _sifields; | 129 | } _sifields; |
130 | } compat_siginfo_t; | 130 | } compat_siginfo_t; |
131 | 131 | ||
132 | struct sigframe32 { | ||
133 | u32 pretcode; | ||
134 | int sig; | ||
135 | struct sigcontext_ia32 sc; | ||
136 | struct _fpstate_ia32 fpstate; | ||
137 | unsigned int extramask[_COMPAT_NSIG_WORDS-1]; | ||
138 | }; | ||
139 | |||
140 | struct rt_sigframe32 { | ||
141 | u32 pretcode; | ||
142 | int sig; | ||
143 | u32 pinfo; | ||
144 | u32 puc; | ||
145 | compat_siginfo_t info; | ||
146 | struct ucontext_ia32 uc; | ||
147 | struct _fpstate_ia32 fpstate; | ||
148 | }; | ||
149 | |||
150 | struct ustat32 { | 132 | struct ustat32 { |
151 | __u32 f_tfree; | 133 | __u32 f_tfree; |
152 | compat_ino_t f_tinode; | 134 | compat_ino_t f_tinode; |
diff --git a/arch/x86/include/asm/idle.h b/arch/x86/include/asm/idle.h index 44c89c3a23e9..38d87379e270 100644 --- a/arch/x86/include/asm/idle.h +++ b/arch/x86/include/asm/idle.h | |||
@@ -8,8 +8,13 @@ struct notifier_block; | |||
8 | void idle_notifier_register(struct notifier_block *n); | 8 | void idle_notifier_register(struct notifier_block *n); |
9 | void idle_notifier_unregister(struct notifier_block *n); | 9 | void idle_notifier_unregister(struct notifier_block *n); |
10 | 10 | ||
11 | #ifdef CONFIG_X86_64 | ||
11 | void enter_idle(void); | 12 | void enter_idle(void); |
12 | void exit_idle(void); | 13 | void exit_idle(void); |
14 | #else /* !CONFIG_X86_64 */ | ||
15 | static inline void enter_idle(void) { } | ||
16 | static inline void exit_idle(void) { } | ||
17 | #endif /* CONFIG_X86_64 */ | ||
13 | 18 | ||
14 | void c1e_remove_cpu(int cpu); | 19 | void c1e_remove_cpu(int cpu); |
15 | 20 | ||
diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h index ac2abc88cd95..05cfed4485fa 100644 --- a/arch/x86/include/asm/io.h +++ b/arch/x86/include/asm/io.h | |||
@@ -4,6 +4,7 @@ | |||
4 | #define ARCH_HAS_IOREMAP_WC | 4 | #define ARCH_HAS_IOREMAP_WC |
5 | 5 | ||
6 | #include <linux/compiler.h> | 6 | #include <linux/compiler.h> |
7 | #include <asm-generic/int-ll64.h> | ||
7 | 8 | ||
8 | #define build_mmio_read(name, size, type, reg, barrier) \ | 9 | #define build_mmio_read(name, size, type, reg, barrier) \ |
9 | static inline type name(const volatile void __iomem *addr) \ | 10 | static inline type name(const volatile void __iomem *addr) \ |
@@ -45,21 +46,39 @@ build_mmio_write(__writel, "l", unsigned int, "r", ) | |||
45 | #define mmiowb() barrier() | 46 | #define mmiowb() barrier() |
46 | 47 | ||
47 | #ifdef CONFIG_X86_64 | 48 | #ifdef CONFIG_X86_64 |
49 | |||
48 | build_mmio_read(readq, "q", unsigned long, "=r", :"memory") | 50 | build_mmio_read(readq, "q", unsigned long, "=r", :"memory") |
49 | build_mmio_read(__readq, "q", unsigned long, "=r", ) | ||
50 | build_mmio_write(writeq, "q", unsigned long, "r", :"memory") | 51 | build_mmio_write(writeq, "q", unsigned long, "r", :"memory") |
51 | build_mmio_write(__writeq, "q", unsigned long, "r", ) | ||
52 | 52 | ||
53 | #define readq_relaxed(a) __readq(a) | 53 | #else |
54 | #define __raw_readq __readq | 54 | |
55 | #define __raw_writeq writeq | 55 | static inline __u64 readq(const volatile void __iomem *addr) |
56 | { | ||
57 | const volatile u32 __iomem *p = addr; | ||
58 | u32 low, high; | ||
59 | |||
60 | low = readl(p); | ||
61 | high = readl(p + 1); | ||
62 | |||
63 | return low + ((u64)high << 32); | ||
64 | } | ||
65 | |||
66 | static inline void writeq(__u64 val, volatile void __iomem *addr) | ||
67 | { | ||
68 | writel(val, addr); | ||
69 | writel(val >> 32, addr+4); | ||
70 | } | ||
56 | 71 | ||
57 | /* Let people know we have them */ | ||
58 | #define readq readq | ||
59 | #define writeq writeq | ||
60 | #endif | 72 | #endif |
61 | 73 | ||
62 | extern int iommu_bio_merge; | 74 | #define readq_relaxed(a) readq(a) |
75 | |||
76 | #define __raw_readq(a) readq(a) | ||
77 | #define __raw_writeq(val, addr) writeq(val, addr) | ||
78 | |||
79 | /* Let people know that we have them */ | ||
80 | #define readq readq | ||
81 | #define writeq writeq | ||
63 | 82 | ||
64 | #ifdef CONFIG_X86_32 | 83 | #ifdef CONFIG_X86_32 |
65 | # include "io_32.h" | 84 | # include "io_32.h" |
diff --git a/arch/x86/include/asm/io_64.h b/arch/x86/include/asm/io_64.h index fea325a1122f..563c16270ba6 100644 --- a/arch/x86/include/asm/io_64.h +++ b/arch/x86/include/asm/io_64.h | |||
@@ -232,8 +232,6 @@ void memset_io(volatile void __iomem *a, int b, size_t c); | |||
232 | 232 | ||
233 | #define flush_write_buffers() | 233 | #define flush_write_buffers() |
234 | 234 | ||
235 | #define BIO_VMERGE_BOUNDARY iommu_bio_merge | ||
236 | |||
237 | /* | 235 | /* |
238 | * Convert a virtual cached pointer to an uncached pointer | 236 | * Convert a virtual cached pointer to an uncached pointer |
239 | */ | 237 | */ |
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h index 6afd9933a7dd..e475e009ae5d 100644 --- a/arch/x86/include/asm/io_apic.h +++ b/arch/x86/include/asm/io_apic.h | |||
@@ -156,11 +156,21 @@ extern int sis_apic_bug; | |||
156 | /* 1 if "noapic" boot option passed */ | 156 | /* 1 if "noapic" boot option passed */ |
157 | extern int skip_ioapic_setup; | 157 | extern int skip_ioapic_setup; |
158 | 158 | ||
159 | /* 1 if "noapic" boot option passed */ | ||
160 | extern int noioapicquirk; | ||
161 | |||
162 | /* -1 if "noapic" boot option passed */ | ||
163 | extern int noioapicreroute; | ||
164 | |||
159 | /* 1 if the timer IRQ uses the '8259A Virtual Wire' mode */ | 165 | /* 1 if the timer IRQ uses the '8259A Virtual Wire' mode */ |
160 | extern int timer_through_8259; | 166 | extern int timer_through_8259; |
161 | 167 | ||
162 | static inline void disable_ioapic_setup(void) | 168 | static inline void disable_ioapic_setup(void) |
163 | { | 169 | { |
170 | #ifdef CONFIG_PCI | ||
171 | noioapicquirk = 1; | ||
172 | noioapicreroute = -1; | ||
173 | #endif | ||
164 | skip_ioapic_setup = 1; | 174 | skip_ioapic_setup = 1; |
165 | } | 175 | } |
166 | 176 | ||
diff --git a/arch/x86/include/asm/iommu.h b/arch/x86/include/asm/iommu.h index 0b500c5b6446..295b13193f4d 100644 --- a/arch/x86/include/asm/iommu.h +++ b/arch/x86/include/asm/iommu.h | |||
@@ -12,37 +12,4 @@ extern unsigned long iommu_nr_pages(unsigned long addr, unsigned long len); | |||
12 | /* 10 seconds */ | 12 | /* 10 seconds */ |
13 | #define DMAR_OPERATION_TIMEOUT ((cycles_t) tsc_khz*10*1000) | 13 | #define DMAR_OPERATION_TIMEOUT ((cycles_t) tsc_khz*10*1000) |
14 | 14 | ||
15 | #ifdef CONFIG_GART_IOMMU | ||
16 | extern int gart_iommu_aperture; | ||
17 | extern int gart_iommu_aperture_allowed; | ||
18 | extern int gart_iommu_aperture_disabled; | ||
19 | |||
20 | extern void early_gart_iommu_check(void); | ||
21 | extern void gart_iommu_init(void); | ||
22 | extern void gart_iommu_shutdown(void); | ||
23 | extern void __init gart_parse_options(char *); | ||
24 | extern void gart_iommu_hole_init(void); | ||
25 | |||
26 | #else | ||
27 | #define gart_iommu_aperture 0 | ||
28 | #define gart_iommu_aperture_allowed 0 | ||
29 | #define gart_iommu_aperture_disabled 1 | ||
30 | |||
31 | static inline void early_gart_iommu_check(void) | ||
32 | { | ||
33 | } | ||
34 | static inline void gart_iommu_init(void) | ||
35 | { | ||
36 | } | ||
37 | static inline void gart_iommu_shutdown(void) | ||
38 | { | ||
39 | } | ||
40 | static inline void gart_parse_options(char *options) | ||
41 | { | ||
42 | } | ||
43 | static inline void gart_iommu_hole_init(void) | ||
44 | { | ||
45 | } | ||
46 | #endif | ||
47 | |||
48 | #endif /* _ASM_X86_IOMMU_H */ | 15 | #endif /* _ASM_X86_IOMMU_H */ |
diff --git a/arch/x86/include/asm/irq.h b/arch/x86/include/asm/irq.h index bae0eda95486..28e409fc73f3 100644 --- a/arch/x86/include/asm/irq.h +++ b/arch/x86/include/asm/irq.h | |||
@@ -31,10 +31,6 @@ static inline int irq_canonicalize(int irq) | |||
31 | # endif | 31 | # endif |
32 | #endif | 32 | #endif |
33 | 33 | ||
34 | #ifdef CONFIG_IRQBALANCE | ||
35 | extern int irqbalance_disable(char *str); | ||
36 | #endif | ||
37 | |||
38 | #ifdef CONFIG_HOTPLUG_CPU | 34 | #ifdef CONFIG_HOTPLUG_CPU |
39 | #include <linux/cpumask.h> | 35 | #include <linux/cpumask.h> |
40 | extern void fixup_irqs(cpumask_t map); | 36 | extern void fixup_irqs(cpumask_t map); |
diff --git a/arch/x86/include/asm/irq_regs_32.h b/arch/x86/include/asm/irq_regs_32.h index af2f02d27fc7..86afd7473457 100644 --- a/arch/x86/include/asm/irq_regs_32.h +++ b/arch/x86/include/asm/irq_regs_32.h | |||
@@ -9,6 +9,8 @@ | |||
9 | 9 | ||
10 | #include <asm/percpu.h> | 10 | #include <asm/percpu.h> |
11 | 11 | ||
12 | #define ARCH_HAS_OWN_IRQ_REGS | ||
13 | |||
12 | DECLARE_PER_CPU(struct pt_regs *, irq_regs); | 14 | DECLARE_PER_CPU(struct pt_regs *, irq_regs); |
13 | 15 | ||
14 | static inline struct pt_regs *get_irq_regs(void) | 16 | static inline struct pt_regs *get_irq_regs(void) |
diff --git a/arch/x86/include/asm/kexec.h b/arch/x86/include/asm/kexec.h index a1f22771a15a..c61d8b2ab8b9 100644 --- a/arch/x86/include/asm/kexec.h +++ b/arch/x86/include/asm/kexec.h | |||
@@ -5,21 +5,8 @@ | |||
5 | # define PA_CONTROL_PAGE 0 | 5 | # define PA_CONTROL_PAGE 0 |
6 | # define VA_CONTROL_PAGE 1 | 6 | # define VA_CONTROL_PAGE 1 |
7 | # define PA_PGD 2 | 7 | # define PA_PGD 2 |
8 | # define VA_PGD 3 | 8 | # define PA_SWAP_PAGE 3 |
9 | # define PA_PTE_0 4 | 9 | # define PAGES_NR 4 |
10 | # define VA_PTE_0 5 | ||
11 | # define PA_PTE_1 6 | ||
12 | # define VA_PTE_1 7 | ||
13 | # define PA_SWAP_PAGE 8 | ||
14 | # ifdef CONFIG_X86_PAE | ||
15 | # define PA_PMD_0 9 | ||
16 | # define VA_PMD_0 10 | ||
17 | # define PA_PMD_1 11 | ||
18 | # define VA_PMD_1 12 | ||
19 | # define PAGES_NR 13 | ||
20 | # else | ||
21 | # define PAGES_NR 9 | ||
22 | # endif | ||
23 | #else | 10 | #else |
24 | # define PA_CONTROL_PAGE 0 | 11 | # define PA_CONTROL_PAGE 0 |
25 | # define VA_CONTROL_PAGE 1 | 12 | # define VA_CONTROL_PAGE 1 |
@@ -170,6 +157,20 @@ relocate_kernel(unsigned long indirection_page, | |||
170 | unsigned long start_address) ATTRIB_NORET; | 157 | unsigned long start_address) ATTRIB_NORET; |
171 | #endif | 158 | #endif |
172 | 159 | ||
160 | #ifdef CONFIG_X86_32 | ||
161 | #define ARCH_HAS_KIMAGE_ARCH | ||
162 | |||
163 | struct kimage_arch { | ||
164 | pgd_t *pgd; | ||
165 | #ifdef CONFIG_X86_PAE | ||
166 | pmd_t *pmd0; | ||
167 | pmd_t *pmd1; | ||
168 | #endif | ||
169 | pte_t *pte0; | ||
170 | pte_t *pte1; | ||
171 | }; | ||
172 | #endif | ||
173 | |||
173 | #endif /* __ASSEMBLY__ */ | 174 | #endif /* __ASSEMBLY__ */ |
174 | 175 | ||
175 | #endif /* _ASM_X86_KEXEC_H */ | 176 | #endif /* _ASM_X86_KEXEC_H */ |
diff --git a/arch/x86/include/asm/linkage.h b/arch/x86/include/asm/linkage.h index f61ee8f937e4..5d98d0b68ffc 100644 --- a/arch/x86/include/asm/linkage.h +++ b/arch/x86/include/asm/linkage.h | |||
@@ -57,5 +57,65 @@ | |||
57 | #define __ALIGN_STR ".align 16,0x90" | 57 | #define __ALIGN_STR ".align 16,0x90" |
58 | #endif | 58 | #endif |
59 | 59 | ||
60 | /* | ||
61 | * to check ENTRY_X86/END_X86 and | ||
62 | * KPROBE_ENTRY_X86/KPROBE_END_X86 | ||
63 | * unbalanced-missed-mixed appearance | ||
64 | */ | ||
65 | #define __set_entry_x86 .set ENTRY_X86_IN, 0 | ||
66 | #define __unset_entry_x86 .set ENTRY_X86_IN, 1 | ||
67 | #define __set_kprobe_x86 .set KPROBE_X86_IN, 0 | ||
68 | #define __unset_kprobe_x86 .set KPROBE_X86_IN, 1 | ||
69 | |||
70 | #define __macro_err_x86 .error "ENTRY_X86/KPROBE_X86 unbalanced,missed,mixed" | ||
71 | |||
72 | #define __check_entry_x86 \ | ||
73 | .ifdef ENTRY_X86_IN; \ | ||
74 | .ifeq ENTRY_X86_IN; \ | ||
75 | __macro_err_x86; \ | ||
76 | .abort; \ | ||
77 | .endif; \ | ||
78 | .endif | ||
79 | |||
80 | #define __check_kprobe_x86 \ | ||
81 | .ifdef KPROBE_X86_IN; \ | ||
82 | .ifeq KPROBE_X86_IN; \ | ||
83 | __macro_err_x86; \ | ||
84 | .abort; \ | ||
85 | .endif; \ | ||
86 | .endif | ||
87 | |||
88 | #define __check_entry_kprobe_x86 \ | ||
89 | __check_entry_x86; \ | ||
90 | __check_kprobe_x86 | ||
91 | |||
92 | #define ENTRY_KPROBE_FINAL_X86 __check_entry_kprobe_x86 | ||
93 | |||
94 | #define ENTRY_X86(name) \ | ||
95 | __check_entry_kprobe_x86; \ | ||
96 | __set_entry_x86; \ | ||
97 | .globl name; \ | ||
98 | __ALIGN; \ | ||
99 | name: | ||
100 | |||
101 | #define END_X86(name) \ | ||
102 | __unset_entry_x86; \ | ||
103 | __check_entry_kprobe_x86; \ | ||
104 | .size name, .-name | ||
105 | |||
106 | #define KPROBE_ENTRY_X86(name) \ | ||
107 | __check_entry_kprobe_x86; \ | ||
108 | __set_kprobe_x86; \ | ||
109 | .pushsection .kprobes.text, "ax"; \ | ||
110 | .globl name; \ | ||
111 | __ALIGN; \ | ||
112 | name: | ||
113 | |||
114 | #define KPROBE_END_X86(name) \ | ||
115 | __unset_kprobe_x86; \ | ||
116 | __check_entry_kprobe_x86; \ | ||
117 | .size name, .-name; \ | ||
118 | .popsection | ||
119 | |||
60 | #endif /* _ASM_X86_LINKAGE_H */ | 120 | #endif /* _ASM_X86_LINKAGE_H */ |
61 | 121 | ||
diff --git a/arch/x86/include/asm/mach-default/mach_apic.h b/arch/x86/include/asm/mach-default/mach_apic.h index ff3a6c236c00..6cb3a467e067 100644 --- a/arch/x86/include/asm/mach-default/mach_apic.h +++ b/arch/x86/include/asm/mach-default/mach_apic.h | |||
@@ -32,11 +32,13 @@ static inline cpumask_t target_cpus(void) | |||
32 | #define vector_allocation_domain (genapic->vector_allocation_domain) | 32 | #define vector_allocation_domain (genapic->vector_allocation_domain) |
33 | #define read_apic_id() (GET_APIC_ID(apic_read(APIC_ID))) | 33 | #define read_apic_id() (GET_APIC_ID(apic_read(APIC_ID))) |
34 | #define send_IPI_self (genapic->send_IPI_self) | 34 | #define send_IPI_self (genapic->send_IPI_self) |
35 | #define wakeup_secondary_cpu (genapic->wakeup_cpu) | ||
35 | extern void setup_apic_routing(void); | 36 | extern void setup_apic_routing(void); |
36 | #else | 37 | #else |
37 | #define INT_DELIVERY_MODE dest_LowestPrio | 38 | #define INT_DELIVERY_MODE dest_LowestPrio |
38 | #define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */ | 39 | #define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */ |
39 | #define TARGET_CPUS (target_cpus()) | 40 | #define TARGET_CPUS (target_cpus()) |
41 | #define wakeup_secondary_cpu wakeup_secondary_cpu_via_init | ||
40 | /* | 42 | /* |
41 | * Set up the logical destination ID. | 43 | * Set up the logical destination ID. |
42 | * | 44 | * |
diff --git a/arch/x86/include/asm/mach-default/mach_wakecpu.h b/arch/x86/include/asm/mach-default/mach_wakecpu.h index 9d80db91e992..ceb013660146 100644 --- a/arch/x86/include/asm/mach-default/mach_wakecpu.h +++ b/arch/x86/include/asm/mach-default/mach_wakecpu.h | |||
@@ -1,17 +1,8 @@ | |||
1 | #ifndef _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H | 1 | #ifndef _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H |
2 | #define _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H | 2 | #define _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H |
3 | 3 | ||
4 | /* | 4 | #define TRAMPOLINE_PHYS_LOW (0x467) |
5 | * This file copes with machines that wakeup secondary CPUs by the | 5 | #define TRAMPOLINE_PHYS_HIGH (0x469) |
6 | * INIT, INIT, STARTUP sequence. | ||
7 | */ | ||
8 | |||
9 | #define WAKE_SECONDARY_VIA_INIT | ||
10 | |||
11 | #define TRAMPOLINE_LOW phys_to_virt(0x467) | ||
12 | #define TRAMPOLINE_HIGH phys_to_virt(0x469) | ||
13 | |||
14 | #define boot_cpu_apicid boot_cpu_physical_apicid | ||
15 | 6 | ||
16 | static inline void wait_for_init_deassert(atomic_t *deassert) | 7 | static inline void wait_for_init_deassert(atomic_t *deassert) |
17 | { | 8 | { |
@@ -33,9 +24,12 @@ static inline void restore_NMI_vector(unsigned short *high, unsigned short *low) | |||
33 | { | 24 | { |
34 | } | 25 | } |
35 | 26 | ||
36 | #define inquire_remote_apic(apicid) do { \ | 27 | extern void __inquire_remote_apic(int apicid); |
37 | if (apic_verbosity >= APIC_DEBUG) \ | 28 | |
38 | __inquire_remote_apic(apicid); \ | 29 | static inline void inquire_remote_apic(int apicid) |
39 | } while (0) | 30 | { |
31 | if (apic_verbosity >= APIC_DEBUG) | ||
32 | __inquire_remote_apic(apicid); | ||
33 | } | ||
40 | 34 | ||
41 | #endif /* _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H */ | 35 | #endif /* _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H */ |
diff --git a/arch/x86/include/asm/mach-default/smpboot_hooks.h b/arch/x86/include/asm/mach-default/smpboot_hooks.h index dbab36d64d48..23bf52103b89 100644 --- a/arch/x86/include/asm/mach-default/smpboot_hooks.h +++ b/arch/x86/include/asm/mach-default/smpboot_hooks.h | |||
@@ -13,9 +13,11 @@ static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip) | |||
13 | CMOS_WRITE(0xa, 0xf); | 13 | CMOS_WRITE(0xa, 0xf); |
14 | local_flush_tlb(); | 14 | local_flush_tlb(); |
15 | pr_debug("1.\n"); | 15 | pr_debug("1.\n"); |
16 | *((volatile unsigned short *) TRAMPOLINE_HIGH) = start_eip >> 4; | 16 | *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH)) = |
17 | start_eip >> 4; | ||
17 | pr_debug("2.\n"); | 18 | pr_debug("2.\n"); |
18 | *((volatile unsigned short *) TRAMPOLINE_LOW) = start_eip & 0xf; | 19 | *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) = |
20 | start_eip & 0xf; | ||
19 | pr_debug("3.\n"); | 21 | pr_debug("3.\n"); |
20 | } | 22 | } |
21 | 23 | ||
@@ -32,7 +34,7 @@ static inline void smpboot_restore_warm_reset_vector(void) | |||
32 | */ | 34 | */ |
33 | CMOS_WRITE(0, 0xf); | 35 | CMOS_WRITE(0, 0xf); |
34 | 36 | ||
35 | *((volatile long *) phys_to_virt(0x467)) = 0; | 37 | *((volatile long *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) = 0; |
36 | } | 38 | } |
37 | 39 | ||
38 | static inline void __init smpboot_setup_io_apic(void) | 40 | static inline void __init smpboot_setup_io_apic(void) |
diff --git a/arch/x86/include/asm/mach-generic/mach_apic.h b/arch/x86/include/asm/mach-generic/mach_apic.h index 5180bd7478fb..e430f47df667 100644 --- a/arch/x86/include/asm/mach-generic/mach_apic.h +++ b/arch/x86/include/asm/mach-generic/mach_apic.h | |||
@@ -27,6 +27,7 @@ | |||
27 | #define vector_allocation_domain (genapic->vector_allocation_domain) | 27 | #define vector_allocation_domain (genapic->vector_allocation_domain) |
28 | #define enable_apic_mode (genapic->enable_apic_mode) | 28 | #define enable_apic_mode (genapic->enable_apic_mode) |
29 | #define phys_pkg_id (genapic->phys_pkg_id) | 29 | #define phys_pkg_id (genapic->phys_pkg_id) |
30 | #define wakeup_secondary_cpu (genapic->wakeup_cpu) | ||
30 | 31 | ||
31 | extern void generic_bigsmp_probe(void); | 32 | extern void generic_bigsmp_probe(void); |
32 | 33 | ||
diff --git a/arch/x86/include/asm/mach-generic/mach_wakecpu.h b/arch/x86/include/asm/mach-generic/mach_wakecpu.h new file mode 100644 index 000000000000..1ab16b168c8a --- /dev/null +++ b/arch/x86/include/asm/mach-generic/mach_wakecpu.h | |||
@@ -0,0 +1,12 @@ | |||
1 | #ifndef _ASM_X86_MACH_GENERIC_MACH_WAKECPU_H | ||
2 | #define _ASM_X86_MACH_GENERIC_MACH_WAKECPU_H | ||
3 | |||
4 | #define TRAMPOLINE_PHYS_LOW (genapic->trampoline_phys_low) | ||
5 | #define TRAMPOLINE_PHYS_HIGH (genapic->trampoline_phys_high) | ||
6 | #define wait_for_init_deassert (genapic->wait_for_init_deassert) | ||
7 | #define smp_callin_clear_local_apic (genapic->smp_callin_clear_local_apic) | ||
8 | #define store_NMI_vector (genapic->store_NMI_vector) | ||
9 | #define restore_NMI_vector (genapic->restore_NMI_vector) | ||
10 | #define inquire_remote_apic (genapic->inquire_remote_apic) | ||
11 | |||
12 | #endif /* _ASM_X86_MACH_GENERIC_MACH_APIC_H */ | ||
diff --git a/arch/x86/include/asm/mmu_context_32.h b/arch/x86/include/asm/mmu_context_32.h index 8e10015781fb..7e98ce1d2c0e 100644 --- a/arch/x86/include/asm/mmu_context_32.h +++ b/arch/x86/include/asm/mmu_context_32.h | |||
@@ -4,9 +4,8 @@ | |||
4 | static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) | 4 | static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) |
5 | { | 5 | { |
6 | #ifdef CONFIG_SMP | 6 | #ifdef CONFIG_SMP |
7 | unsigned cpu = smp_processor_id(); | 7 | if (x86_read_percpu(cpu_tlbstate.state) == TLBSTATE_OK) |
8 | if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_OK) | 8 | x86_write_percpu(cpu_tlbstate.state, TLBSTATE_LAZY); |
9 | per_cpu(cpu_tlbstate, cpu).state = TLBSTATE_LAZY; | ||
10 | #endif | 9 | #endif |
11 | } | 10 | } |
12 | 11 | ||
@@ -20,8 +19,8 @@ static inline void switch_mm(struct mm_struct *prev, | |||
20 | /* stop flush ipis for the previous mm */ | 19 | /* stop flush ipis for the previous mm */ |
21 | cpu_clear(cpu, prev->cpu_vm_mask); | 20 | cpu_clear(cpu, prev->cpu_vm_mask); |
22 | #ifdef CONFIG_SMP | 21 | #ifdef CONFIG_SMP |
23 | per_cpu(cpu_tlbstate, cpu).state = TLBSTATE_OK; | 22 | x86_write_percpu(cpu_tlbstate.state, TLBSTATE_OK); |
24 | per_cpu(cpu_tlbstate, cpu).active_mm = next; | 23 | x86_write_percpu(cpu_tlbstate.active_mm, next); |
25 | #endif | 24 | #endif |
26 | cpu_set(cpu, next->cpu_vm_mask); | 25 | cpu_set(cpu, next->cpu_vm_mask); |
27 | 26 | ||
@@ -36,8 +35,8 @@ static inline void switch_mm(struct mm_struct *prev, | |||
36 | } | 35 | } |
37 | #ifdef CONFIG_SMP | 36 | #ifdef CONFIG_SMP |
38 | else { | 37 | else { |
39 | per_cpu(cpu_tlbstate, cpu).state = TLBSTATE_OK; | 38 | x86_write_percpu(cpu_tlbstate.state, TLBSTATE_OK); |
40 | BUG_ON(per_cpu(cpu_tlbstate, cpu).active_mm != next); | 39 | BUG_ON(x86_read_percpu(cpu_tlbstate.active_mm) != next); |
41 | 40 | ||
42 | if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) { | 41 | if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) { |
43 | /* We were in lazy tlb mode and leave_mm disabled | 42 | /* We were in lazy tlb mode and leave_mm disabled |
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index e38859d577a1..cb58643947b9 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h | |||
@@ -85,7 +85,9 @@ | |||
85 | /* AMD64 MSRs. Not complete. See the architecture manual for a more | 85 | /* AMD64 MSRs. Not complete. See the architecture manual for a more |
86 | complete list. */ | 86 | complete list. */ |
87 | 87 | ||
88 | #define MSR_AMD64_PATCH_LEVEL 0x0000008b | ||
88 | #define MSR_AMD64_NB_CFG 0xc001001f | 89 | #define MSR_AMD64_NB_CFG 0xc001001f |
90 | #define MSR_AMD64_PATCH_LOADER 0xc0010020 | ||
89 | #define MSR_AMD64_IBSFETCHCTL 0xc0011030 | 91 | #define MSR_AMD64_IBSFETCHCTL 0xc0011030 |
90 | #define MSR_AMD64_IBSFETCHLINAD 0xc0011031 | 92 | #define MSR_AMD64_IBSFETCHLINAD 0xc0011031 |
91 | #define MSR_AMD64_IBSFETCHPHYSAD 0xc0011032 | 93 | #define MSR_AMD64_IBSFETCHPHYSAD 0xc0011032 |
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h index c2a812ebde89..4640ddd58fb9 100644 --- a/arch/x86/include/asm/msr.h +++ b/arch/x86/include/asm/msr.h | |||
@@ -22,10 +22,10 @@ static inline unsigned long long native_read_tscp(unsigned int *aux) | |||
22 | } | 22 | } |
23 | 23 | ||
24 | /* | 24 | /* |
25 | * i386 calling convention returns 64-bit value in edx:eax, while | 25 | * both i386 and x86_64 returns 64-bit value in edx:eax, but gcc's "A" |
26 | * x86_64 returns at rax. Also, the "A" constraint does not really | 26 | * constraint has different meanings. For i386, "A" means exactly |
27 | * mean rdx:rax in x86_64, so we need specialized behaviour for each | 27 | * edx:eax, while for x86_64 it doesn't mean rdx:rax or edx:eax. Instead, |
28 | * architecture | 28 | * it means rax *or* rdx. |
29 | */ | 29 | */ |
30 | #ifdef CONFIG_X86_64 | 30 | #ifdef CONFIG_X86_64 |
31 | #define DECLARE_ARGS(val, low, high) unsigned low, high | 31 | #define DECLARE_ARGS(val, low, high) unsigned low, high |
@@ -181,10 +181,10 @@ static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p) | |||
181 | } | 181 | } |
182 | 182 | ||
183 | #define rdtscl(low) \ | 183 | #define rdtscl(low) \ |
184 | ((low) = (u32)native_read_tsc()) | 184 | ((low) = (u32)__native_read_tsc()) |
185 | 185 | ||
186 | #define rdtscll(val) \ | 186 | #define rdtscll(val) \ |
187 | ((val) = native_read_tsc()) | 187 | ((val) = __native_read_tsc()) |
188 | 188 | ||
189 | #define rdpmc(counter, low, high) \ | 189 | #define rdpmc(counter, low, high) \ |
190 | do { \ | 190 | do { \ |
diff --git a/arch/x86/include/asm/numaq/wakecpu.h b/arch/x86/include/asm/numaq/wakecpu.h index c577bda5b1c5..6f499df8eddb 100644 --- a/arch/x86/include/asm/numaq/wakecpu.h +++ b/arch/x86/include/asm/numaq/wakecpu.h | |||
@@ -3,12 +3,8 @@ | |||
3 | 3 | ||
4 | /* This file copes with machines that wakeup secondary CPUs by NMIs */ | 4 | /* This file copes with machines that wakeup secondary CPUs by NMIs */ |
5 | 5 | ||
6 | #define WAKE_SECONDARY_VIA_NMI | 6 | #define TRAMPOLINE_PHYS_LOW (0x8) |
7 | 7 | #define TRAMPOLINE_PHYS_HIGH (0xa) | |
8 | #define TRAMPOLINE_LOW phys_to_virt(0x8) | ||
9 | #define TRAMPOLINE_HIGH phys_to_virt(0xa) | ||
10 | |||
11 | #define boot_cpu_apicid boot_cpu_logical_apicid | ||
12 | 8 | ||
13 | /* We don't do anything here because we use NMI's to boot instead */ | 9 | /* We don't do anything here because we use NMI's to boot instead */ |
14 | static inline void wait_for_init_deassert(atomic_t *deassert) | 10 | static inline void wait_for_init_deassert(atomic_t *deassert) |
@@ -27,17 +23,23 @@ static inline void smp_callin_clear_local_apic(void) | |||
27 | static inline void store_NMI_vector(unsigned short *high, unsigned short *low) | 23 | static inline void store_NMI_vector(unsigned short *high, unsigned short *low) |
28 | { | 24 | { |
29 | printk("Storing NMI vector\n"); | 25 | printk("Storing NMI vector\n"); |
30 | *high = *((volatile unsigned short *) TRAMPOLINE_HIGH); | 26 | *high = |
31 | *low = *((volatile unsigned short *) TRAMPOLINE_LOW); | 27 | *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH)); |
28 | *low = | ||
29 | *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW)); | ||
32 | } | 30 | } |
33 | 31 | ||
34 | static inline void restore_NMI_vector(unsigned short *high, unsigned short *low) | 32 | static inline void restore_NMI_vector(unsigned short *high, unsigned short *low) |
35 | { | 33 | { |
36 | printk("Restoring NMI vector\n"); | 34 | printk("Restoring NMI vector\n"); |
37 | *((volatile unsigned short *) TRAMPOLINE_HIGH) = *high; | 35 | *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH)) = |
38 | *((volatile unsigned short *) TRAMPOLINE_LOW) = *low; | 36 | *high; |
37 | *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) = | ||
38 | *low; | ||
39 | } | 39 | } |
40 | 40 | ||
41 | #define inquire_remote_apic(apicid) {} | 41 | static inline void inquire_remote_apic(int apicid) |
42 | { | ||
43 | } | ||
42 | 44 | ||
43 | #endif /* __ASM_NUMAQ_WAKECPU_H */ | 45 | #endif /* __ASM_NUMAQ_WAKECPU_H */ |
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h index 875b38edf193..647781298e7e 100644 --- a/arch/x86/include/asm/pci.h +++ b/arch/x86/include/asm/pci.h | |||
@@ -19,6 +19,8 @@ struct pci_sysdata { | |||
19 | }; | 19 | }; |
20 | 20 | ||
21 | extern int pci_routeirq; | 21 | extern int pci_routeirq; |
22 | extern int noioapicquirk; | ||
23 | extern int noioapicreroute; | ||
22 | 24 | ||
23 | /* scan a bus after allocating a pci_sysdata for it */ | 25 | /* scan a bus after allocating a pci_sysdata for it */ |
24 | extern struct pci_bus *pci_scan_bus_on_node(int busno, struct pci_ops *ops, | 26 | extern struct pci_bus *pci_scan_bus_on_node(int busno, struct pci_ops *ops, |
diff --git a/arch/x86/include/asm/pgtable-2level.h b/arch/x86/include/asm/pgtable-2level.h index b17edfd23628..e0d199fe1d83 100644 --- a/arch/x86/include/asm/pgtable-2level.h +++ b/arch/x86/include/asm/pgtable-2level.h | |||
@@ -56,23 +56,55 @@ static inline pte_t native_ptep_get_and_clear(pte_t *xp) | |||
56 | #define pte_none(x) (!(x).pte_low) | 56 | #define pte_none(x) (!(x).pte_low) |
57 | 57 | ||
58 | /* | 58 | /* |
59 | * Bits 0, 6 and 7 are taken, split up the 29 bits of offset | 59 | * Bits _PAGE_BIT_PRESENT, _PAGE_BIT_FILE and _PAGE_BIT_PROTNONE are taken, |
60 | * into this range: | 60 | * split up the 29 bits of offset into this range: |
61 | */ | 61 | */ |
62 | #define PTE_FILE_MAX_BITS 29 | 62 | #define PTE_FILE_MAX_BITS 29 |
63 | #define PTE_FILE_SHIFT1 (_PAGE_BIT_PRESENT + 1) | ||
64 | #if _PAGE_BIT_FILE < _PAGE_BIT_PROTNONE | ||
65 | #define PTE_FILE_SHIFT2 (_PAGE_BIT_FILE + 1) | ||
66 | #define PTE_FILE_SHIFT3 (_PAGE_BIT_PROTNONE + 1) | ||
67 | #else | ||
68 | #define PTE_FILE_SHIFT2 (_PAGE_BIT_PROTNONE + 1) | ||
69 | #define PTE_FILE_SHIFT3 (_PAGE_BIT_FILE + 1) | ||
70 | #endif | ||
71 | #define PTE_FILE_BITS1 (PTE_FILE_SHIFT2 - PTE_FILE_SHIFT1 - 1) | ||
72 | #define PTE_FILE_BITS2 (PTE_FILE_SHIFT3 - PTE_FILE_SHIFT2 - 1) | ||
63 | 73 | ||
64 | #define pte_to_pgoff(pte) \ | 74 | #define pte_to_pgoff(pte) \ |
65 | ((((pte).pte_low >> 1) & 0x1f) + (((pte).pte_low >> 8) << 5)) | 75 | ((((pte).pte_low >> PTE_FILE_SHIFT1) \ |
76 | & ((1U << PTE_FILE_BITS1) - 1)) \ | ||
77 | + ((((pte).pte_low >> PTE_FILE_SHIFT2) \ | ||
78 | & ((1U << PTE_FILE_BITS2) - 1)) << PTE_FILE_BITS1) \ | ||
79 | + (((pte).pte_low >> PTE_FILE_SHIFT3) \ | ||
80 | << (PTE_FILE_BITS1 + PTE_FILE_BITS2))) | ||
66 | 81 | ||
67 | #define pgoff_to_pte(off) \ | 82 | #define pgoff_to_pte(off) \ |
68 | ((pte_t) { .pte_low = (((off) & 0x1f) << 1) + \ | 83 | ((pte_t) { .pte_low = \ |
69 | (((off) >> 5) << 8) + _PAGE_FILE }) | 84 | (((off) & ((1U << PTE_FILE_BITS1) - 1)) << PTE_FILE_SHIFT1) \ |
85 | + ((((off) >> PTE_FILE_BITS1) & ((1U << PTE_FILE_BITS2) - 1)) \ | ||
86 | << PTE_FILE_SHIFT2) \ | ||
87 | + (((off) >> (PTE_FILE_BITS1 + PTE_FILE_BITS2)) \ | ||
88 | << PTE_FILE_SHIFT3) \ | ||
89 | + _PAGE_FILE }) | ||
70 | 90 | ||
71 | /* Encode and de-code a swap entry */ | 91 | /* Encode and de-code a swap entry */ |
72 | #define __swp_type(x) (((x).val >> 1) & 0x1f) | 92 | #if _PAGE_BIT_FILE < _PAGE_BIT_PROTNONE |
73 | #define __swp_offset(x) ((x).val >> 8) | 93 | #define SWP_TYPE_BITS (_PAGE_BIT_FILE - _PAGE_BIT_PRESENT - 1) |
74 | #define __swp_entry(type, offset) \ | 94 | #define SWP_OFFSET_SHIFT (_PAGE_BIT_PROTNONE + 1) |
75 | ((swp_entry_t) { ((type) << 1) | ((offset) << 8) }) | 95 | #else |
96 | #define SWP_TYPE_BITS (_PAGE_BIT_PROTNONE - _PAGE_BIT_PRESENT - 1) | ||
97 | #define SWP_OFFSET_SHIFT (_PAGE_BIT_FILE + 1) | ||
98 | #endif | ||
99 | |||
100 | #define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS) | ||
101 | |||
102 | #define __swp_type(x) (((x).val >> (_PAGE_BIT_PRESENT + 1)) \ | ||
103 | & ((1U << SWP_TYPE_BITS) - 1)) | ||
104 | #define __swp_offset(x) ((x).val >> SWP_OFFSET_SHIFT) | ||
105 | #define __swp_entry(type, offset) ((swp_entry_t) { \ | ||
106 | ((type) << (_PAGE_BIT_PRESENT + 1)) \ | ||
107 | | ((offset) << SWP_OFFSET_SHIFT) }) | ||
76 | #define __pte_to_swp_entry(pte) ((swp_entry_t) { (pte).pte_low }) | 108 | #define __pte_to_swp_entry(pte) ((swp_entry_t) { (pte).pte_low }) |
77 | #define __swp_entry_to_pte(x) ((pte_t) { .pte = (x).val }) | 109 | #define __swp_entry_to_pte(x) ((pte_t) { .pte = (x).val }) |
78 | 110 | ||
diff --git a/arch/x86/include/asm/pgtable-3level.h b/arch/x86/include/asm/pgtable-3level.h index 52597aeadfff..447da43cddb3 100644 --- a/arch/x86/include/asm/pgtable-3level.h +++ b/arch/x86/include/asm/pgtable-3level.h | |||
@@ -166,6 +166,7 @@ static inline int pte_none(pte_t pte) | |||
166 | #define PTE_FILE_MAX_BITS 32 | 166 | #define PTE_FILE_MAX_BITS 32 |
167 | 167 | ||
168 | /* Encode and de-code a swap entry */ | 168 | /* Encode and de-code a swap entry */ |
169 | #define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > 5) | ||
169 | #define __swp_type(x) (((x).val) & 0x1f) | 170 | #define __swp_type(x) (((x).val) & 0x1f) |
170 | #define __swp_offset(x) ((x).val >> 5) | 171 | #define __swp_offset(x) ((x).val >> 5) |
171 | #define __swp_entry(type, offset) ((swp_entry_t){(type) | (offset) << 5}) | 172 | #define __swp_entry(type, offset) ((swp_entry_t){(type) | (offset) << 5}) |
diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h index c012f3b11671..83e69f4a37f0 100644 --- a/arch/x86/include/asm/pgtable.h +++ b/arch/x86/include/asm/pgtable.h | |||
@@ -10,7 +10,6 @@ | |||
10 | #define _PAGE_BIT_PCD 4 /* page cache disabled */ | 10 | #define _PAGE_BIT_PCD 4 /* page cache disabled */ |
11 | #define _PAGE_BIT_ACCESSED 5 /* was accessed (raised by CPU) */ | 11 | #define _PAGE_BIT_ACCESSED 5 /* was accessed (raised by CPU) */ |
12 | #define _PAGE_BIT_DIRTY 6 /* was written to (raised by CPU) */ | 12 | #define _PAGE_BIT_DIRTY 6 /* was written to (raised by CPU) */ |
13 | #define _PAGE_BIT_FILE 6 | ||
14 | #define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */ | 13 | #define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */ |
15 | #define _PAGE_BIT_PAT 7 /* on 4KB pages */ | 14 | #define _PAGE_BIT_PAT 7 /* on 4KB pages */ |
16 | #define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */ | 15 | #define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */ |
@@ -22,6 +21,12 @@ | |||
22 | #define _PAGE_BIT_CPA_TEST _PAGE_BIT_UNUSED1 | 21 | #define _PAGE_BIT_CPA_TEST _PAGE_BIT_UNUSED1 |
23 | #define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */ | 22 | #define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */ |
24 | 23 | ||
24 | /* If _PAGE_BIT_PRESENT is clear, we use these: */ | ||
25 | /* - if the user mapped it with PROT_NONE; pte_present gives true */ | ||
26 | #define _PAGE_BIT_PROTNONE _PAGE_BIT_GLOBAL | ||
27 | /* - set: nonlinear file mapping, saved PTE; unset:swap */ | ||
28 | #define _PAGE_BIT_FILE _PAGE_BIT_DIRTY | ||
29 | |||
25 | #define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT) | 30 | #define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT) |
26 | #define _PAGE_RW (_AT(pteval_t, 1) << _PAGE_BIT_RW) | 31 | #define _PAGE_RW (_AT(pteval_t, 1) << _PAGE_BIT_RW) |
27 | #define _PAGE_USER (_AT(pteval_t, 1) << _PAGE_BIT_USER) | 32 | #define _PAGE_USER (_AT(pteval_t, 1) << _PAGE_BIT_USER) |
@@ -46,11 +51,8 @@ | |||
46 | #define _PAGE_NX (_AT(pteval_t, 0)) | 51 | #define _PAGE_NX (_AT(pteval_t, 0)) |
47 | #endif | 52 | #endif |
48 | 53 | ||
49 | /* If _PAGE_PRESENT is clear, we use these: */ | 54 | #define _PAGE_FILE (_AT(pteval_t, 1) << _PAGE_BIT_FILE) |
50 | #define _PAGE_FILE _PAGE_DIRTY /* nonlinear file mapping, | 55 | #define _PAGE_PROTNONE (_AT(pteval_t, 1) << _PAGE_BIT_PROTNONE) |
51 | * saved PTE; unset:swap */ | ||
52 | #define _PAGE_PROTNONE _PAGE_PSE /* if the user mapped it with PROT_NONE; | ||
53 | pte_present gives true */ | ||
54 | 56 | ||
55 | #define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \ | 57 | #define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \ |
56 | _PAGE_ACCESSED | _PAGE_DIRTY) | 58 | _PAGE_ACCESSED | _PAGE_DIRTY) |
@@ -158,8 +160,19 @@ | |||
158 | #define PGD_IDENT_ATTR 0x001 /* PRESENT (no other attributes) */ | 160 | #define PGD_IDENT_ATTR 0x001 /* PRESENT (no other attributes) */ |
159 | #endif | 161 | #endif |
160 | 162 | ||
163 | /* | ||
164 | * Macro to mark a page protection value as UC- | ||
165 | */ | ||
166 | #define pgprot_noncached(prot) \ | ||
167 | ((boot_cpu_data.x86 > 3) \ | ||
168 | ? (__pgprot(pgprot_val(prot) | _PAGE_CACHE_UC_MINUS)) \ | ||
169 | : (prot)) | ||
170 | |||
161 | #ifndef __ASSEMBLY__ | 171 | #ifndef __ASSEMBLY__ |
162 | 172 | ||
173 | #define pgprot_writecombine pgprot_writecombine | ||
174 | extern pgprot_t pgprot_writecombine(pgprot_t prot); | ||
175 | |||
163 | /* | 176 | /* |
164 | * ZERO_PAGE is a global shared page that is always zero: used | 177 | * ZERO_PAGE is a global shared page that is always zero: used |
165 | * for zero-mapped memory areas etc.. | 178 | * for zero-mapped memory areas etc.. |
@@ -329,6 +342,9 @@ static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) | |||
329 | #define canon_pgprot(p) __pgprot(pgprot_val(p) & __supported_pte_mask) | 342 | #define canon_pgprot(p) __pgprot(pgprot_val(p) & __supported_pte_mask) |
330 | 343 | ||
331 | #ifndef __ASSEMBLY__ | 344 | #ifndef __ASSEMBLY__ |
345 | /* Indicate that x86 has its own track and untrack pfn vma functions */ | ||
346 | #define __HAVE_PFNMAP_TRACKING | ||
347 | |||
332 | #define __HAVE_PHYS_MEM_ACCESS_PROT | 348 | #define __HAVE_PHYS_MEM_ACCESS_PROT |
333 | struct file; | 349 | struct file; |
334 | pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, | 350 | pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, |
diff --git a/arch/x86/include/asm/pgtable_32.h b/arch/x86/include/asm/pgtable_32.h index f9d5889b336b..72b020deb46b 100644 --- a/arch/x86/include/asm/pgtable_32.h +++ b/arch/x86/include/asm/pgtable_32.h | |||
@@ -101,15 +101,6 @@ extern unsigned long pg0[]; | |||
101 | #endif | 101 | #endif |
102 | 102 | ||
103 | /* | 103 | /* |
104 | * Macro to mark a page protection value as "uncacheable". | ||
105 | * On processors which do not support it, this is a no-op. | ||
106 | */ | ||
107 | #define pgprot_noncached(prot) \ | ||
108 | ((boot_cpu_data.x86 > 3) \ | ||
109 | ? (__pgprot(pgprot_val(prot) | _PAGE_PCD | _PAGE_PWT)) \ | ||
110 | : (prot)) | ||
111 | |||
112 | /* | ||
113 | * Conversion functions: convert a page and protection to a page entry, | 104 | * Conversion functions: convert a page and protection to a page entry, |
114 | * and a page entry and page directory to the page they refer to. | 105 | * and a page entry and page directory to the page they refer to. |
115 | */ | 106 | */ |
diff --git a/arch/x86/include/asm/pgtable_64.h b/arch/x86/include/asm/pgtable_64.h index 545a0e042bb2..ba09289accaa 100644 --- a/arch/x86/include/asm/pgtable_64.h +++ b/arch/x86/include/asm/pgtable_64.h | |||
@@ -146,7 +146,7 @@ static inline void native_pgd_clear(pgd_t *pgd) | |||
146 | #define PGDIR_MASK (~(PGDIR_SIZE - 1)) | 146 | #define PGDIR_MASK (~(PGDIR_SIZE - 1)) |
147 | 147 | ||
148 | 148 | ||
149 | #define MAXMEM _AC(0x00003fffffffffff, UL) | 149 | #define MAXMEM _AC(__AC(1, UL) << MAX_PHYSMEM_BITS, UL) |
150 | #define VMALLOC_START _AC(0xffffc20000000000, UL) | 150 | #define VMALLOC_START _AC(0xffffc20000000000, UL) |
151 | #define VMALLOC_END _AC(0xffffe1ffffffffff, UL) | 151 | #define VMALLOC_END _AC(0xffffe1ffffffffff, UL) |
152 | #define VMEMMAP_START _AC(0xffffe20000000000, UL) | 152 | #define VMEMMAP_START _AC(0xffffe20000000000, UL) |
@@ -177,12 +177,6 @@ static inline int pmd_bad(pmd_t pmd) | |||
177 | #define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT)) /* FIXME: is this right? */ | 177 | #define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT)) /* FIXME: is this right? */ |
178 | 178 | ||
179 | /* | 179 | /* |
180 | * Macro to mark a page protection value as "uncacheable". | ||
181 | */ | ||
182 | #define pgprot_noncached(prot) \ | ||
183 | (__pgprot(pgprot_val((prot)) | _PAGE_PCD | _PAGE_PWT)) | ||
184 | |||
185 | /* | ||
186 | * Conversion functions: convert a page and protection to a page entry, | 180 | * Conversion functions: convert a page and protection to a page entry, |
187 | * and a page entry and page directory to the page they refer to. | 181 | * and a page entry and page directory to the page they refer to. |
188 | */ | 182 | */ |
@@ -250,10 +244,22 @@ static inline int pud_large(pud_t pte) | |||
250 | extern int direct_gbpages; | 244 | extern int direct_gbpages; |
251 | 245 | ||
252 | /* Encode and de-code a swap entry */ | 246 | /* Encode and de-code a swap entry */ |
253 | #define __swp_type(x) (((x).val >> 1) & 0x3f) | 247 | #if _PAGE_BIT_FILE < _PAGE_BIT_PROTNONE |
254 | #define __swp_offset(x) ((x).val >> 8) | 248 | #define SWP_TYPE_BITS (_PAGE_BIT_FILE - _PAGE_BIT_PRESENT - 1) |
255 | #define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 1) | \ | 249 | #define SWP_OFFSET_SHIFT (_PAGE_BIT_PROTNONE + 1) |
256 | ((offset) << 8) }) | 250 | #else |
251 | #define SWP_TYPE_BITS (_PAGE_BIT_PROTNONE - _PAGE_BIT_PRESENT - 1) | ||
252 | #define SWP_OFFSET_SHIFT (_PAGE_BIT_FILE + 1) | ||
253 | #endif | ||
254 | |||
255 | #define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS) | ||
256 | |||
257 | #define __swp_type(x) (((x).val >> (_PAGE_BIT_PRESENT + 1)) \ | ||
258 | & ((1U << SWP_TYPE_BITS) - 1)) | ||
259 | #define __swp_offset(x) ((x).val >> SWP_OFFSET_SHIFT) | ||
260 | #define __swp_entry(type, offset) ((swp_entry_t) { \ | ||
261 | ((type) << (_PAGE_BIT_PRESENT + 1)) \ | ||
262 | | ((offset) << SWP_OFFSET_SHIFT) }) | ||
257 | #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val((pte)) }) | 263 | #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val((pte)) }) |
258 | #define __swp_entry_to_pte(x) ((pte_t) { .pte = (x).val }) | 264 | #define __swp_entry_to_pte(x) ((pte_t) { .pte = (x).val }) |
259 | 265 | ||
diff --git a/arch/x86/include/asm/prctl.h b/arch/x86/include/asm/prctl.h index fe681147a4f7..a8894647dd9a 100644 --- a/arch/x86/include/asm/prctl.h +++ b/arch/x86/include/asm/prctl.h | |||
@@ -6,5 +6,8 @@ | |||
6 | #define ARCH_GET_FS 0x1003 | 6 | #define ARCH_GET_FS 0x1003 |
7 | #define ARCH_GET_GS 0x1004 | 7 | #define ARCH_GET_GS 0x1004 |
8 | 8 | ||
9 | #ifdef CONFIG_X86_64 | ||
10 | extern long sys_arch_prctl(int, unsigned long); | ||
11 | #endif /* CONFIG_X86_64 */ | ||
9 | 12 | ||
10 | #endif /* _ASM_X86_PRCTL_H */ | 13 | #endif /* _ASM_X86_PRCTL_H */ |
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h index 5ca01e383269..a570eafa4755 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h | |||
@@ -110,6 +110,7 @@ struct cpuinfo_x86 { | |||
110 | /* Index into per_cpu list: */ | 110 | /* Index into per_cpu list: */ |
111 | u16 cpu_index; | 111 | u16 cpu_index; |
112 | #endif | 112 | #endif |
113 | unsigned int x86_hyper_vendor; | ||
113 | } __attribute__((__aligned__(SMP_CACHE_BYTES))); | 114 | } __attribute__((__aligned__(SMP_CACHE_BYTES))); |
114 | 115 | ||
115 | #define X86_VENDOR_INTEL 0 | 116 | #define X86_VENDOR_INTEL 0 |
@@ -123,6 +124,9 @@ struct cpuinfo_x86 { | |||
123 | 124 | ||
124 | #define X86_VENDOR_UNKNOWN 0xff | 125 | #define X86_VENDOR_UNKNOWN 0xff |
125 | 126 | ||
127 | #define X86_HYPER_VENDOR_NONE 0 | ||
128 | #define X86_HYPER_VENDOR_VMWARE 1 | ||
129 | |||
126 | /* | 130 | /* |
127 | * capabilities of CPUs | 131 | * capabilities of CPUs |
128 | */ | 132 | */ |
diff --git a/arch/x86/include/asm/reboot.h b/arch/x86/include/asm/reboot.h index df7710354f85..562d4fd31ba8 100644 --- a/arch/x86/include/asm/reboot.h +++ b/arch/x86/include/asm/reboot.h | |||
@@ -1,6 +1,8 @@ | |||
1 | #ifndef _ASM_X86_REBOOT_H | 1 | #ifndef _ASM_X86_REBOOT_H |
2 | #define _ASM_X86_REBOOT_H | 2 | #define _ASM_X86_REBOOT_H |
3 | 3 | ||
4 | #include <linux/kdebug.h> | ||
5 | |||
4 | struct pt_regs; | 6 | struct pt_regs; |
5 | 7 | ||
6 | struct machine_ops { | 8 | struct machine_ops { |
@@ -18,4 +20,7 @@ void native_machine_crash_shutdown(struct pt_regs *regs); | |||
18 | void native_machine_shutdown(void); | 20 | void native_machine_shutdown(void); |
19 | void machine_real_restart(const unsigned char *code, int length); | 21 | void machine_real_restart(const unsigned char *code, int length); |
20 | 22 | ||
23 | typedef void (*nmi_shootdown_cb)(int, struct die_args*); | ||
24 | void nmi_shootdown_cpus(nmi_shootdown_cb callback); | ||
25 | |||
21 | #endif /* _ASM_X86_REBOOT_H */ | 26 | #endif /* _ASM_X86_REBOOT_H */ |
diff --git a/arch/x86/include/asm/setup.h b/arch/x86/include/asm/setup.h index f12d37237465..4fcd53fd5f43 100644 --- a/arch/x86/include/asm/setup.h +++ b/arch/x86/include/asm/setup.h | |||
@@ -8,6 +8,10 @@ | |||
8 | /* Interrupt control for vSMPowered x86_64 systems */ | 8 | /* Interrupt control for vSMPowered x86_64 systems */ |
9 | void vsmp_init(void); | 9 | void vsmp_init(void); |
10 | 10 | ||
11 | |||
12 | void setup_bios_corruption_check(void); | ||
13 | |||
14 | |||
11 | #ifdef CONFIG_X86_VISWS | 15 | #ifdef CONFIG_X86_VISWS |
12 | extern void visws_early_detect(void); | 16 | extern void visws_early_detect(void); |
13 | extern int is_visws_box(void); | 17 | extern int is_visws_box(void); |
@@ -16,6 +20,8 @@ static inline void visws_early_detect(void) { } | |||
16 | static inline int is_visws_box(void) { return 0; } | 20 | static inline int is_visws_box(void) { return 0; } |
17 | #endif | 21 | #endif |
18 | 22 | ||
23 | extern int wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip); | ||
24 | extern int wakeup_secondary_cpu_via_init(int apicid, unsigned long start_eip); | ||
19 | /* | 25 | /* |
20 | * Any setup quirks to be performed? | 26 | * Any setup quirks to be performed? |
21 | */ | 27 | */ |
@@ -39,6 +45,7 @@ struct x86_quirks { | |||
39 | void (*smp_read_mpc_oem)(struct mp_config_oemtable *oemtable, | 45 | void (*smp_read_mpc_oem)(struct mp_config_oemtable *oemtable, |
40 | unsigned short oemsize); | 46 | unsigned short oemsize); |
41 | int (*setup_ioapic_ids)(void); | 47 | int (*setup_ioapic_ids)(void); |
48 | int (*update_genapic)(void); | ||
42 | }; | 49 | }; |
43 | 50 | ||
44 | extern struct x86_quirks *x86_quirks; | 51 | extern struct x86_quirks *x86_quirks; |
diff --git a/arch/x86/include/asm/sigframe.h b/arch/x86/include/asm/sigframe.h new file mode 100644 index 000000000000..4e0fe26d27d3 --- /dev/null +++ b/arch/x86/include/asm/sigframe.h | |||
@@ -0,0 +1,70 @@ | |||
1 | #ifndef _ASM_X86_SIGFRAME_H | ||
2 | #define _ASM_X86_SIGFRAME_H | ||
3 | |||
4 | #include <asm/sigcontext.h> | ||
5 | #include <asm/siginfo.h> | ||
6 | #include <asm/ucontext.h> | ||
7 | |||
8 | #ifdef CONFIG_X86_32 | ||
9 | #define sigframe_ia32 sigframe | ||
10 | #define rt_sigframe_ia32 rt_sigframe | ||
11 | #define sigcontext_ia32 sigcontext | ||
12 | #define _fpstate_ia32 _fpstate | ||
13 | #define ucontext_ia32 ucontext | ||
14 | #else /* !CONFIG_X86_32 */ | ||
15 | |||
16 | #ifdef CONFIG_IA32_EMULATION | ||
17 | #include <asm/ia32.h> | ||
18 | #endif /* CONFIG_IA32_EMULATION */ | ||
19 | |||
20 | #endif /* CONFIG_X86_32 */ | ||
21 | |||
22 | #if defined(CONFIG_X86_32) || defined(CONFIG_IA32_EMULATION) | ||
23 | struct sigframe_ia32 { | ||
24 | u32 pretcode; | ||
25 | int sig; | ||
26 | struct sigcontext_ia32 sc; | ||
27 | /* | ||
28 | * fpstate is unused. fpstate is moved/allocated after | ||
29 | * retcode[] below. This movement allows to have the FP state and the | ||
30 | * future state extensions (xsave) stay together. | ||
31 | * And at the same time retaining the unused fpstate, prevents changing | ||
32 | * the offset of extramask[] in the sigframe and thus prevent any | ||
33 | * legacy application accessing/modifying it. | ||
34 | */ | ||
35 | struct _fpstate_ia32 fpstate_unused; | ||
36 | #ifdef CONFIG_IA32_EMULATION | ||
37 | unsigned int extramask[_COMPAT_NSIG_WORDS-1]; | ||
38 | #else /* !CONFIG_IA32_EMULATION */ | ||
39 | unsigned long extramask[_NSIG_WORDS-1]; | ||
40 | #endif /* CONFIG_IA32_EMULATION */ | ||
41 | char retcode[8]; | ||
42 | /* fp state follows here */ | ||
43 | }; | ||
44 | |||
45 | struct rt_sigframe_ia32 { | ||
46 | u32 pretcode; | ||
47 | int sig; | ||
48 | u32 pinfo; | ||
49 | u32 puc; | ||
50 | #ifdef CONFIG_IA32_EMULATION | ||
51 | compat_siginfo_t info; | ||
52 | #else /* !CONFIG_IA32_EMULATION */ | ||
53 | struct siginfo info; | ||
54 | #endif /* CONFIG_IA32_EMULATION */ | ||
55 | struct ucontext_ia32 uc; | ||
56 | char retcode[8]; | ||
57 | /* fp state follows here */ | ||
58 | }; | ||
59 | #endif /* defined(CONFIG_X86_32) || defined(CONFIG_IA32_EMULATION) */ | ||
60 | |||
61 | #ifdef CONFIG_X86_64 | ||
62 | struct rt_sigframe { | ||
63 | char __user *pretcode; | ||
64 | struct ucontext uc; | ||
65 | struct siginfo info; | ||
66 | /* fp state follows here */ | ||
67 | }; | ||
68 | #endif /* CONFIG_X86_64 */ | ||
69 | |||
70 | #endif /* _ASM_X86_SIGFRAME_H */ | ||
diff --git a/arch/x86/include/asm/signal.h b/arch/x86/include/asm/signal.h index 96ac44f275da..7761a5d554bb 100644 --- a/arch/x86/include/asm/signal.h +++ b/arch/x86/include/asm/signal.h | |||
@@ -121,6 +121,10 @@ typedef unsigned long sigset_t; | |||
121 | 121 | ||
122 | #ifndef __ASSEMBLY__ | 122 | #ifndef __ASSEMBLY__ |
123 | 123 | ||
124 | # ifdef __KERNEL__ | ||
125 | extern void do_notify_resume(struct pt_regs *, void *, __u32); | ||
126 | # endif /* __KERNEL__ */ | ||
127 | |||
124 | #ifdef __i386__ | 128 | #ifdef __i386__ |
125 | # ifdef __KERNEL__ | 129 | # ifdef __KERNEL__ |
126 | struct old_sigaction { | 130 | struct old_sigaction { |
@@ -141,8 +145,6 @@ struct k_sigaction { | |||
141 | struct sigaction sa; | 145 | struct sigaction sa; |
142 | }; | 146 | }; |
143 | 147 | ||
144 | extern void do_notify_resume(struct pt_regs *, void *, __u32); | ||
145 | |||
146 | # else /* __KERNEL__ */ | 148 | # else /* __KERNEL__ */ |
147 | /* Here we must cater to libcs that poke about in kernel headers. */ | 149 | /* Here we must cater to libcs that poke about in kernel headers. */ |
148 | 150 | ||
diff --git a/arch/x86/include/asm/sparsemem.h b/arch/x86/include/asm/sparsemem.h index be44f7dab395..e3cc3c063ec5 100644 --- a/arch/x86/include/asm/sparsemem.h +++ b/arch/x86/include/asm/sparsemem.h | |||
@@ -27,7 +27,7 @@ | |||
27 | #else /* CONFIG_X86_32 */ | 27 | #else /* CONFIG_X86_32 */ |
28 | # define SECTION_SIZE_BITS 27 /* matt - 128 is convenient right now */ | 28 | # define SECTION_SIZE_BITS 27 /* matt - 128 is convenient right now */ |
29 | # define MAX_PHYSADDR_BITS 44 | 29 | # define MAX_PHYSADDR_BITS 44 |
30 | # define MAX_PHYSMEM_BITS 44 | 30 | # define MAX_PHYSMEM_BITS 44 /* Can be max 45 bits */ |
31 | #endif | 31 | #endif |
32 | 32 | ||
33 | #endif /* CONFIG_SPARSEMEM */ | 33 | #endif /* CONFIG_SPARSEMEM */ |
diff --git a/arch/x86/include/asm/syscalls.h b/arch/x86/include/asm/syscalls.h index 87803da44010..9c6797c3e56c 100644 --- a/arch/x86/include/asm/syscalls.h +++ b/arch/x86/include/asm/syscalls.h | |||
@@ -19,6 +19,13 @@ | |||
19 | /* kernel/ioport.c */ | 19 | /* kernel/ioport.c */ |
20 | asmlinkage long sys_ioperm(unsigned long, unsigned long, int); | 20 | asmlinkage long sys_ioperm(unsigned long, unsigned long, int); |
21 | 21 | ||
22 | /* kernel/ldt.c */ | ||
23 | asmlinkage int sys_modify_ldt(int, void __user *, unsigned long); | ||
24 | |||
25 | /* kernel/tls.c */ | ||
26 | asmlinkage int sys_set_thread_area(struct user_desc __user *); | ||
27 | asmlinkage int sys_get_thread_area(struct user_desc __user *); | ||
28 | |||
22 | /* X86_32 only */ | 29 | /* X86_32 only */ |
23 | #ifdef CONFIG_X86_32 | 30 | #ifdef CONFIG_X86_32 |
24 | /* kernel/process_32.c */ | 31 | /* kernel/process_32.c */ |
@@ -33,14 +40,11 @@ asmlinkage int sys_sigaction(int, const struct old_sigaction __user *, | |||
33 | struct old_sigaction __user *); | 40 | struct old_sigaction __user *); |
34 | asmlinkage int sys_sigaltstack(unsigned long); | 41 | asmlinkage int sys_sigaltstack(unsigned long); |
35 | asmlinkage unsigned long sys_sigreturn(unsigned long); | 42 | asmlinkage unsigned long sys_sigreturn(unsigned long); |
36 | asmlinkage int sys_rt_sigreturn(unsigned long); | 43 | asmlinkage int sys_rt_sigreturn(struct pt_regs); |
37 | 44 | ||
38 | /* kernel/ioport.c */ | 45 | /* kernel/ioport.c */ |
39 | asmlinkage long sys_iopl(unsigned long); | 46 | asmlinkage long sys_iopl(unsigned long); |
40 | 47 | ||
41 | /* kernel/ldt.c */ | ||
42 | asmlinkage int sys_modify_ldt(int, void __user *, unsigned long); | ||
43 | |||
44 | /* kernel/sys_i386_32.c */ | 48 | /* kernel/sys_i386_32.c */ |
45 | asmlinkage long sys_mmap2(unsigned long, unsigned long, unsigned long, | 49 | asmlinkage long sys_mmap2(unsigned long, unsigned long, unsigned long, |
46 | unsigned long, unsigned long, unsigned long); | 50 | unsigned long, unsigned long, unsigned long); |
@@ -54,10 +58,6 @@ asmlinkage int sys_uname(struct old_utsname __user *); | |||
54 | struct oldold_utsname; | 58 | struct oldold_utsname; |
55 | asmlinkage int sys_olduname(struct oldold_utsname __user *); | 59 | asmlinkage int sys_olduname(struct oldold_utsname __user *); |
56 | 60 | ||
57 | /* kernel/tls.c */ | ||
58 | asmlinkage int sys_set_thread_area(struct user_desc __user *); | ||
59 | asmlinkage int sys_get_thread_area(struct user_desc __user *); | ||
60 | |||
61 | /* kernel/vm86_32.c */ | 61 | /* kernel/vm86_32.c */ |
62 | asmlinkage int sys_vm86old(struct pt_regs); | 62 | asmlinkage int sys_vm86old(struct pt_regs); |
63 | asmlinkage int sys_vm86(struct pt_regs); | 63 | asmlinkage int sys_vm86(struct pt_regs); |
diff --git a/arch/x86/include/asm/system.h b/arch/x86/include/asm/system.h index 2ed3f0f44ff7..8e626ea33a1a 100644 --- a/arch/x86/include/asm/system.h +++ b/arch/x86/include/asm/system.h | |||
@@ -17,12 +17,12 @@ | |||
17 | # define AT_VECTOR_SIZE_ARCH 1 | 17 | # define AT_VECTOR_SIZE_ARCH 1 |
18 | #endif | 18 | #endif |
19 | 19 | ||
20 | #ifdef CONFIG_X86_32 | ||
21 | |||
22 | struct task_struct; /* one of the stranger aspects of C forward declarations */ | 20 | struct task_struct; /* one of the stranger aspects of C forward declarations */ |
23 | struct task_struct *__switch_to(struct task_struct *prev, | 21 | struct task_struct *__switch_to(struct task_struct *prev, |
24 | struct task_struct *next); | 22 | struct task_struct *next); |
25 | 23 | ||
24 | #ifdef CONFIG_X86_32 | ||
25 | |||
26 | /* | 26 | /* |
27 | * Saving eflags is important. It switches not only IOPL between tasks, | 27 | * Saving eflags is important. It switches not only IOPL between tasks, |
28 | * it also protects other tasks from NT leaking through sysenter etc. | 28 | * it also protects other tasks from NT leaking through sysenter etc. |
@@ -314,6 +314,8 @@ extern void free_init_pages(char *what, unsigned long begin, unsigned long end); | |||
314 | 314 | ||
315 | void default_idle(void); | 315 | void default_idle(void); |
316 | 316 | ||
317 | void stop_this_cpu(void *dummy); | ||
318 | |||
317 | /* | 319 | /* |
318 | * Force strict CPU ordering. | 320 | * Force strict CPU ordering. |
319 | * And yes, this is required on UP too when we're talking | 321 | * And yes, this is required on UP too when we're talking |
diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h index e44d379faad2..8dbc57390d25 100644 --- a/arch/x86/include/asm/thread_info.h +++ b/arch/x86/include/asm/thread_info.h | |||
@@ -24,7 +24,7 @@ struct exec_domain; | |||
24 | struct thread_info { | 24 | struct thread_info { |
25 | struct task_struct *task; /* main task structure */ | 25 | struct task_struct *task; /* main task structure */ |
26 | struct exec_domain *exec_domain; /* execution domain */ | 26 | struct exec_domain *exec_domain; /* execution domain */ |
27 | unsigned long flags; /* low level flags */ | 27 | __u32 flags; /* low level flags */ |
28 | __u32 status; /* thread synchronous flags */ | 28 | __u32 status; /* thread synchronous flags */ |
29 | __u32 cpu; /* current CPU */ | 29 | __u32 cpu; /* current CPU */ |
30 | int preempt_count; /* 0 => preemptable, | 30 | int preempt_count; /* 0 => preemptable, |
diff --git a/arch/x86/include/asm/trampoline.h b/arch/x86/include/asm/trampoline.h index fa0d79facdbc..780ba0ab94f9 100644 --- a/arch/x86/include/asm/trampoline.h +++ b/arch/x86/include/asm/trampoline.h | |||
@@ -3,6 +3,7 @@ | |||
3 | 3 | ||
4 | #ifndef __ASSEMBLY__ | 4 | #ifndef __ASSEMBLY__ |
5 | 5 | ||
6 | #ifdef CONFIG_X86_TRAMPOLINE | ||
6 | /* | 7 | /* |
7 | * Trampoline 80x86 program as an array. | 8 | * Trampoline 80x86 program as an array. |
8 | */ | 9 | */ |
@@ -13,8 +14,14 @@ extern unsigned char *trampoline_base; | |||
13 | extern unsigned long init_rsp; | 14 | extern unsigned long init_rsp; |
14 | extern unsigned long initial_code; | 15 | extern unsigned long initial_code; |
15 | 16 | ||
17 | #define TRAMPOLINE_SIZE roundup(trampoline_end - trampoline_data, PAGE_SIZE) | ||
16 | #define TRAMPOLINE_BASE 0x6000 | 18 | #define TRAMPOLINE_BASE 0x6000 |
19 | |||
17 | extern unsigned long setup_trampoline(void); | 20 | extern unsigned long setup_trampoline(void); |
21 | extern void __init reserve_trampoline_memory(void); | ||
22 | #else | ||
23 | static inline void reserve_trampoline_memory(void) {}; | ||
24 | #endif /* CONFIG_X86_TRAMPOLINE */ | ||
18 | 25 | ||
19 | #endif /* __ASSEMBLY__ */ | 26 | #endif /* __ASSEMBLY__ */ |
20 | 27 | ||
diff --git a/arch/x86/include/asm/traps.h b/arch/x86/include/asm/traps.h index 45dee286e45c..2ee0a3bceedf 100644 --- a/arch/x86/include/asm/traps.h +++ b/arch/x86/include/asm/traps.h | |||
@@ -46,6 +46,10 @@ dotraplinkage void do_coprocessor_segment_overrun(struct pt_regs *, long); | |||
46 | dotraplinkage void do_invalid_TSS(struct pt_regs *, long); | 46 | dotraplinkage void do_invalid_TSS(struct pt_regs *, long); |
47 | dotraplinkage void do_segment_not_present(struct pt_regs *, long); | 47 | dotraplinkage void do_segment_not_present(struct pt_regs *, long); |
48 | dotraplinkage void do_stack_segment(struct pt_regs *, long); | 48 | dotraplinkage void do_stack_segment(struct pt_regs *, long); |
49 | #ifdef CONFIG_X86_64 | ||
50 | dotraplinkage void do_double_fault(struct pt_regs *, long); | ||
51 | asmlinkage __kprobes struct pt_regs *sync_regs(struct pt_regs *); | ||
52 | #endif | ||
49 | dotraplinkage void do_general_protection(struct pt_regs *, long); | 53 | dotraplinkage void do_general_protection(struct pt_regs *, long); |
50 | dotraplinkage void do_page_fault(struct pt_regs *, unsigned long); | 54 | dotraplinkage void do_page_fault(struct pt_regs *, unsigned long); |
51 | dotraplinkage void do_spurious_interrupt_bug(struct pt_regs *, long); | 55 | dotraplinkage void do_spurious_interrupt_bug(struct pt_regs *, long); |
@@ -72,10 +76,13 @@ static inline int get_si_code(unsigned long condition) | |||
72 | extern int panic_on_unrecovered_nmi; | 76 | extern int panic_on_unrecovered_nmi; |
73 | extern int kstack_depth_to_print; | 77 | extern int kstack_depth_to_print; |
74 | 78 | ||
75 | #ifdef CONFIG_X86_32 | ||
76 | void math_error(void __user *); | 79 | void math_error(void __user *); |
77 | unsigned long patch_espfix_desc(unsigned long, unsigned long); | ||
78 | asmlinkage void math_emulate(long); | 80 | asmlinkage void math_emulate(long); |
81 | #ifdef CONFIG_X86_32 | ||
82 | unsigned long patch_espfix_desc(unsigned long, unsigned long); | ||
83 | #else | ||
84 | asmlinkage void smp_thermal_interrupt(void); | ||
85 | asmlinkage void mce_threshold_interrupt(void); | ||
79 | #endif | 86 | #endif |
80 | 87 | ||
81 | #endif /* _ASM_X86_TRAPS_H */ | 88 | #endif /* _ASM_X86_TRAPS_H */ |
diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h index 9cd83a8e40d5..38ae163cc91b 100644 --- a/arch/x86/include/asm/tsc.h +++ b/arch/x86/include/asm/tsc.h | |||
@@ -34,8 +34,6 @@ static inline cycles_t get_cycles(void) | |||
34 | 34 | ||
35 | static __always_inline cycles_t vget_cycles(void) | 35 | static __always_inline cycles_t vget_cycles(void) |
36 | { | 36 | { |
37 | cycles_t cycles; | ||
38 | |||
39 | /* | 37 | /* |
40 | * We only do VDSOs on TSC capable CPUs, so this shouldnt | 38 | * We only do VDSOs on TSC capable CPUs, so this shouldnt |
41 | * access boot_cpu_data (which is not VDSO-safe): | 39 | * access boot_cpu_data (which is not VDSO-safe): |
@@ -44,11 +42,7 @@ static __always_inline cycles_t vget_cycles(void) | |||
44 | if (!cpu_has_tsc) | 42 | if (!cpu_has_tsc) |
45 | return 0; | 43 | return 0; |
46 | #endif | 44 | #endif |
47 | rdtsc_barrier(); | 45 | return (cycles_t)__native_read_tsc(); |
48 | cycles = (cycles_t)__native_read_tsc(); | ||
49 | rdtsc_barrier(); | ||
50 | |||
51 | return cycles; | ||
52 | } | 46 | } |
53 | 47 | ||
54 | extern void tsc_init(void); | 48 | extern void tsc_init(void); |
diff --git a/arch/x86/include/asm/uaccess.h b/arch/x86/include/asm/uaccess.h index 35c54921b2e4..580c3ee6c58c 100644 --- a/arch/x86/include/asm/uaccess.h +++ b/arch/x86/include/asm/uaccess.h | |||
@@ -350,14 +350,14 @@ do { \ | |||
350 | 350 | ||
351 | #define __put_user_nocheck(x, ptr, size) \ | 351 | #define __put_user_nocheck(x, ptr, size) \ |
352 | ({ \ | 352 | ({ \ |
353 | long __pu_err; \ | 353 | int __pu_err; \ |
354 | __put_user_size((x), (ptr), (size), __pu_err, -EFAULT); \ | 354 | __put_user_size((x), (ptr), (size), __pu_err, -EFAULT); \ |
355 | __pu_err; \ | 355 | __pu_err; \ |
356 | }) | 356 | }) |
357 | 357 | ||
358 | #define __get_user_nocheck(x, ptr, size) \ | 358 | #define __get_user_nocheck(x, ptr, size) \ |
359 | ({ \ | 359 | ({ \ |
360 | long __gu_err; \ | 360 | int __gu_err; \ |
361 | unsigned long __gu_val; \ | 361 | unsigned long __gu_val; \ |
362 | __get_user_size(__gu_val, (ptr), (size), __gu_err, -EFAULT); \ | 362 | __get_user_size(__gu_val, (ptr), (size), __gu_err, -EFAULT); \ |
363 | (x) = (__force __typeof__(*(ptr)))__gu_val; \ | 363 | (x) = (__force __typeof__(*(ptr)))__gu_val; \ |
diff --git a/arch/x86/include/asm/uv/bios.h b/arch/x86/include/asm/uv/bios.h index d931d3b7e6f7..7ed17ff502b9 100644 --- a/arch/x86/include/asm/uv/bios.h +++ b/arch/x86/include/asm/uv/bios.h | |||
@@ -32,13 +32,18 @@ | |||
32 | enum uv_bios_cmd { | 32 | enum uv_bios_cmd { |
33 | UV_BIOS_COMMON, | 33 | UV_BIOS_COMMON, |
34 | UV_BIOS_GET_SN_INFO, | 34 | UV_BIOS_GET_SN_INFO, |
35 | UV_BIOS_FREQ_BASE | 35 | UV_BIOS_FREQ_BASE, |
36 | UV_BIOS_WATCHLIST_ALLOC, | ||
37 | UV_BIOS_WATCHLIST_FREE, | ||
38 | UV_BIOS_MEMPROTECT, | ||
39 | UV_BIOS_GET_PARTITION_ADDR | ||
36 | }; | 40 | }; |
37 | 41 | ||
38 | /* | 42 | /* |
39 | * Status values returned from a BIOS call. | 43 | * Status values returned from a BIOS call. |
40 | */ | 44 | */ |
41 | enum { | 45 | enum { |
46 | BIOS_STATUS_MORE_PASSES = 1, | ||
42 | BIOS_STATUS_SUCCESS = 0, | 47 | BIOS_STATUS_SUCCESS = 0, |
43 | BIOS_STATUS_UNIMPLEMENTED = -ENOSYS, | 48 | BIOS_STATUS_UNIMPLEMENTED = -ENOSYS, |
44 | BIOS_STATUS_EINVAL = -EINVAL, | 49 | BIOS_STATUS_EINVAL = -EINVAL, |
@@ -71,6 +76,21 @@ union partition_info_u { | |||
71 | }; | 76 | }; |
72 | }; | 77 | }; |
73 | 78 | ||
79 | union uv_watchlist_u { | ||
80 | u64 val; | ||
81 | struct { | ||
82 | u64 blade : 16, | ||
83 | size : 32, | ||
84 | filler : 16; | ||
85 | }; | ||
86 | }; | ||
87 | |||
88 | enum uv_memprotect { | ||
89 | UV_MEMPROT_RESTRICT_ACCESS, | ||
90 | UV_MEMPROT_ALLOW_AMO, | ||
91 | UV_MEMPROT_ALLOW_RW | ||
92 | }; | ||
93 | |||
74 | /* | 94 | /* |
75 | * bios calls have 6 parameters | 95 | * bios calls have 6 parameters |
76 | */ | 96 | */ |
@@ -80,14 +100,20 @@ extern s64 uv_bios_call_reentrant(enum uv_bios_cmd, u64, u64, u64, u64, u64); | |||
80 | 100 | ||
81 | extern s64 uv_bios_get_sn_info(int, int *, long *, long *, long *); | 101 | extern s64 uv_bios_get_sn_info(int, int *, long *, long *, long *); |
82 | extern s64 uv_bios_freq_base(u64, u64 *); | 102 | extern s64 uv_bios_freq_base(u64, u64 *); |
103 | extern int uv_bios_mq_watchlist_alloc(int, unsigned long, unsigned int, | ||
104 | unsigned long *); | ||
105 | extern int uv_bios_mq_watchlist_free(int, int); | ||
106 | extern s64 uv_bios_change_memprotect(u64, u64, enum uv_memprotect); | ||
107 | extern s64 uv_bios_reserved_page_pa(u64, u64 *, u64 *, u64 *); | ||
83 | 108 | ||
84 | extern void uv_bios_init(void); | 109 | extern void uv_bios_init(void); |
85 | 110 | ||
111 | extern unsigned long sn_rtc_cycles_per_second; | ||
86 | extern int uv_type; | 112 | extern int uv_type; |
87 | extern long sn_partition_id; | 113 | extern long sn_partition_id; |
88 | extern long uv_coherency_id; | 114 | extern long sn_coherency_id; |
89 | extern long uv_region_size; | 115 | extern long sn_region_size; |
90 | #define partition_coherence_id() (uv_coherency_id) | 116 | #define partition_coherence_id() (sn_coherency_id) |
91 | 117 | ||
92 | extern struct kobject *sgi_uv_kobj; /* /sys/firmware/sgi_uv */ | 118 | extern struct kobject *sgi_uv_kobj; /* /sys/firmware/sgi_uv */ |
93 | 119 | ||
diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h index 7a5782610b2b..777327ef05c1 100644 --- a/arch/x86/include/asm/uv/uv_hub.h +++ b/arch/x86/include/asm/uv/uv_hub.h | |||
@@ -113,25 +113,37 @@ | |||
113 | */ | 113 | */ |
114 | #define UV_MAX_NASID_VALUE (UV_MAX_NUMALINK_NODES * 2) | 114 | #define UV_MAX_NASID_VALUE (UV_MAX_NUMALINK_NODES * 2) |
115 | 115 | ||
116 | struct uv_scir_s { | ||
117 | struct timer_list timer; | ||
118 | unsigned long offset; | ||
119 | unsigned long last; | ||
120 | unsigned long idle_on; | ||
121 | unsigned long idle_off; | ||
122 | unsigned char state; | ||
123 | unsigned char enabled; | ||
124 | }; | ||
125 | |||
116 | /* | 126 | /* |
117 | * The following defines attributes of the HUB chip. These attributes are | 127 | * The following defines attributes of the HUB chip. These attributes are |
118 | * frequently referenced and are kept in the per-cpu data areas of each cpu. | 128 | * frequently referenced and are kept in the per-cpu data areas of each cpu. |
119 | * They are kept together in a struct to minimize cache misses. | 129 | * They are kept together in a struct to minimize cache misses. |
120 | */ | 130 | */ |
121 | struct uv_hub_info_s { | 131 | struct uv_hub_info_s { |
122 | unsigned long global_mmr_base; | 132 | unsigned long global_mmr_base; |
123 | unsigned long gpa_mask; | 133 | unsigned long gpa_mask; |
124 | unsigned long gnode_upper; | 134 | unsigned long gnode_upper; |
125 | unsigned long lowmem_remap_top; | 135 | unsigned long lowmem_remap_top; |
126 | unsigned long lowmem_remap_base; | 136 | unsigned long lowmem_remap_base; |
127 | unsigned short pnode; | 137 | unsigned short pnode; |
128 | unsigned short pnode_mask; | 138 | unsigned short pnode_mask; |
129 | unsigned short coherency_domain_number; | 139 | unsigned short coherency_domain_number; |
130 | unsigned short numa_blade_id; | 140 | unsigned short numa_blade_id; |
131 | unsigned char blade_processor_id; | 141 | unsigned char blade_processor_id; |
132 | unsigned char m_val; | 142 | unsigned char m_val; |
133 | unsigned char n_val; | 143 | unsigned char n_val; |
144 | struct uv_scir_s scir; | ||
134 | }; | 145 | }; |
146 | |||
135 | DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info); | 147 | DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info); |
136 | #define uv_hub_info (&__get_cpu_var(__uv_hub_info)) | 148 | #define uv_hub_info (&__get_cpu_var(__uv_hub_info)) |
137 | #define uv_cpu_hub_info(cpu) (&per_cpu(__uv_hub_info, cpu)) | 149 | #define uv_cpu_hub_info(cpu) (&per_cpu(__uv_hub_info, cpu)) |
@@ -163,6 +175,30 @@ DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info); | |||
163 | 175 | ||
164 | #define UV_APIC_PNODE_SHIFT 6 | 176 | #define UV_APIC_PNODE_SHIFT 6 |
165 | 177 | ||
178 | /* Local Bus from cpu's perspective */ | ||
179 | #define LOCAL_BUS_BASE 0x1c00000 | ||
180 | #define LOCAL_BUS_SIZE (4 * 1024 * 1024) | ||
181 | |||
182 | /* | ||
183 | * System Controller Interface Reg | ||
184 | * | ||
185 | * Note there are NO leds on a UV system. This register is only | ||
186 | * used by the system controller to monitor system-wide operation. | ||
187 | * There are 64 regs per node. With Nahelem cpus (2 cores per node, | ||
188 | * 8 cpus per core, 2 threads per cpu) there are 32 cpu threads on | ||
189 | * a node. | ||
190 | * | ||
191 | * The window is located at top of ACPI MMR space | ||
192 | */ | ||
193 | #define SCIR_WINDOW_COUNT 64 | ||
194 | #define SCIR_LOCAL_MMR_BASE (LOCAL_BUS_BASE + \ | ||
195 | LOCAL_BUS_SIZE - \ | ||
196 | SCIR_WINDOW_COUNT) | ||
197 | |||
198 | #define SCIR_CPU_HEARTBEAT 0x01 /* timer interrupt */ | ||
199 | #define SCIR_CPU_ACTIVITY 0x02 /* not idle */ | ||
200 | #define SCIR_CPU_HB_INTERVAL (HZ) /* once per second */ | ||
201 | |||
166 | /* | 202 | /* |
167 | * Macros for converting between kernel virtual addresses, socket local physical | 203 | * Macros for converting between kernel virtual addresses, socket local physical |
168 | * addresses, and UV global physical addresses. | 204 | * addresses, and UV global physical addresses. |
@@ -174,7 +210,7 @@ DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info); | |||
174 | static inline unsigned long uv_soc_phys_ram_to_gpa(unsigned long paddr) | 210 | static inline unsigned long uv_soc_phys_ram_to_gpa(unsigned long paddr) |
175 | { | 211 | { |
176 | if (paddr < uv_hub_info->lowmem_remap_top) | 212 | if (paddr < uv_hub_info->lowmem_remap_top) |
177 | paddr += uv_hub_info->lowmem_remap_base; | 213 | paddr |= uv_hub_info->lowmem_remap_base; |
178 | return paddr | uv_hub_info->gnode_upper; | 214 | return paddr | uv_hub_info->gnode_upper; |
179 | } | 215 | } |
180 | 216 | ||
@@ -182,19 +218,7 @@ static inline unsigned long uv_soc_phys_ram_to_gpa(unsigned long paddr) | |||
182 | /* socket virtual --> UV global physical address */ | 218 | /* socket virtual --> UV global physical address */ |
183 | static inline unsigned long uv_gpa(void *v) | 219 | static inline unsigned long uv_gpa(void *v) |
184 | { | 220 | { |
185 | return __pa(v) | uv_hub_info->gnode_upper; | 221 | return uv_soc_phys_ram_to_gpa(__pa(v)); |
186 | } | ||
187 | |||
188 | /* socket virtual --> UV global physical address */ | ||
189 | static inline void *uv_vgpa(void *v) | ||
190 | { | ||
191 | return (void *)uv_gpa(v); | ||
192 | } | ||
193 | |||
194 | /* UV global physical address --> socket virtual */ | ||
195 | static inline void *uv_va(unsigned long gpa) | ||
196 | { | ||
197 | return __va(gpa & uv_hub_info->gpa_mask); | ||
198 | } | 222 | } |
199 | 223 | ||
200 | /* pnode, offset --> socket virtual */ | 224 | /* pnode, offset --> socket virtual */ |
@@ -277,6 +301,16 @@ static inline void uv_write_local_mmr(unsigned long offset, unsigned long val) | |||
277 | *uv_local_mmr_address(offset) = val; | 301 | *uv_local_mmr_address(offset) = val; |
278 | } | 302 | } |
279 | 303 | ||
304 | static inline unsigned char uv_read_local_mmr8(unsigned long offset) | ||
305 | { | ||
306 | return *((unsigned char *)uv_local_mmr_address(offset)); | ||
307 | } | ||
308 | |||
309 | static inline void uv_write_local_mmr8(unsigned long offset, unsigned char val) | ||
310 | { | ||
311 | *((unsigned char *)uv_local_mmr_address(offset)) = val; | ||
312 | } | ||
313 | |||
280 | /* | 314 | /* |
281 | * Structures and definitions for converting between cpu, node, pnode, and blade | 315 | * Structures and definitions for converting between cpu, node, pnode, and blade |
282 | * numbers. | 316 | * numbers. |
@@ -351,5 +385,20 @@ static inline int uv_num_possible_blades(void) | |||
351 | return uv_possible_blades; | 385 | return uv_possible_blades; |
352 | } | 386 | } |
353 | 387 | ||
354 | #endif /* _ASM_X86_UV_UV_HUB_H */ | 388 | /* Update SCIR state */ |
389 | static inline void uv_set_scir_bits(unsigned char value) | ||
390 | { | ||
391 | if (uv_hub_info->scir.state != value) { | ||
392 | uv_hub_info->scir.state = value; | ||
393 | uv_write_local_mmr8(uv_hub_info->scir.offset, value); | ||
394 | } | ||
395 | } | ||
396 | static inline void uv_set_cpu_scir_bits(int cpu, unsigned char value) | ||
397 | { | ||
398 | if (uv_cpu_hub_info(cpu)->scir.state != value) { | ||
399 | uv_cpu_hub_info(cpu)->scir.state = value; | ||
400 | uv_write_local_mmr8(uv_cpu_hub_info(cpu)->scir.offset, value); | ||
401 | } | ||
402 | } | ||
355 | 403 | ||
404 | #endif /* _ASM_X86_UV_UV_HUB_H */ | ||
diff --git a/arch/x86/include/asm/vmware.h b/arch/x86/include/asm/vmware.h new file mode 100644 index 000000000000..c11b7e100d83 --- /dev/null +++ b/arch/x86/include/asm/vmware.h | |||
@@ -0,0 +1,27 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2008, VMware, Inc. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License as published by | ||
6 | * the Free Software Foundation; either version 2 of the License, or | ||
7 | * (at your option) any later version. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, but | ||
10 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | ||
12 | * NON INFRINGEMENT. See the GNU General Public License for more | ||
13 | * details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | ||
18 | * | ||
19 | */ | ||
20 | #ifndef ASM_X86__VMWARE_H | ||
21 | #define ASM_X86__VMWARE_H | ||
22 | |||
23 | extern unsigned long vmware_get_tsc_khz(void); | ||
24 | extern int vmware_platform(void); | ||
25 | extern void vmware_set_feature_bits(struct cpuinfo_x86 *c); | ||
26 | |||
27 | #endif | ||
diff --git a/arch/x86/include/asm/xen/hypercall.h b/arch/x86/include/asm/xen/hypercall.h index 3f6000d95fe2..5e79ca694326 100644 --- a/arch/x86/include/asm/xen/hypercall.h +++ b/arch/x86/include/asm/xen/hypercall.h | |||
@@ -33,8 +33,14 @@ | |||
33 | #ifndef _ASM_X86_XEN_HYPERCALL_H | 33 | #ifndef _ASM_X86_XEN_HYPERCALL_H |
34 | #define _ASM_X86_XEN_HYPERCALL_H | 34 | #define _ASM_X86_XEN_HYPERCALL_H |
35 | 35 | ||
36 | #include <linux/kernel.h> | ||
37 | #include <linux/spinlock.h> | ||
36 | #include <linux/errno.h> | 38 | #include <linux/errno.h> |
37 | #include <linux/string.h> | 39 | #include <linux/string.h> |
40 | #include <linux/types.h> | ||
41 | |||
42 | #include <asm/page.h> | ||
43 | #include <asm/pgtable.h> | ||
38 | 44 | ||
39 | #include <xen/interface/xen.h> | 45 | #include <xen/interface/xen.h> |
40 | #include <xen/interface/sched.h> | 46 | #include <xen/interface/sched.h> |
diff --git a/arch/x86/include/asm/xen/hypervisor.h b/arch/x86/include/asm/xen/hypervisor.h index a38d25ac87d2..81fbd735aec4 100644 --- a/arch/x86/include/asm/xen/hypervisor.h +++ b/arch/x86/include/asm/xen/hypervisor.h | |||
@@ -33,39 +33,10 @@ | |||
33 | #ifndef _ASM_X86_XEN_HYPERVISOR_H | 33 | #ifndef _ASM_X86_XEN_HYPERVISOR_H |
34 | #define _ASM_X86_XEN_HYPERVISOR_H | 34 | #define _ASM_X86_XEN_HYPERVISOR_H |
35 | 35 | ||
36 | #include <linux/types.h> | ||
37 | #include <linux/kernel.h> | ||
38 | |||
39 | #include <xen/interface/xen.h> | ||
40 | #include <xen/interface/version.h> | ||
41 | |||
42 | #include <asm/ptrace.h> | ||
43 | #include <asm/page.h> | ||
44 | #include <asm/desc.h> | ||
45 | #if defined(__i386__) | ||
46 | # ifdef CONFIG_X86_PAE | ||
47 | # include <asm-generic/pgtable-nopud.h> | ||
48 | # else | ||
49 | # include <asm-generic/pgtable-nopmd.h> | ||
50 | # endif | ||
51 | #endif | ||
52 | #include <asm/xen/hypercall.h> | ||
53 | |||
54 | /* arch/i386/kernel/setup.c */ | 36 | /* arch/i386/kernel/setup.c */ |
55 | extern struct shared_info *HYPERVISOR_shared_info; | 37 | extern struct shared_info *HYPERVISOR_shared_info; |
56 | extern struct start_info *xen_start_info; | 38 | extern struct start_info *xen_start_info; |
57 | 39 | ||
58 | /* arch/i386/mach-xen/evtchn.c */ | ||
59 | /* Force a proper event-channel callback from Xen. */ | ||
60 | extern void force_evtchn_callback(void); | ||
61 | |||
62 | /* Turn jiffies into Xen system time. */ | ||
63 | u64 jiffies_to_st(unsigned long jiffies); | ||
64 | |||
65 | |||
66 | #define MULTI_UVMFLAGS_INDEX 3 | ||
67 | #define MULTI_UVMDOMID_INDEX 4 | ||
68 | |||
69 | enum xen_domain_type { | 40 | enum xen_domain_type { |
70 | XEN_NATIVE, | 41 | XEN_NATIVE, |
71 | XEN_PV_DOMAIN, | 42 | XEN_PV_DOMAIN, |
@@ -74,9 +45,15 @@ enum xen_domain_type { | |||
74 | 45 | ||
75 | extern enum xen_domain_type xen_domain_type; | 46 | extern enum xen_domain_type xen_domain_type; |
76 | 47 | ||
48 | #ifdef CONFIG_XEN | ||
77 | #define xen_domain() (xen_domain_type != XEN_NATIVE) | 49 | #define xen_domain() (xen_domain_type != XEN_NATIVE) |
78 | #define xen_pv_domain() (xen_domain_type == XEN_PV_DOMAIN) | 50 | #else |
51 | #define xen_domain() (0) | ||
52 | #endif | ||
53 | |||
54 | #define xen_pv_domain() (xen_domain() && xen_domain_type == XEN_PV_DOMAIN) | ||
55 | #define xen_hvm_domain() (xen_domain() && xen_domain_type == XEN_HVM_DOMAIN) | ||
56 | |||
79 | #define xen_initial_domain() (xen_pv_domain() && xen_start_info->flags & SIF_INITDOMAIN) | 57 | #define xen_initial_domain() (xen_pv_domain() && xen_start_info->flags & SIF_INITDOMAIN) |
80 | #define xen_hvm_domain() (xen_domain_type == XEN_HVM_DOMAIN) | ||
81 | 58 | ||
82 | #endif /* _ASM_X86_XEN_HYPERVISOR_H */ | 59 | #endif /* _ASM_X86_XEN_HYPERVISOR_H */ |
diff --git a/arch/x86/include/asm/xen/page.h b/arch/x86/include/asm/xen/page.h index bc628998a1b9..7ef617ef1df3 100644 --- a/arch/x86/include/asm/xen/page.h +++ b/arch/x86/include/asm/xen/page.h | |||
@@ -1,11 +1,16 @@ | |||
1 | #ifndef _ASM_X86_XEN_PAGE_H | 1 | #ifndef _ASM_X86_XEN_PAGE_H |
2 | #define _ASM_X86_XEN_PAGE_H | 2 | #define _ASM_X86_XEN_PAGE_H |
3 | 3 | ||
4 | #include <linux/kernel.h> | ||
5 | #include <linux/types.h> | ||
6 | #include <linux/spinlock.h> | ||
4 | #include <linux/pfn.h> | 7 | #include <linux/pfn.h> |
5 | 8 | ||
6 | #include <asm/uaccess.h> | 9 | #include <asm/uaccess.h> |
10 | #include <asm/page.h> | ||
7 | #include <asm/pgtable.h> | 11 | #include <asm/pgtable.h> |
8 | 12 | ||
13 | #include <xen/interface/xen.h> | ||
9 | #include <xen/features.h> | 14 | #include <xen/features.h> |
10 | 15 | ||
11 | /* Xen machine address */ | 16 | /* Xen machine address */ |