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Diffstat (limited to 'arch/x86/include/uapi/asm/msr-index.h')
-rw-r--r--arch/x86/include/uapi/asm/msr-index.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/include/uapi/asm/msr-index.h b/arch/x86/include/uapi/asm/msr-index.h
index c827ace3121b..fcf2b3ae1bf0 100644
--- a/arch/x86/include/uapi/asm/msr-index.h
+++ b/arch/x86/include/uapi/asm/msr-index.h
@@ -384,7 +384,7 @@
384#define MSR_IA32_MISC_ENABLE_MWAIT_BIT 18 384#define MSR_IA32_MISC_ENABLE_MWAIT_BIT 18
385#define MSR_IA32_MISC_ENABLE_MWAIT (1ULL << MSR_IA32_MISC_ENABLE_MWAIT_BIT) 385#define MSR_IA32_MISC_ENABLE_MWAIT (1ULL << MSR_IA32_MISC_ENABLE_MWAIT_BIT)
386#define MSR_IA32_MISC_ENABLE_LIMIT_CPUID_BIT 22 386#define MSR_IA32_MISC_ENABLE_LIMIT_CPUID_BIT 22
387#define MSR_IA32_MISC_ENABLE_LIMIT_CPUID (1ULL << MSR_IA32_MISC_ENABLE_LIMIT_CPUID_BIT); 387#define MSR_IA32_MISC_ENABLE_LIMIT_CPUID (1ULL << MSR_IA32_MISC_ENABLE_LIMIT_CPUID_BIT)
388#define MSR_IA32_MISC_ENABLE_XTPR_DISABLE_BIT 23 388#define MSR_IA32_MISC_ENABLE_XTPR_DISABLE_BIT 23
389#define MSR_IA32_MISC_ENABLE_XTPR_DISABLE (1ULL << MSR_IA32_MISC_ENABLE_XTPR_DISABLE_BIT) 389#define MSR_IA32_MISC_ENABLE_XTPR_DISABLE (1ULL << MSR_IA32_MISC_ENABLE_XTPR_DISABLE_BIT)
390#define MSR_IA32_MISC_ENABLE_XD_DISABLE_BIT 34 390#define MSR_IA32_MISC_ENABLE_XD_DISABLE_BIT 34