diff options
Diffstat (limited to 'arch/x86/include/asm')
-rw-r--r-- | arch/x86/include/asm/apicdef.h | 2 | ||||
-rw-r--r-- | arch/x86/include/asm/kvm.h | 10 | ||||
-rw-r--r-- | arch/x86/include/asm/kvm_emulate.h (renamed from arch/x86/include/asm/kvm_x86_emulate.h) | 0 | ||||
-rw-r--r-- | arch/x86/include/asm/kvm_host.h | 60 | ||||
-rw-r--r-- | arch/x86/include/asm/kvm_para.h | 2 | ||||
-rw-r--r-- | arch/x86/include/asm/msr-index.h | 1 | ||||
-rw-r--r-- | arch/x86/include/asm/vmx.h | 8 |
7 files changed, 55 insertions, 28 deletions
diff --git a/arch/x86/include/asm/apicdef.h b/arch/x86/include/asm/apicdef.h index 7386bfa4f4bc..3b62da926de9 100644 --- a/arch/x86/include/asm/apicdef.h +++ b/arch/x86/include/asm/apicdef.h | |||
@@ -15,6 +15,7 @@ | |||
15 | 15 | ||
16 | #define APIC_LVR 0x30 | 16 | #define APIC_LVR 0x30 |
17 | #define APIC_LVR_MASK 0xFF00FF | 17 | #define APIC_LVR_MASK 0xFF00FF |
18 | #define APIC_LVR_DIRECTED_EOI (1 << 24) | ||
18 | #define GET_APIC_VERSION(x) ((x) & 0xFFu) | 19 | #define GET_APIC_VERSION(x) ((x) & 0xFFu) |
19 | #define GET_APIC_MAXLVT(x) (((x) >> 16) & 0xFFu) | 20 | #define GET_APIC_MAXLVT(x) (((x) >> 16) & 0xFFu) |
20 | #ifdef CONFIG_X86_32 | 21 | #ifdef CONFIG_X86_32 |
@@ -41,6 +42,7 @@ | |||
41 | #define APIC_DFR_CLUSTER 0x0FFFFFFFul | 42 | #define APIC_DFR_CLUSTER 0x0FFFFFFFul |
42 | #define APIC_DFR_FLAT 0xFFFFFFFFul | 43 | #define APIC_DFR_FLAT 0xFFFFFFFFul |
43 | #define APIC_SPIV 0xF0 | 44 | #define APIC_SPIV 0xF0 |
45 | #define APIC_SPIV_DIRECTED_EOI (1 << 12) | ||
44 | #define APIC_SPIV_FOCUS_DISABLED (1 << 9) | 46 | #define APIC_SPIV_FOCUS_DISABLED (1 << 9) |
45 | #define APIC_SPIV_APIC_ENABLED (1 << 8) | 47 | #define APIC_SPIV_APIC_ENABLED (1 << 8) |
46 | #define APIC_ISR 0x100 | 48 | #define APIC_ISR 0x100 |
diff --git a/arch/x86/include/asm/kvm.h b/arch/x86/include/asm/kvm.h index 125be8b19568..4a5fe914dc59 100644 --- a/arch/x86/include/asm/kvm.h +++ b/arch/x86/include/asm/kvm.h | |||
@@ -17,6 +17,8 @@ | |||
17 | #define __KVM_HAVE_USER_NMI | 17 | #define __KVM_HAVE_USER_NMI |
18 | #define __KVM_HAVE_GUEST_DEBUG | 18 | #define __KVM_HAVE_GUEST_DEBUG |
19 | #define __KVM_HAVE_MSIX | 19 | #define __KVM_HAVE_MSIX |
20 | #define __KVM_HAVE_MCE | ||
21 | #define __KVM_HAVE_PIT_STATE2 | ||
20 | 22 | ||
21 | /* Architectural interrupt line count. */ | 23 | /* Architectural interrupt line count. */ |
22 | #define KVM_NR_INTERRUPTS 256 | 24 | #define KVM_NR_INTERRUPTS 256 |
@@ -236,6 +238,14 @@ struct kvm_pit_state { | |||
236 | struct kvm_pit_channel_state channels[3]; | 238 | struct kvm_pit_channel_state channels[3]; |
237 | }; | 239 | }; |
238 | 240 | ||
241 | #define KVM_PIT_FLAGS_HPET_LEGACY 0x00000001 | ||
242 | |||
243 | struct kvm_pit_state2 { | ||
244 | struct kvm_pit_channel_state channels[3]; | ||
245 | __u32 flags; | ||
246 | __u32 reserved[9]; | ||
247 | }; | ||
248 | |||
239 | struct kvm_reinject_control { | 249 | struct kvm_reinject_control { |
240 | __u8 pit_reinject; | 250 | __u8 pit_reinject; |
241 | __u8 reserved[31]; | 251 | __u8 reserved[31]; |
diff --git a/arch/x86/include/asm/kvm_x86_emulate.h b/arch/x86/include/asm/kvm_emulate.h index b7ed2c423116..b7ed2c423116 100644 --- a/arch/x86/include/asm/kvm_x86_emulate.h +++ b/arch/x86/include/asm/kvm_emulate.h | |||
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index eabdc1cfab5c..3be000435fad 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h | |||
@@ -14,6 +14,7 @@ | |||
14 | #include <linux/types.h> | 14 | #include <linux/types.h> |
15 | #include <linux/mm.h> | 15 | #include <linux/mm.h> |
16 | #include <linux/mmu_notifier.h> | 16 | #include <linux/mmu_notifier.h> |
17 | #include <linux/tracepoint.h> | ||
17 | 18 | ||
18 | #include <linux/kvm.h> | 19 | #include <linux/kvm.h> |
19 | #include <linux/kvm_para.h> | 20 | #include <linux/kvm_para.h> |
@@ -37,12 +38,14 @@ | |||
37 | #define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \ | 38 | #define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \ |
38 | 0xFFFFFF0000000000ULL) | 39 | 0xFFFFFF0000000000ULL) |
39 | 40 | ||
40 | #define KVM_GUEST_CR0_MASK \ | 41 | #define KVM_GUEST_CR0_MASK_UNRESTRICTED_GUEST \ |
41 | (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE \ | 42 | (X86_CR0_WP | X86_CR0_NE | X86_CR0_NW | X86_CR0_CD) |
42 | | X86_CR0_NW | X86_CR0_CD) | 43 | #define KVM_GUEST_CR0_MASK \ |
44 | (KVM_GUEST_CR0_MASK_UNRESTRICTED_GUEST | X86_CR0_PG | X86_CR0_PE) | ||
45 | #define KVM_VM_CR0_ALWAYS_ON_UNRESTRICTED_GUEST \ | ||
46 | (X86_CR0_WP | X86_CR0_NE | X86_CR0_TS | X86_CR0_MP) | ||
43 | #define KVM_VM_CR0_ALWAYS_ON \ | 47 | #define KVM_VM_CR0_ALWAYS_ON \ |
44 | (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE | X86_CR0_TS \ | 48 | (KVM_VM_CR0_ALWAYS_ON_UNRESTRICTED_GUEST | X86_CR0_PG | X86_CR0_PE) |
45 | | X86_CR0_MP) | ||
46 | #define KVM_GUEST_CR4_MASK \ | 49 | #define KVM_GUEST_CR4_MASK \ |
47 | (X86_CR4_VME | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE | X86_CR4_VMXE) | 50 | (X86_CR4_VME | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE | X86_CR4_VMXE) |
48 | #define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE) | 51 | #define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE) |
@@ -51,12 +54,12 @@ | |||
51 | #define INVALID_PAGE (~(hpa_t)0) | 54 | #define INVALID_PAGE (~(hpa_t)0) |
52 | #define UNMAPPED_GVA (~(gpa_t)0) | 55 | #define UNMAPPED_GVA (~(gpa_t)0) |
53 | 56 | ||
54 | /* shadow tables are PAE even on non-PAE hosts */ | 57 | /* KVM Hugepage definitions for x86 */ |
55 | #define KVM_HPAGE_SHIFT 21 | 58 | #define KVM_NR_PAGE_SIZES 3 |
56 | #define KVM_HPAGE_SIZE (1UL << KVM_HPAGE_SHIFT) | 59 | #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + (((x) - 1) * 9)) |
57 | #define KVM_HPAGE_MASK (~(KVM_HPAGE_SIZE - 1)) | 60 | #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) |
58 | 61 | #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) | |
59 | #define KVM_PAGES_PER_HPAGE (KVM_HPAGE_SIZE / PAGE_SIZE) | 62 | #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) |
60 | 63 | ||
61 | #define DE_VECTOR 0 | 64 | #define DE_VECTOR 0 |
62 | #define DB_VECTOR 1 | 65 | #define DB_VECTOR 1 |
@@ -120,6 +123,10 @@ enum kvm_reg { | |||
120 | NR_VCPU_REGS | 123 | NR_VCPU_REGS |
121 | }; | 124 | }; |
122 | 125 | ||
126 | enum kvm_reg_ex { | ||
127 | VCPU_EXREG_PDPTR = NR_VCPU_REGS, | ||
128 | }; | ||
129 | |||
123 | enum { | 130 | enum { |
124 | VCPU_SREG_ES, | 131 | VCPU_SREG_ES, |
125 | VCPU_SREG_CS, | 132 | VCPU_SREG_CS, |
@@ -131,7 +138,7 @@ enum { | |||
131 | VCPU_SREG_LDTR, | 138 | VCPU_SREG_LDTR, |
132 | }; | 139 | }; |
133 | 140 | ||
134 | #include <asm/kvm_x86_emulate.h> | 141 | #include <asm/kvm_emulate.h> |
135 | 142 | ||
136 | #define KVM_NR_MEM_OBJS 40 | 143 | #define KVM_NR_MEM_OBJS 40 |
137 | 144 | ||
@@ -308,7 +315,6 @@ struct kvm_vcpu_arch { | |||
308 | struct { | 315 | struct { |
309 | gfn_t gfn; /* presumed gfn during guest pte update */ | 316 | gfn_t gfn; /* presumed gfn during guest pte update */ |
310 | pfn_t pfn; /* pfn corresponding to that gfn */ | 317 | pfn_t pfn; /* pfn corresponding to that gfn */ |
311 | int largepage; | ||
312 | unsigned long mmu_seq; | 318 | unsigned long mmu_seq; |
313 | } update_pte; | 319 | } update_pte; |
314 | 320 | ||
@@ -334,16 +340,6 @@ struct kvm_vcpu_arch { | |||
334 | u8 nr; | 340 | u8 nr; |
335 | } interrupt; | 341 | } interrupt; |
336 | 342 | ||
337 | struct { | ||
338 | int vm86_active; | ||
339 | u8 save_iopl; | ||
340 | struct kvm_save_segment { | ||
341 | u16 selector; | ||
342 | unsigned long base; | ||
343 | u32 limit; | ||
344 | u32 ar; | ||
345 | } tr, es, ds, fs, gs; | ||
346 | } rmode; | ||
347 | int halt_request; /* real mode on Intel only */ | 343 | int halt_request; /* real mode on Intel only */ |
348 | 344 | ||
349 | int cpuid_nent; | 345 | int cpuid_nent; |
@@ -366,13 +362,15 @@ struct kvm_vcpu_arch { | |||
366 | u32 pat; | 362 | u32 pat; |
367 | 363 | ||
368 | int switch_db_regs; | 364 | int switch_db_regs; |
369 | unsigned long host_db[KVM_NR_DB_REGS]; | ||
370 | unsigned long host_dr6; | ||
371 | unsigned long host_dr7; | ||
372 | unsigned long db[KVM_NR_DB_REGS]; | 365 | unsigned long db[KVM_NR_DB_REGS]; |
373 | unsigned long dr6; | 366 | unsigned long dr6; |
374 | unsigned long dr7; | 367 | unsigned long dr7; |
375 | unsigned long eff_db[KVM_NR_DB_REGS]; | 368 | unsigned long eff_db[KVM_NR_DB_REGS]; |
369 | |||
370 | u64 mcg_cap; | ||
371 | u64 mcg_status; | ||
372 | u64 mcg_ctl; | ||
373 | u64 *mce_banks; | ||
376 | }; | 374 | }; |
377 | 375 | ||
378 | struct kvm_mem_alias { | 376 | struct kvm_mem_alias { |
@@ -409,6 +407,7 @@ struct kvm_arch{ | |||
409 | 407 | ||
410 | struct page *ept_identity_pagetable; | 408 | struct page *ept_identity_pagetable; |
411 | bool ept_identity_pagetable_done; | 409 | bool ept_identity_pagetable_done; |
410 | gpa_t ept_identity_map_addr; | ||
412 | 411 | ||
413 | unsigned long irq_sources_bitmap; | 412 | unsigned long irq_sources_bitmap; |
414 | unsigned long irq_states[KVM_IOAPIC_NUM_PINS]; | 413 | unsigned long irq_states[KVM_IOAPIC_NUM_PINS]; |
@@ -526,6 +525,9 @@ struct kvm_x86_ops { | |||
526 | int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); | 525 | int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); |
527 | int (*get_tdp_level)(void); | 526 | int (*get_tdp_level)(void); |
528 | u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); | 527 | u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); |
528 | bool (*gb_page_enable)(void); | ||
529 | |||
530 | const struct trace_print_flags *exit_reasons_str; | ||
529 | }; | 531 | }; |
530 | 532 | ||
531 | extern struct kvm_x86_ops *kvm_x86_ops; | 533 | extern struct kvm_x86_ops *kvm_x86_ops; |
@@ -618,6 +620,7 @@ void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); | |||
618 | void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); | 620 | void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); |
619 | void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2, | 621 | void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2, |
620 | u32 error_code); | 622 | u32 error_code); |
623 | bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); | ||
621 | 624 | ||
622 | int kvm_pic_set_irq(void *opaque, int irq, int level); | 625 | int kvm_pic_set_irq(void *opaque, int irq, int level); |
623 | 626 | ||
@@ -752,8 +755,6 @@ static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) | |||
752 | kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); | 755 | kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); |
753 | } | 756 | } |
754 | 757 | ||
755 | #define MSR_IA32_TIME_STAMP_COUNTER 0x010 | ||
756 | |||
757 | #define TSS_IOPB_BASE_OFFSET 0x66 | 758 | #define TSS_IOPB_BASE_OFFSET 0x66 |
758 | #define TSS_BASE_SIZE 0x68 | 759 | #define TSS_BASE_SIZE 0x68 |
759 | #define TSS_IOPB_SIZE (65536 / 8) | 760 | #define TSS_IOPB_SIZE (65536 / 8) |
@@ -796,5 +797,8 @@ asmlinkage void kvm_handle_fault_on_reboot(void); | |||
796 | int kvm_unmap_hva(struct kvm *kvm, unsigned long hva); | 797 | int kvm_unmap_hva(struct kvm *kvm, unsigned long hva); |
797 | int kvm_age_hva(struct kvm *kvm, unsigned long hva); | 798 | int kvm_age_hva(struct kvm *kvm, unsigned long hva); |
798 | int cpuid_maxphyaddr(struct kvm_vcpu *vcpu); | 799 | int cpuid_maxphyaddr(struct kvm_vcpu *vcpu); |
800 | int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); | ||
801 | int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); | ||
802 | int kvm_cpu_get_interrupt(struct kvm_vcpu *v); | ||
799 | 803 | ||
800 | #endif /* _ASM_X86_KVM_HOST_H */ | 804 | #endif /* _ASM_X86_KVM_HOST_H */ |
diff --git a/arch/x86/include/asm/kvm_para.h b/arch/x86/include/asm/kvm_para.h index b8a3305ae093..c584076a47f4 100644 --- a/arch/x86/include/asm/kvm_para.h +++ b/arch/x86/include/asm/kvm_para.h | |||
@@ -1,6 +1,8 @@ | |||
1 | #ifndef _ASM_X86_KVM_PARA_H | 1 | #ifndef _ASM_X86_KVM_PARA_H |
2 | #define _ASM_X86_KVM_PARA_H | 2 | #define _ASM_X86_KVM_PARA_H |
3 | 3 | ||
4 | #include <linux/types.h> | ||
5 | |||
4 | /* This CPUID returns the signature 'KVMKVMKVM' in ebx, ecx, and edx. It | 6 | /* This CPUID returns the signature 'KVMKVMKVM' in ebx, ecx, and edx. It |
5 | * should be used to determine that a VM is running under KVM. | 7 | * should be used to determine that a VM is running under KVM. |
6 | */ | 8 | */ |
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 6be7fc254b59..bd5549034a95 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h | |||
@@ -374,6 +374,7 @@ | |||
374 | /* AMD-V MSRs */ | 374 | /* AMD-V MSRs */ |
375 | 375 | ||
376 | #define MSR_VM_CR 0xc0010114 | 376 | #define MSR_VM_CR 0xc0010114 |
377 | #define MSR_VM_IGNNE 0xc0010115 | ||
377 | #define MSR_VM_HSAVE_PA 0xc0010117 | 378 | #define MSR_VM_HSAVE_PA 0xc0010117 |
378 | 379 | ||
379 | #endif /* _ASM_X86_MSR_INDEX_H */ | 380 | #endif /* _ASM_X86_MSR_INDEX_H */ |
diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h index 11be5ad2e0e9..272514c2d456 100644 --- a/arch/x86/include/asm/vmx.h +++ b/arch/x86/include/asm/vmx.h | |||
@@ -55,6 +55,7 @@ | |||
55 | #define SECONDARY_EXEC_ENABLE_EPT 0x00000002 | 55 | #define SECONDARY_EXEC_ENABLE_EPT 0x00000002 |
56 | #define SECONDARY_EXEC_ENABLE_VPID 0x00000020 | 56 | #define SECONDARY_EXEC_ENABLE_VPID 0x00000020 |
57 | #define SECONDARY_EXEC_WBINVD_EXITING 0x00000040 | 57 | #define SECONDARY_EXEC_WBINVD_EXITING 0x00000040 |
58 | #define SECONDARY_EXEC_UNRESTRICTED_GUEST 0x00000080 | ||
58 | 59 | ||
59 | 60 | ||
60 | #define PIN_BASED_EXT_INTR_MASK 0x00000001 | 61 | #define PIN_BASED_EXT_INTR_MASK 0x00000001 |
@@ -351,9 +352,16 @@ enum vmcs_field { | |||
351 | #define VMX_EPT_EXTENT_INDIVIDUAL_ADDR 0 | 352 | #define VMX_EPT_EXTENT_INDIVIDUAL_ADDR 0 |
352 | #define VMX_EPT_EXTENT_CONTEXT 1 | 353 | #define VMX_EPT_EXTENT_CONTEXT 1 |
353 | #define VMX_EPT_EXTENT_GLOBAL 2 | 354 | #define VMX_EPT_EXTENT_GLOBAL 2 |
355 | |||
356 | #define VMX_EPT_EXECUTE_ONLY_BIT (1ull) | ||
357 | #define VMX_EPT_PAGE_WALK_4_BIT (1ull << 6) | ||
358 | #define VMX_EPTP_UC_BIT (1ull << 8) | ||
359 | #define VMX_EPTP_WB_BIT (1ull << 14) | ||
360 | #define VMX_EPT_2MB_PAGE_BIT (1ull << 16) | ||
354 | #define VMX_EPT_EXTENT_INDIVIDUAL_BIT (1ull << 24) | 361 | #define VMX_EPT_EXTENT_INDIVIDUAL_BIT (1ull << 24) |
355 | #define VMX_EPT_EXTENT_CONTEXT_BIT (1ull << 25) | 362 | #define VMX_EPT_EXTENT_CONTEXT_BIT (1ull << 25) |
356 | #define VMX_EPT_EXTENT_GLOBAL_BIT (1ull << 26) | 363 | #define VMX_EPT_EXTENT_GLOBAL_BIT (1ull << 26) |
364 | |||
357 | #define VMX_EPT_DEFAULT_GAW 3 | 365 | #define VMX_EPT_DEFAULT_GAW 3 |
358 | #define VMX_EPT_MAX_GAW 0x4 | 366 | #define VMX_EPT_MAX_GAW 0x4 |
359 | #define VMX_EPT_MT_EPTE_SHIFT 3 | 367 | #define VMX_EPT_MT_EPTE_SHIFT 3 |