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-rw-r--r--arch/x86/include/asm/a.out-core.h4
-rw-r--r--arch/x86/include/asm/cpufeature.h1
-rw-r--r--arch/x86/include/asm/kvm.h7
-rw-r--r--arch/x86/include/asm/math_emu.h29
-rw-r--r--arch/x86/include/asm/mpspec.h6
-rw-r--r--arch/x86/include/asm/page.h1
-rw-r--r--arch/x86/include/asm/paravirt.h18
-rw-r--r--arch/x86/include/asm/pgtable.h26
-rw-r--r--arch/x86/include/asm/processor.h2
-rw-r--r--arch/x86/include/asm/spinlock.h1
-rw-r--r--arch/x86/include/asm/traps.h4
-rw-r--r--arch/x86/include/asm/xen/page.h2
12 files changed, 51 insertions, 50 deletions
diff --git a/arch/x86/include/asm/a.out-core.h b/arch/x86/include/asm/a.out-core.h
index 37822206083e..3c601f8224be 100644
--- a/arch/x86/include/asm/a.out-core.h
+++ b/arch/x86/include/asm/a.out-core.h
@@ -23,8 +23,6 @@
23 */ 23 */
24static inline void aout_dump_thread(struct pt_regs *regs, struct user *dump) 24static inline void aout_dump_thread(struct pt_regs *regs, struct user *dump)
25{ 25{
26 u16 gs;
27
28/* changed the size calculations - should hopefully work better. lbt */ 26/* changed the size calculations - should hopefully work better. lbt */
29 dump->magic = CMAGIC; 27 dump->magic = CMAGIC;
30 dump->start_code = 0; 28 dump->start_code = 0;
@@ -57,7 +55,7 @@ static inline void aout_dump_thread(struct pt_regs *regs, struct user *dump)
57 dump->regs.ds = (u16)regs->ds; 55 dump->regs.ds = (u16)regs->ds;
58 dump->regs.es = (u16)regs->es; 56 dump->regs.es = (u16)regs->es;
59 dump->regs.fs = (u16)regs->fs; 57 dump->regs.fs = (u16)regs->fs;
60 savesegment(gs, gs); 58 savesegment(gs, dump->regs.gs);
61 dump->regs.orig_ax = regs->orig_ax; 59 dump->regs.orig_ax = regs->orig_ax;
62 dump->regs.ip = regs->ip; 60 dump->regs.ip = regs->ip;
63 dump->regs.cs = (u16)regs->cs; 61 dump->regs.cs = (u16)regs->cs;
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index ea408dcba513..7301e60dc4a8 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -93,6 +93,7 @@
93#define X86_FEATURE_XTOPOLOGY (3*32+22) /* cpu topology enum extensions */ 93#define X86_FEATURE_XTOPOLOGY (3*32+22) /* cpu topology enum extensions */
94#define X86_FEATURE_TSC_RELIABLE (3*32+23) /* TSC is known to be reliable */ 94#define X86_FEATURE_TSC_RELIABLE (3*32+23) /* TSC is known to be reliable */
95#define X86_FEATURE_NONSTOP_TSC (3*32+24) /* TSC does not stop in C states */ 95#define X86_FEATURE_NONSTOP_TSC (3*32+24) /* TSC does not stop in C states */
96#define X86_FEATURE_CLFLUSH_MONITOR (3*32+25) /* "" clflush reqd with monitor */
96 97
97/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ 98/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
98#define X86_FEATURE_XMM3 (4*32+ 0) /* "pni" SSE-3 */ 99#define X86_FEATURE_XMM3 (4*32+ 0) /* "pni" SSE-3 */
diff --git a/arch/x86/include/asm/kvm.h b/arch/x86/include/asm/kvm.h
index d2e3bf3608af..886c9402ec45 100644
--- a/arch/x86/include/asm/kvm.h
+++ b/arch/x86/include/asm/kvm.h
@@ -9,6 +9,13 @@
9#include <linux/types.h> 9#include <linux/types.h>
10#include <linux/ioctl.h> 10#include <linux/ioctl.h>
11 11
12/* Select x86 specific features in <linux/kvm.h> */
13#define __KVM_HAVE_PIT
14#define __KVM_HAVE_IOAPIC
15#define __KVM_HAVE_DEVICE_ASSIGNMENT
16#define __KVM_HAVE_MSI
17#define __KVM_HAVE_USER_NMI
18
12/* Architectural interrupt line count. */ 19/* Architectural interrupt line count. */
13#define KVM_NR_INTERRUPTS 256 20#define KVM_NR_INTERRUPTS 256
14 21
diff --git a/arch/x86/include/asm/math_emu.h b/arch/x86/include/asm/math_emu.h
index 5a65b107ad58..031f6266f425 100644
--- a/arch/x86/include/asm/math_emu.h
+++ b/arch/x86/include/asm/math_emu.h
@@ -1,31 +1,18 @@
1#ifndef _ASM_X86_MATH_EMU_H 1#ifndef _ASM_X86_MATH_EMU_H
2#define _ASM_X86_MATH_EMU_H 2#define _ASM_X86_MATH_EMU_H
3 3
4#include <asm/ptrace.h>
5#include <asm/vm86.h>
6
4/* This structure matches the layout of the data saved to the stack 7/* This structure matches the layout of the data saved to the stack
5 following a device-not-present interrupt, part of it saved 8 following a device-not-present interrupt, part of it saved
6 automatically by the 80386/80486. 9 automatically by the 80386/80486.
7 */ 10 */
8struct info { 11struct math_emu_info {
9 long ___orig_eip; 12 long ___orig_eip;
10 long ___ebx; 13 union {
11 long ___ecx; 14 struct pt_regs *regs;
12 long ___edx; 15 struct kernel_vm86_regs *vm86;
13 long ___esi; 16 };
14 long ___edi;
15 long ___ebp;
16 long ___eax;
17 long ___ds;
18 long ___es;
19 long ___fs;
20 long ___orig_eax;
21 long ___eip;
22 long ___cs;
23 long ___eflags;
24 long ___esp;
25 long ___ss;
26 long ___vm86_es; /* This and the following only in vm86 mode */
27 long ___vm86_ds;
28 long ___vm86_fs;
29 long ___vm86_gs;
30}; 17};
31#endif /* _ASM_X86_MATH_EMU_H */ 18#endif /* _ASM_X86_MATH_EMU_H */
diff --git a/arch/x86/include/asm/mpspec.h b/arch/x86/include/asm/mpspec.h
index 62d14ce3cd00..bd22f2a3713f 100644
--- a/arch/x86/include/asm/mpspec.h
+++ b/arch/x86/include/asm/mpspec.h
@@ -60,6 +60,7 @@ extern void mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
60 u32 gsi); 60 u32 gsi);
61extern void mp_config_acpi_legacy_irqs(void); 61extern void mp_config_acpi_legacy_irqs(void);
62extern int mp_register_gsi(u32 gsi, int edge_level, int active_high_low); 62extern int mp_register_gsi(u32 gsi, int edge_level, int active_high_low);
63extern int acpi_probe_gsi(void);
63#ifdef CONFIG_X86_IO_APIC 64#ifdef CONFIG_X86_IO_APIC
64extern int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin, 65extern int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,
65 u32 gsi, int triggering, int polarity); 66 u32 gsi, int triggering, int polarity);
@@ -71,6 +72,11 @@ mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,
71 return 0; 72 return 0;
72} 73}
73#endif 74#endif
75#else /* !CONFIG_ACPI: */
76static inline int acpi_probe_gsi(void)
77{
78 return 0;
79}
74#endif /* CONFIG_ACPI */ 80#endif /* CONFIG_ACPI */
75 81
76#define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_APICS) 82#define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_APICS)
diff --git a/arch/x86/include/asm/page.h b/arch/x86/include/asm/page.h
index e9873a2e8695..776579119a00 100644
--- a/arch/x86/include/asm/page.h
+++ b/arch/x86/include/asm/page.h
@@ -57,7 +57,6 @@ typedef struct { pgdval_t pgd; } pgd_t;
57typedef struct { pgprotval_t pgprot; } pgprot_t; 57typedef struct { pgprotval_t pgprot; } pgprot_t;
58 58
59extern int page_is_ram(unsigned long pagenr); 59extern int page_is_ram(unsigned long pagenr);
60extern int pagerange_is_ram(unsigned long start, unsigned long end);
61extern int devmem_is_allowed(unsigned long pagenr); 60extern int devmem_is_allowed(unsigned long pagenr);
62extern void map_devmem(unsigned long pfn, unsigned long size, 61extern void map_devmem(unsigned long pfn, unsigned long size,
63 pgprot_t vma_prot); 62 pgprot_t vma_prot);
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index ba3e2ff6aedc..e299287e8e33 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -1352,14 +1352,7 @@ static inline void arch_leave_lazy_cpu_mode(void)
1352 PVOP_VCALL0(pv_cpu_ops.lazy_mode.leave); 1352 PVOP_VCALL0(pv_cpu_ops.lazy_mode.leave);
1353} 1353}
1354 1354
1355static inline void arch_flush_lazy_cpu_mode(void) 1355void arch_flush_lazy_cpu_mode(void);
1356{
1357 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)) {
1358 arch_leave_lazy_cpu_mode();
1359 arch_enter_lazy_cpu_mode();
1360 }
1361}
1362
1363 1356
1364#define __HAVE_ARCH_ENTER_LAZY_MMU_MODE 1357#define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
1365static inline void arch_enter_lazy_mmu_mode(void) 1358static inline void arch_enter_lazy_mmu_mode(void)
@@ -1372,13 +1365,7 @@ static inline void arch_leave_lazy_mmu_mode(void)
1372 PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave); 1365 PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
1373} 1366}
1374 1367
1375static inline void arch_flush_lazy_mmu_mode(void) 1368void arch_flush_lazy_mmu_mode(void);
1376{
1377 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU)) {
1378 arch_leave_lazy_mmu_mode();
1379 arch_enter_lazy_mmu_mode();
1380 }
1381}
1382 1369
1383static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx, 1370static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
1384 unsigned long phys, pgprot_t flags) 1371 unsigned long phys, pgprot_t flags)
@@ -1402,6 +1389,7 @@ static inline int __raw_spin_is_contended(struct raw_spinlock *lock)
1402{ 1389{
1403 return PVOP_CALL1(int, pv_lock_ops.spin_is_contended, lock); 1390 return PVOP_CALL1(int, pv_lock_ops.spin_is_contended, lock);
1404} 1391}
1392#define __raw_spin_is_contended __raw_spin_is_contended
1405 1393
1406static __always_inline void __raw_spin_lock(struct raw_spinlock *lock) 1394static __always_inline void __raw_spin_lock(struct raw_spinlock *lock)
1407{ 1395{
diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
index 06bbcbd66e9c..4f5af8447d54 100644
--- a/arch/x86/include/asm/pgtable.h
+++ b/arch/x86/include/asm/pgtable.h
@@ -302,16 +302,30 @@ static inline pte_t pte_mkspecial(pte_t pte)
302 302
303extern pteval_t __supported_pte_mask; 303extern pteval_t __supported_pte_mask;
304 304
305/*
306 * Mask out unsupported bits in a present pgprot. Non-present pgprots
307 * can use those bits for other purposes, so leave them be.
308 */
309static inline pgprotval_t massage_pgprot(pgprot_t pgprot)
310{
311 pgprotval_t protval = pgprot_val(pgprot);
312
313 if (protval & _PAGE_PRESENT)
314 protval &= __supported_pte_mask;
315
316 return protval;
317}
318
305static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot) 319static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
306{ 320{
307 return __pte((((phys_addr_t)page_nr << PAGE_SHIFT) | 321 return __pte(((phys_addr_t)page_nr << PAGE_SHIFT) |
308 pgprot_val(pgprot)) & __supported_pte_mask); 322 massage_pgprot(pgprot));
309} 323}
310 324
311static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot) 325static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
312{ 326{
313 return __pmd((((phys_addr_t)page_nr << PAGE_SHIFT) | 327 return __pmd(((phys_addr_t)page_nr << PAGE_SHIFT) |
314 pgprot_val(pgprot)) & __supported_pte_mask); 328 massage_pgprot(pgprot));
315} 329}
316 330
317static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 331static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
@@ -323,7 +337,7 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
323 * the newprot (if present): 337 * the newprot (if present):
324 */ 338 */
325 val &= _PAGE_CHG_MASK; 339 val &= _PAGE_CHG_MASK;
326 val |= pgprot_val(newprot) & (~_PAGE_CHG_MASK) & __supported_pte_mask; 340 val |= massage_pgprot(newprot) & ~_PAGE_CHG_MASK;
327 341
328 return __pte(val); 342 return __pte(val);
329} 343}
@@ -339,7 +353,7 @@ static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
339 353
340#define pte_pgprot(x) __pgprot(pte_flags(x) & PTE_FLAGS_MASK) 354#define pte_pgprot(x) __pgprot(pte_flags(x) & PTE_FLAGS_MASK)
341 355
342#define canon_pgprot(p) __pgprot(pgprot_val(p) & __supported_pte_mask) 356#define canon_pgprot(p) __pgprot(massage_pgprot(p))
343 357
344static inline int is_new_memtype_allowed(unsigned long flags, 358static inline int is_new_memtype_allowed(unsigned long flags,
345 unsigned long new_flags) 359 unsigned long new_flags)
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 091cd8855f2e..3bfd5235a9eb 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -353,7 +353,7 @@ struct i387_soft_struct {
353 u8 no_update; 353 u8 no_update;
354 u8 rm; 354 u8 rm;
355 u8 alimit; 355 u8 alimit;
356 struct info *info; 356 struct math_emu_info *info;
357 u32 entry_eip; 357 u32 entry_eip;
358}; 358};
359 359
diff --git a/arch/x86/include/asm/spinlock.h b/arch/x86/include/asm/spinlock.h
index d17c91981da2..8247e94ac6b1 100644
--- a/arch/x86/include/asm/spinlock.h
+++ b/arch/x86/include/asm/spinlock.h
@@ -245,6 +245,7 @@ static inline int __raw_spin_is_contended(raw_spinlock_t *lock)
245{ 245{
246 return __ticket_spin_is_contended(lock); 246 return __ticket_spin_is_contended(lock);
247} 247}
248#define __raw_spin_is_contended __raw_spin_is_contended
248 249
249static __always_inline void __raw_spin_lock(raw_spinlock_t *lock) 250static __always_inline void __raw_spin_lock(raw_spinlock_t *lock)
250{ 251{
diff --git a/arch/x86/include/asm/traps.h b/arch/x86/include/asm/traps.h
index 2ee0a3bceedf..cf3bb053da0b 100644
--- a/arch/x86/include/asm/traps.h
+++ b/arch/x86/include/asm/traps.h
@@ -41,7 +41,7 @@ dotraplinkage void do_int3(struct pt_regs *, long);
41dotraplinkage void do_overflow(struct pt_regs *, long); 41dotraplinkage void do_overflow(struct pt_regs *, long);
42dotraplinkage void do_bounds(struct pt_regs *, long); 42dotraplinkage void do_bounds(struct pt_regs *, long);
43dotraplinkage void do_invalid_op(struct pt_regs *, long); 43dotraplinkage void do_invalid_op(struct pt_regs *, long);
44dotraplinkage void do_device_not_available(struct pt_regs *, long); 44dotraplinkage void do_device_not_available(struct pt_regs);
45dotraplinkage void do_coprocessor_segment_overrun(struct pt_regs *, long); 45dotraplinkage void do_coprocessor_segment_overrun(struct pt_regs *, long);
46dotraplinkage void do_invalid_TSS(struct pt_regs *, long); 46dotraplinkage void do_invalid_TSS(struct pt_regs *, long);
47dotraplinkage void do_segment_not_present(struct pt_regs *, long); 47dotraplinkage void do_segment_not_present(struct pt_regs *, long);
@@ -77,7 +77,7 @@ extern int panic_on_unrecovered_nmi;
77extern int kstack_depth_to_print; 77extern int kstack_depth_to_print;
78 78
79void math_error(void __user *); 79void math_error(void __user *);
80asmlinkage void math_emulate(long); 80void math_emulate(struct math_emu_info *);
81#ifdef CONFIG_X86_32 81#ifdef CONFIG_X86_32
82unsigned long patch_espfix_desc(unsigned long, unsigned long); 82unsigned long patch_espfix_desc(unsigned long, unsigned long);
83#else 83#else
diff --git a/arch/x86/include/asm/xen/page.h b/arch/x86/include/asm/xen/page.h
index 7ef617ef1df3..4bd990ee43df 100644
--- a/arch/x86/include/asm/xen/page.h
+++ b/arch/x86/include/asm/xen/page.h
@@ -137,7 +137,7 @@ static inline pte_t mfn_pte(unsigned long page_nr, pgprot_t pgprot)
137 pte_t pte; 137 pte_t pte;
138 138
139 pte.pte = ((phys_addr_t)page_nr << PAGE_SHIFT) | 139 pte.pte = ((phys_addr_t)page_nr << PAGE_SHIFT) |
140 (pgprot_val(pgprot) & __supported_pte_mask); 140 massage_pgprot(pgprot);
141 141
142 return pte; 142 return pte;
143} 143}