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-rw-r--r--arch/x86/include/asm/uv/uv_hub.h63
1 files changed, 62 insertions, 1 deletions
diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index c6ad93e315c8..400776dba9b5 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -112,6 +112,16 @@
112 */ 112 */
113#define UV_MAX_NASID_VALUE (UV_MAX_NUMALINK_NODES * 2) 113#define UV_MAX_NASID_VALUE (UV_MAX_NUMALINK_NODES * 2)
114 114
115struct uv_scir_s {
116 struct timer_list timer;
117 unsigned long offset;
118 unsigned long last;
119 unsigned long idle_on;
120 unsigned long idle_off;
121 unsigned char state;
122 unsigned char enabled;
123};
124
115/* 125/*
116 * The following defines attributes of the HUB chip. These attributes are 126 * The following defines attributes of the HUB chip. These attributes are
117 * frequently referenced and are kept in the per-cpu data areas of each cpu. 127 * frequently referenced and are kept in the per-cpu data areas of each cpu.
@@ -130,7 +140,9 @@ struct uv_hub_info_s {
130 unsigned char blade_processor_id; 140 unsigned char blade_processor_id;
131 unsigned char m_val; 141 unsigned char m_val;
132 unsigned char n_val; 142 unsigned char n_val;
143 struct uv_scir_s scir;
133}; 144};
145
134DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info); 146DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info);
135#define uv_hub_info (&__get_cpu_var(__uv_hub_info)) 147#define uv_hub_info (&__get_cpu_var(__uv_hub_info))
136#define uv_cpu_hub_info(cpu) (&per_cpu(__uv_hub_info, cpu)) 148#define uv_cpu_hub_info(cpu) (&per_cpu(__uv_hub_info, cpu))
@@ -162,6 +174,30 @@ DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info);
162 174
163#define UV_APIC_PNODE_SHIFT 6 175#define UV_APIC_PNODE_SHIFT 6
164 176
177/* Local Bus from cpu's perspective */
178#define LOCAL_BUS_BASE 0x1c00000
179#define LOCAL_BUS_SIZE (4 * 1024 * 1024)
180
181/*
182 * System Controller Interface Reg
183 *
184 * Note there are NO leds on a UV system. This register is only
185 * used by the system controller to monitor system-wide operation.
186 * There are 64 regs per node. With Nahelem cpus (2 cores per node,
187 * 8 cpus per core, 2 threads per cpu) there are 32 cpu threads on
188 * a node.
189 *
190 * The window is located at top of ACPI MMR space
191 */
192#define SCIR_WINDOW_COUNT 64
193#define SCIR_LOCAL_MMR_BASE (LOCAL_BUS_BASE + \
194 LOCAL_BUS_SIZE - \
195 SCIR_WINDOW_COUNT)
196
197#define SCIR_CPU_HEARTBEAT 0x01 /* timer interrupt */
198#define SCIR_CPU_ACTIVITY 0x02 /* not idle */
199#define SCIR_CPU_HB_INTERVAL (HZ) /* once per second */
200
165/* 201/*
166 * Macros for converting between kernel virtual addresses, socket local physical 202 * Macros for converting between kernel virtual addresses, socket local physical
167 * addresses, and UV global physical addresses. 203 * addresses, and UV global physical addresses.
@@ -276,6 +312,16 @@ static inline void uv_write_local_mmr(unsigned long offset, unsigned long val)
276 *uv_local_mmr_address(offset) = val; 312 *uv_local_mmr_address(offset) = val;
277} 313}
278 314
315static inline unsigned char uv_read_local_mmr8(unsigned long offset)
316{
317 return *((unsigned char *)uv_local_mmr_address(offset));
318}
319
320static inline void uv_write_local_mmr8(unsigned long offset, unsigned char val)
321{
322 *((unsigned char *)uv_local_mmr_address(offset)) = val;
323}
324
279/* 325/*
280 * Structures and definitions for converting between cpu, node, pnode, and blade 326 * Structures and definitions for converting between cpu, node, pnode, and blade
281 * numbers. 327 * numbers.
@@ -350,5 +396,20 @@ static inline int uv_num_possible_blades(void)
350 return uv_possible_blades; 396 return uv_possible_blades;
351} 397}
352 398
353#endif /* _ASM_X86_UV_UV_HUB_H */ 399/* Update SCIR state */
400static inline void uv_set_scir_bits(unsigned char value)
401{
402 if (uv_hub_info->scir.state != value) {
403 uv_hub_info->scir.state = value;
404 uv_write_local_mmr8(uv_hub_info->scir.offset, value);
405 }
406}
407static inline void uv_set_cpu_scir_bits(int cpu, unsigned char value)
408{
409 if (uv_cpu_hub_info(cpu)->scir.state != value) {
410 uv_cpu_hub_info(cpu)->scir.state = value;
411 uv_write_local_mmr8(uv_cpu_hub_info(cpu)->scir.offset, value);
412 }
413}
354 414
415#endif /* _ASM_X86_UV_UV_HUB_H */