diff options
Diffstat (limited to 'arch/x86/include/asm/pgtable-3level.h')
| -rw-r--r-- | arch/x86/include/asm/pgtable-3level.h | 17 |
1 files changed, 0 insertions, 17 deletions
diff --git a/arch/x86/include/asm/pgtable-3level.h b/arch/x86/include/asm/pgtable-3level.h index 3f13cdf61156..177b0165ea01 100644 --- a/arch/x86/include/asm/pgtable-3level.h +++ b/arch/x86/include/asm/pgtable-3level.h | |||
| @@ -31,23 +31,6 @@ static inline void native_set_pte(pte_t *ptep, pte_t pte) | |||
| 31 | ptep->pte_low = pte.pte_low; | 31 | ptep->pte_low = pte.pte_low; |
| 32 | } | 32 | } |
| 33 | 33 | ||
| 34 | /* | ||
| 35 | * Since this is only called on user PTEs, and the page fault handler | ||
| 36 | * must handle the already racy situation of simultaneous page faults, | ||
| 37 | * we are justified in merely clearing the PTE present bit, followed | ||
| 38 | * by a set. The ordering here is important. | ||
| 39 | */ | ||
| 40 | static inline void native_set_pte_present(struct mm_struct *mm, | ||
| 41 | unsigned long addr, | ||
| 42 | pte_t *ptep, pte_t pte) | ||
| 43 | { | ||
| 44 | ptep->pte_low = 0; | ||
| 45 | smp_wmb(); | ||
| 46 | ptep->pte_high = pte.pte_high; | ||
| 47 | smp_wmb(); | ||
| 48 | ptep->pte_low = pte.pte_low; | ||
| 49 | } | ||
| 50 | |||
| 51 | static inline void native_set_pte_atomic(pte_t *ptep, pte_t pte) | 34 | static inline void native_set_pte_atomic(pte_t *ptep, pte_t pte) |
| 52 | { | 35 | { |
| 53 | set_64bit((unsigned long long *)(ptep), native_pte_val(pte)); | 36 | set_64bit((unsigned long long *)(ptep), native_pte_val(pte)); |