1 files changed, 19 insertions, 4 deletions

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 8c7ae4318629..65bbec2093aa 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -20,6 +20,7 @@
 #define _EFER_LMA               10 /* Long mode active (read-only) */
 #define _EFER_NX                11 /* No execute enable */
 #define _EFER_SVME              12 /* Enable virtualization */
+#define _EFER_LMSLE             13 /* Long Mode Segment Limit Enable */
 #define _EFER_FFXSR             14 /* Enable Fast FXSAVE/FXRSTOR */
 
 #define EFER_SCE                (1<<_EFER_SCE)
@@ -27,6 +28,7 @@
 #define EFER_LMA                (1<<_EFER_LMA)
 #define EFER_NX                 (1<<_EFER_NX)
 #define EFER_SVME               (1<<_EFER_SVME)
+#define EFER_LMSLE              (1<<_EFER_LMSLE)
 #define EFER_FFXSR              (1<<_EFER_FFXSR)
 
 /* Intel MSRs. Some also available on other CPUs */
@@ -159,8 +161,6 @@
 #define MSR_K7_FID_VID_STATUS           0xc0010042
 
 /* K6 MSRs */
-#define MSR_K6_EFER                     0xc0000080
-#define MSR_K6_STAR                     0xc0000081
 #define MSR_K6_WHCR                     0xc0000082
 #define MSR_K6_UWCCR                    0xc0000085
 #define MSR_K6_EPMR                     0xc0000086
@@ -224,12 +224,14 @@
 #define MSR_IA32_THERM_CONTROL          0x0000019a
 #define MSR_IA32_THERM_INTERRUPT        0x0000019b
 
-#define THERM_INT_LOW_ENABLE            (1 << 0)
-#define THERM_INT_HIGH_ENABLE           (1 << 1)
+#define THERM_INT_HIGH_ENABLE           (1 << 0)
+#define THERM_INT_LOW_ENABLE            (1 << 1)
+#define THERM_INT_PLN_ENABLE            (1 << 24)
 
 #define MSR_IA32_THERM_STATUS           0x0000019c
 
 #define THERM_STATUS_PROCHOT            (1 << 0)
+#define THERM_STATUS_POWER_LIMIT        (1 << 10)
 
 #define MSR_THERM2_CTL                  0x0000019d
 
@@ -239,6 +241,19 @@
 
 #define MSR_IA32_TEMPERATURE_TARGET     0x000001a2
 
+#define MSR_IA32_ENERGY_PERF_BIAS       0x000001b0
+
+#define MSR_IA32_PACKAGE_THERM_STATUS           0x000001b1
+
+#define PACKAGE_THERM_STATUS_PROCHOT            (1 << 0)
+#define PACKAGE_THERM_STATUS_POWER_LIMIT        (1 << 10)
+
+#define MSR_IA32_PACKAGE_THERM_INTERRUPT        0x000001b2
+
+#define PACKAGE_THERM_INT_HIGH_ENABLE           (1 << 0)
+#define PACKAGE_THERM_INT_LOW_ENABLE            (1 << 1)
+#define PACKAGE_THERM_INT_PLN_ENABLE            (1 << 24)
+
 /* MISC_ENABLE bits: architectural */
 #define MSR_IA32_MISC_ENABLE_FAST_STRING        (1ULL << 0)
 #define MSR_IA32_MISC_ENABLE_TCC                (1ULL << 1)