diff options
Diffstat (limited to 'arch/x86/include/asm/cpu_debug.h')
-rw-r--r-- | arch/x86/include/asm/cpu_debug.h | 101 |
1 files changed, 1 insertions, 100 deletions
diff --git a/arch/x86/include/asm/cpu_debug.h b/arch/x86/include/asm/cpu_debug.h index 222802029fa6..d96c1ee3a95c 100644 --- a/arch/x86/include/asm/cpu_debug.h +++ b/arch/x86/include/asm/cpu_debug.h | |||
@@ -86,105 +86,7 @@ enum cpu_file_bit { | |||
86 | CPU_VALUE_BIT, /* value */ | 86 | CPU_VALUE_BIT, /* value */ |
87 | }; | 87 | }; |
88 | 88 | ||
89 | #define CPU_FILE_VALUE (1 << CPU_VALUE_BIT) | 89 | #define CPU_FILE_VALUE (1 << CPU_VALUE_BIT) |
90 | |||
91 | /* | ||
92 | * DisplayFamily_DisplayModel Processor Families/Processor Number Series | ||
93 | * -------------------------- ------------------------------------------ | ||
94 | * 05_01, 05_02, 05_04 Pentium, Pentium with MMX | ||
95 | * | ||
96 | * 06_01 Pentium Pro | ||
97 | * 06_03, 06_05 Pentium II Xeon, Pentium II | ||
98 | * 06_07, 06_08, 06_0A, 06_0B Pentium III Xeon, Pentum III | ||
99 | * | ||
100 | * 06_09, 060D Pentium M | ||
101 | * | ||
102 | * 06_0E Core Duo, Core Solo | ||
103 | * | ||
104 | * 06_0F Xeon 3000, 3200, 5100, 5300, 7300 series, | ||
105 | * Core 2 Quad, Core 2 Extreme, Core 2 Duo, | ||
106 | * Pentium dual-core | ||
107 | * 06_17 Xeon 5200, 5400 series, Core 2 Quad Q9650 | ||
108 | * | ||
109 | * 06_1C Atom | ||
110 | * | ||
111 | * 0F_00, 0F_01, 0F_02 Xeon, Xeon MP, Pentium 4 | ||
112 | * 0F_03, 0F_04 Xeon, Xeon MP, Pentium 4, Pentium D | ||
113 | * | ||
114 | * 0F_06 Xeon 7100, 5000 Series, Xeon MP, | ||
115 | * Pentium 4, Pentium D | ||
116 | */ | ||
117 | |||
118 | /* Register processors bits */ | ||
119 | enum cpu_processor_bit { | ||
120 | CPU_NONE, | ||
121 | /* Intel */ | ||
122 | CPU_INTEL_PENTIUM_BIT, | ||
123 | CPU_INTEL_P6_BIT, | ||
124 | CPU_INTEL_PENTIUM_M_BIT, | ||
125 | CPU_INTEL_CORE_BIT, | ||
126 | CPU_INTEL_CORE2_BIT, | ||
127 | CPU_INTEL_ATOM_BIT, | ||
128 | CPU_INTEL_XEON_P4_BIT, | ||
129 | CPU_INTEL_XEON_MP_BIT, | ||
130 | /* AMD */ | ||
131 | CPU_AMD_K6_BIT, | ||
132 | CPU_AMD_K7_BIT, | ||
133 | CPU_AMD_K8_BIT, | ||
134 | CPU_AMD_0F_BIT, | ||
135 | CPU_AMD_10_BIT, | ||
136 | CPU_AMD_11_BIT, | ||
137 | }; | ||
138 | |||
139 | #define CPU_INTEL_PENTIUM (1 << CPU_INTEL_PENTIUM_BIT) | ||
140 | #define CPU_INTEL_P6 (1 << CPU_INTEL_P6_BIT) | ||
141 | #define CPU_INTEL_PENTIUM_M (1 << CPU_INTEL_PENTIUM_M_BIT) | ||
142 | #define CPU_INTEL_CORE (1 << CPU_INTEL_CORE_BIT) | ||
143 | #define CPU_INTEL_CORE2 (1 << CPU_INTEL_CORE2_BIT) | ||
144 | #define CPU_INTEL_ATOM (1 << CPU_INTEL_ATOM_BIT) | ||
145 | #define CPU_INTEL_XEON_P4 (1 << CPU_INTEL_XEON_P4_BIT) | ||
146 | #define CPU_INTEL_XEON_MP (1 << CPU_INTEL_XEON_MP_BIT) | ||
147 | |||
148 | #define CPU_INTEL_PX (CPU_INTEL_P6 | CPU_INTEL_PENTIUM_M) | ||
149 | #define CPU_INTEL_COREX (CPU_INTEL_CORE | CPU_INTEL_CORE2) | ||
150 | #define CPU_INTEL_XEON (CPU_INTEL_XEON_P4 | CPU_INTEL_XEON_MP) | ||
151 | #define CPU_CO_AT (CPU_INTEL_CORE | CPU_INTEL_ATOM) | ||
152 | #define CPU_C2_AT (CPU_INTEL_CORE2 | CPU_INTEL_ATOM) | ||
153 | #define CPU_CX_AT (CPU_INTEL_COREX | CPU_INTEL_ATOM) | ||
154 | #define CPU_CX_XE (CPU_INTEL_COREX | CPU_INTEL_XEON) | ||
155 | #define CPU_P6_XE (CPU_INTEL_P6 | CPU_INTEL_XEON) | ||
156 | #define CPU_PM_CO_AT (CPU_INTEL_PENTIUM_M | CPU_CO_AT) | ||
157 | #define CPU_C2_AT_XE (CPU_C2_AT | CPU_INTEL_XEON) | ||
158 | #define CPU_CX_AT_XE (CPU_CX_AT | CPU_INTEL_XEON) | ||
159 | #define CPU_P6_CX_AT (CPU_INTEL_P6 | CPU_CX_AT) | ||
160 | #define CPU_P6_CX_XE (CPU_P6_XE | CPU_INTEL_COREX) | ||
161 | #define CPU_P6_CX_AT_XE (CPU_INTEL_P6 | CPU_CX_AT_XE) | ||
162 | #define CPU_PM_CX_AT_XE (CPU_INTEL_PENTIUM_M | CPU_CX_AT_XE) | ||
163 | #define CPU_PM_CX_AT (CPU_INTEL_PENTIUM_M | CPU_CX_AT) | ||
164 | #define CPU_PM_CX_XE (CPU_INTEL_PENTIUM_M | CPU_CX_XE) | ||
165 | #define CPU_PX_CX_AT (CPU_INTEL_PX | CPU_CX_AT) | ||
166 | #define CPU_PX_CX_AT_XE (CPU_INTEL_PX | CPU_CX_AT_XE) | ||
167 | |||
168 | /* Select all supported Intel CPUs */ | ||
169 | #define CPU_INTEL_ALL (CPU_INTEL_PENTIUM | CPU_PX_CX_AT_XE) | ||
170 | |||
171 | #define CPU_AMD_K6 (1 << CPU_AMD_K6_BIT) | ||
172 | #define CPU_AMD_K7 (1 << CPU_AMD_K7_BIT) | ||
173 | #define CPU_AMD_K8 (1 << CPU_AMD_K8_BIT) | ||
174 | #define CPU_AMD_0F (1 << CPU_AMD_0F_BIT) | ||
175 | #define CPU_AMD_10 (1 << CPU_AMD_10_BIT) | ||
176 | #define CPU_AMD_11 (1 << CPU_AMD_11_BIT) | ||
177 | |||
178 | #define CPU_K10_PLUS (CPU_AMD_10 | CPU_AMD_11) | ||
179 | #define CPU_K0F_PLUS (CPU_AMD_0F | CPU_K10_PLUS) | ||
180 | #define CPU_K8_PLUS (CPU_AMD_K8 | CPU_K0F_PLUS) | ||
181 | #define CPU_K7_PLUS (CPU_AMD_K7 | CPU_K8_PLUS) | ||
182 | |||
183 | /* Select all supported AMD CPUs */ | ||
184 | #define CPU_AMD_ALL (CPU_AMD_K6 | CPU_K7_PLUS) | ||
185 | |||
186 | /* Select all supported CPUs */ | ||
187 | #define CPU_ALL (CPU_INTEL_ALL | CPU_AMD_ALL) | ||
188 | 90 | ||
189 | #define MAX_CPU_FILES 512 | 91 | #define MAX_CPU_FILES 512 |
190 | 92 | ||
@@ -220,7 +122,6 @@ struct cpu_debug_range { | |||
220 | unsigned min; /* Register range min */ | 122 | unsigned min; /* Register range min */ |
221 | unsigned max; /* Register range max */ | 123 | unsigned max; /* Register range max */ |
222 | unsigned flag; /* Supported flags */ | 124 | unsigned flag; /* Supported flags */ |
223 | unsigned model; /* Supported models */ | ||
224 | }; | 125 | }; |
225 | 126 | ||
226 | #endif /* _ASM_X86_CPU_DEBUG_H */ | 127 | #endif /* _ASM_X86_CPU_DEBUG_H */ |