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-rw-r--r--arch/x86/Kconfig11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index eb4092568f9e..0ab2dcef7d84 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -390,6 +390,7 @@ config X86_MRST
390 bool "Moorestown MID platform" 390 bool "Moorestown MID platform"
391 depends on X86_32 391 depends on X86_32
392 depends on X86_EXTENDED_PLATFORM 392 depends on X86_EXTENDED_PLATFORM
393 select APB_TIMER
393 ---help--- 394 ---help---
394 Moorestown is Intel's Low Power Intel Architecture (LPIA) based Moblin 395 Moorestown is Intel's Low Power Intel Architecture (LPIA) based Moblin
395 Internet Device(MID) platform. Moorestown consists of two chips: 396 Internet Device(MID) platform. Moorestown consists of two chips:
@@ -612,6 +613,16 @@ config HPET_EMULATE_RTC
612 def_bool y 613 def_bool y
613 depends on HPET_TIMER && (RTC=y || RTC=m || RTC_DRV_CMOS=m || RTC_DRV_CMOS=y) 614 depends on HPET_TIMER && (RTC=y || RTC=m || RTC_DRV_CMOS=m || RTC_DRV_CMOS=y)
614 615
616config APB_TIMER
617 def_bool y if MRST
618 prompt "Langwell APB Timer Support" if X86_MRST
619 help
620 APB timer is the replacement for 8254, HPET on X86 MID platforms.
621 The APBT provides a stable time base on SMP
622 systems, unlike the TSC, but it is more expensive to access,
623 as it is off-chip. APB timers are always running regardless of CPU
624 C states, they are used as per CPU clockevent device when possible.
625
615# Mark as embedded because too many people got it wrong. 626# Mark as embedded because too many people got it wrong.
616# The code disables itself when not needed. 627# The code disables itself when not needed.
617config DMI 628config DMI