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-rw-r--r--arch/v850/kernel/me2.c74
1 files changed, 74 insertions, 0 deletions
diff --git a/arch/v850/kernel/me2.c b/arch/v850/kernel/me2.c
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1/*
2 * arch/v850/kernel/me2.c -- V850E/ME2 chip-specific support
3 *
4 * Copyright (C) 2003 NEC Corporation
5 * Copyright (C) 2003 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#include <linux/config.h>
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/mm.h>
18#include <linux/swap.h>
19#include <linux/bootmem.h>
20#include <linux/irq.h>
21
22#include <asm/atomic.h>
23#include <asm/page.h>
24#include <asm/machdep.h>
25#include <asm/v850e_timer_d.h>
26
27#include "mach.h"
28
29void __init mach_sched_init (struct irqaction *timer_action)
30{
31 /* Start hardware timer. */
32 v850e_timer_d_configure (0, HZ);
33 /* Install timer interrupt handler. */
34 setup_irq (IRQ_INTCMD(0), timer_action);
35}
36
37static struct v850e_intc_irq_init irq_inits[] = {
38 { "IRQ", 0, NUM_CPU_IRQS, 1, 7 },
39 { "INTP", IRQ_INTP(0), IRQ_INTP_NUM, 1, 5 },
40 { "CMD", IRQ_INTCMD(0), IRQ_INTCMD_NUM, 1, 3 },
41 { "UBTIRE", IRQ_INTUBTIRE(0), IRQ_INTUBTIRE_NUM, 5, 4 },
42 { "UBTIR", IRQ_INTUBTIR(0), IRQ_INTUBTIR_NUM, 5, 4 },
43 { "UBTIT", IRQ_INTUBTIT(0), IRQ_INTUBTIT_NUM, 5, 4 },
44 { "UBTIF", IRQ_INTUBTIF(0), IRQ_INTUBTIF_NUM, 5, 4 },
45 { "UBTITO", IRQ_INTUBTITO(0), IRQ_INTUBTITO_NUM, 5, 4 },
46 { 0 }
47};
48#define NUM_IRQ_INITS ((sizeof irq_inits / sizeof irq_inits[0]) - 1)
49
50static struct hw_interrupt_type hw_itypes[NUM_IRQ_INITS];
51
52/* Initialize V850E/ME2 chip interrupts. */
53void __init me2_init_irqs (void)
54{
55 v850e_intc_init_irq_types (irq_inits, hw_itypes);
56}
57
58/* Called before configuring an on-chip UART. */
59void me2_uart_pre_configure (unsigned chan, unsigned cflags, unsigned baud)
60{
61 if (chan == 0) {
62 /* Specify that the relevent pins on the chip should do
63 serial I/O, not direct I/O. */
64 ME2_PORT1_PMC |= 0xC;
65 /* Specify that we're using the UART, not the CSI device. */
66 ME2_PORT1_PFC |= 0xC;
67 } else if (chan == 1) {
68 /* Specify that the relevent pins on the chip should do
69 serial I/O, not direct I/O. */
70 ME2_PORT2_PMC |= 0x6;
71 /* Specify that we're using the UART, not the CSI device. */
72 ME2_PORT2_PFC |= 0x6;
73 }
74}