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-rw-r--r--arch/um/include/asm/cache.h17
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/um/include/asm/cache.h b/arch/um/include/asm/cache.h
new file mode 100644
index 000000000000..19e1bdd67416
--- /dev/null
+++ b/arch/um/include/asm/cache.h
@@ -0,0 +1,17 @@
1#ifndef __UM_CACHE_H
2#define __UM_CACHE_H
3
4
5#if defined(CONFIG_UML_X86) && !defined(CONFIG_64BIT)
6# define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT)
7#elif defined(CONFIG_UML_X86) /* 64-bit */
8# define L1_CACHE_SHIFT 6 /* Should be 7 on Intel */
9#else
10/* XXX: this was taken from x86, now it's completely random. Luckily only
11 * affects SMP padding. */
12# define L1_CACHE_SHIFT 5
13#endif
14
15#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
16
17#endif