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-rw-r--r--arch/tile/include/arch/sim.h48
-rw-r--r--arch/tile/include/arch/sim_def.h3
2 files changed, 39 insertions, 12 deletions
diff --git a/arch/tile/include/arch/sim.h b/arch/tile/include/arch/sim.h
index 74b7c1624d34..e54b7b0527f3 100644
--- a/arch/tile/include/arch/sim.h
+++ b/arch/tile/include/arch/sim.h
@@ -152,16 +152,33 @@ sim_dump(unsigned int mask)
152/** 152/**
153 * Print a string to the simulator stdout. 153 * Print a string to the simulator stdout.
154 * 154 *
155 * @param str The string to be written; a newline is automatically added. 155 * @param str The string to be written.
156 */
157static __inline void
158sim_print(const char* str)
159{
160 for ( ; *str != '\0'; str++)
161 {
162 __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_PUTC |
163 (*str << _SIM_CONTROL_OPERATOR_BITS));
164 }
165 __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_PUTC |
166 (SIM_PUTC_FLUSH_BINARY << _SIM_CONTROL_OPERATOR_BITS));
167}
168
169
170/**
171 * Print a string to the simulator stdout.
172 *
173 * @param str The string to be written (a newline is automatically added).
156 */ 174 */
157static __inline void 175static __inline void
158sim_print_string(const char* str) 176sim_print_string(const char* str)
159{ 177{
160 int i; 178 for ( ; *str != '\0'; str++)
161 for (i = 0; str[i] != 0; i++)
162 { 179 {
163 __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_PUTC | 180 __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_PUTC |
164 (str[i] << _SIM_CONTROL_OPERATOR_BITS)); 181 (*str << _SIM_CONTROL_OPERATOR_BITS));
165 } 182 }
166 __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_PUTC | 183 __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_PUTC |
167 (SIM_PUTC_FLUSH_STRING << _SIM_CONTROL_OPERATOR_BITS)); 184 (SIM_PUTC_FLUSH_STRING << _SIM_CONTROL_OPERATOR_BITS));
@@ -203,7 +220,7 @@ sim_command(const char* str)
203 * we are passing to the simulator are actually valid in the registers 220 * we are passing to the simulator are actually valid in the registers
204 * (i.e. returned from memory) prior to the SIM_CONTROL spr. 221 * (i.e. returned from memory) prior to the SIM_CONTROL spr.
205 */ 222 */
206static __inline int _sim_syscall0(int val) 223static __inline long _sim_syscall0(int val)
207{ 224{
208 long result; 225 long result;
209 __asm__ __volatile__ ("mtspr SIM_CONTROL, r0" 226 __asm__ __volatile__ ("mtspr SIM_CONTROL, r0"
@@ -211,7 +228,7 @@ static __inline int _sim_syscall0(int val)
211 return result; 228 return result;
212} 229}
213 230
214static __inline int _sim_syscall1(int val, long arg1) 231static __inline long _sim_syscall1(int val, long arg1)
215{ 232{
216 long result; 233 long result;
217 __asm__ __volatile__ ("{ and zero, r1, r1; mtspr SIM_CONTROL, r0 }" 234 __asm__ __volatile__ ("{ and zero, r1, r1; mtspr SIM_CONTROL, r0 }"
@@ -219,7 +236,7 @@ static __inline int _sim_syscall1(int val, long arg1)
219 return result; 236 return result;
220} 237}
221 238
222static __inline int _sim_syscall2(int val, long arg1, long arg2) 239static __inline long _sim_syscall2(int val, long arg1, long arg2)
223{ 240{
224 long result; 241 long result;
225 __asm__ __volatile__ ("{ and zero, r1, r2; mtspr SIM_CONTROL, r0 }" 242 __asm__ __volatile__ ("{ and zero, r1, r2; mtspr SIM_CONTROL, r0 }"
@@ -233,7 +250,7 @@ static __inline int _sim_syscall2(int val, long arg1, long arg2)
233 the register values for arguments 3 and up may still be in flight 250 the register values for arguments 3 and up may still be in flight
234 to the core from a stack frame reload. */ 251 to the core from a stack frame reload. */
235 252
236static __inline int _sim_syscall3(int val, long arg1, long arg2, long arg3) 253static __inline long _sim_syscall3(int val, long arg1, long arg2, long arg3)
237{ 254{
238 long result; 255 long result;
239 __asm__ __volatile__ ("{ and zero, r3, r3 };" 256 __asm__ __volatile__ ("{ and zero, r3, r3 };"
@@ -244,7 +261,7 @@ static __inline int _sim_syscall3(int val, long arg1, long arg2, long arg3)
244 return result; 261 return result;
245} 262}
246 263
247static __inline int _sim_syscall4(int val, long arg1, long arg2, long arg3, 264static __inline long _sim_syscall4(int val, long arg1, long arg2, long arg3,
248 long arg4) 265 long arg4)
249{ 266{
250 long result; 267 long result;
@@ -256,7 +273,7 @@ static __inline int _sim_syscall4(int val, long arg1, long arg2, long arg3,
256 return result; 273 return result;
257} 274}
258 275
259static __inline int _sim_syscall5(int val, long arg1, long arg2, long arg3, 276static __inline long _sim_syscall5(int val, long arg1, long arg2, long arg3,
260 long arg4, long arg5) 277 long arg4, long arg5)
261{ 278{
262 long result; 279 long result;
@@ -268,7 +285,6 @@ static __inline int _sim_syscall5(int val, long arg1, long arg2, long arg3,
268 return result; 285 return result;
269} 286}
270 287
271
272/** 288/**
273 * Make a special syscall to the simulator itself, if running under 289 * Make a special syscall to the simulator itself, if running under
274 * simulation. This is used as the implementation of other functions 290 * simulation. This is used as the implementation of other functions
@@ -281,7 +297,8 @@ static __inline int _sim_syscall5(int val, long arg1, long arg2, long arg3,
281 */ 297 */
282#define _sim_syscall(syscall_num, nr, args...) \ 298#define _sim_syscall(syscall_num, nr, args...) \
283 _sim_syscall##nr( \ 299 _sim_syscall##nr( \
284 ((syscall_num) << _SIM_CONTROL_OPERATOR_BITS) | SIM_CONTROL_SYSCALL, args) 300 ((syscall_num) << _SIM_CONTROL_OPERATOR_BITS) | SIM_CONTROL_SYSCALL, \
301 ##args)
285 302
286 303
287/* Values for the "access_mask" parameters below. */ 304/* Values for the "access_mask" parameters below. */
@@ -365,6 +382,13 @@ sim_validate_lines_evicted(unsigned long long pa, unsigned long length)
365} 382}
366 383
367 384
385/* Return the current CPU speed in cycles per second. */
386static __inline long
387sim_query_cpu_speed(void)
388{
389 return _sim_syscall(SIM_SYSCALL_QUERY_CPU_SPEED, 0);
390}
391
368#endif /* !__DOXYGEN__ */ 392#endif /* !__DOXYGEN__ */
369 393
370 394
diff --git a/arch/tile/include/arch/sim_def.h b/arch/tile/include/arch/sim_def.h
index 7a17082c3773..4b44a2b6a09a 100644
--- a/arch/tile/include/arch/sim_def.h
+++ b/arch/tile/include/arch/sim_def.h
@@ -243,6 +243,9 @@
243 */ 243 */
244#define SIM_SYSCALL_VALIDATE_LINES_EVICTED 5 244#define SIM_SYSCALL_VALIDATE_LINES_EVICTED 5
245 245
246/** Syscall number for sim_query_cpu_speed(). */
247#define SIM_SYSCALL_QUERY_CPU_SPEED 6
248
246 249
247/* 250/*
248 * Bit masks which can be shifted by 8, combined with 251 * Bit masks which can be shifted by 8, combined with