diff options
Diffstat (limited to 'arch/tile/mm/homecache.c')
-rw-r--r-- | arch/tile/mm/homecache.c | 29 |
1 files changed, 3 insertions, 26 deletions
diff --git a/arch/tile/mm/homecache.c b/arch/tile/mm/homecache.c index e3ee55b0327a..004ba568d93f 100644 --- a/arch/tile/mm/homecache.c +++ b/arch/tile/mm/homecache.c | |||
@@ -43,12 +43,9 @@ | |||
43 | #include "migrate.h" | 43 | #include "migrate.h" |
44 | 44 | ||
45 | 45 | ||
46 | #if CHIP_HAS_COHERENT_LOCAL_CACHE() | ||
47 | |||
48 | /* | 46 | /* |
49 | * The noallocl2 option suppresses all use of the L2 cache to cache | 47 | * The noallocl2 option suppresses all use of the L2 cache to cache |
50 | * locally from a remote home. There's no point in using it if we | 48 | * locally from a remote home. |
51 | * don't have coherent local caching, though. | ||
52 | */ | 49 | */ |
53 | static int __write_once noallocl2; | 50 | static int __write_once noallocl2; |
54 | static int __init set_noallocl2(char *str) | 51 | static int __init set_noallocl2(char *str) |
@@ -58,12 +55,6 @@ static int __init set_noallocl2(char *str) | |||
58 | } | 55 | } |
59 | early_param("noallocl2", set_noallocl2); | 56 | early_param("noallocl2", set_noallocl2); |
60 | 57 | ||
61 | #else | ||
62 | |||
63 | #define noallocl2 0 | ||
64 | |||
65 | #endif | ||
66 | |||
67 | 58 | ||
68 | /* | 59 | /* |
69 | * Update the irq_stat for cpus that we are going to interrupt | 60 | * Update the irq_stat for cpus that we are going to interrupt |
@@ -265,10 +256,8 @@ static int pte_to_home(pte_t pte) | |||
265 | return PAGE_HOME_INCOHERENT; | 256 | return PAGE_HOME_INCOHERENT; |
266 | case HV_PTE_MODE_UNCACHED: | 257 | case HV_PTE_MODE_UNCACHED: |
267 | return PAGE_HOME_UNCACHED; | 258 | return PAGE_HOME_UNCACHED; |
268 | #if CHIP_HAS_CBOX_HOME_MAP() | ||
269 | case HV_PTE_MODE_CACHE_HASH_L3: | 259 | case HV_PTE_MODE_CACHE_HASH_L3: |
270 | return PAGE_HOME_HASH; | 260 | return PAGE_HOME_HASH; |
271 | #endif | ||
272 | } | 261 | } |
273 | panic("Bad PTE %#llx\n", pte.val); | 262 | panic("Bad PTE %#llx\n", pte.val); |
274 | } | 263 | } |
@@ -325,20 +314,16 @@ pte_t pte_set_home(pte_t pte, int home) | |||
325 | HV_PTE_MODE_CACHE_NO_L3); | 314 | HV_PTE_MODE_CACHE_NO_L3); |
326 | } | 315 | } |
327 | } else | 316 | } else |
328 | #if CHIP_HAS_CBOX_HOME_MAP() | ||
329 | if (hash_default) | 317 | if (hash_default) |
330 | pte = hv_pte_set_mode(pte, HV_PTE_MODE_CACHE_HASH_L3); | 318 | pte = hv_pte_set_mode(pte, HV_PTE_MODE_CACHE_HASH_L3); |
331 | else | 319 | else |
332 | #endif | ||
333 | pte = hv_pte_set_mode(pte, HV_PTE_MODE_CACHE_NO_L3); | 320 | pte = hv_pte_set_mode(pte, HV_PTE_MODE_CACHE_NO_L3); |
334 | pte = hv_pte_set_nc(pte); | 321 | pte = hv_pte_set_nc(pte); |
335 | break; | 322 | break; |
336 | 323 | ||
337 | #if CHIP_HAS_CBOX_HOME_MAP() | ||
338 | case PAGE_HOME_HASH: | 324 | case PAGE_HOME_HASH: |
339 | pte = hv_pte_set_mode(pte, HV_PTE_MODE_CACHE_HASH_L3); | 325 | pte = hv_pte_set_mode(pte, HV_PTE_MODE_CACHE_HASH_L3); |
340 | break; | 326 | break; |
341 | #endif | ||
342 | 327 | ||
343 | default: | 328 | default: |
344 | BUG_ON(home < 0 || home >= NR_CPUS || | 329 | BUG_ON(home < 0 || home >= NR_CPUS || |
@@ -348,7 +333,6 @@ pte_t pte_set_home(pte_t pte, int home) | |||
348 | break; | 333 | break; |
349 | } | 334 | } |
350 | 335 | ||
351 | #if CHIP_HAS_NC_AND_NOALLOC_BITS() | ||
352 | if (noallocl2) | 336 | if (noallocl2) |
353 | pte = hv_pte_set_no_alloc_l2(pte); | 337 | pte = hv_pte_set_no_alloc_l2(pte); |
354 | 338 | ||
@@ -357,7 +341,6 @@ pte_t pte_set_home(pte_t pte, int home) | |||
357 | hv_pte_get_mode(pte) == HV_PTE_MODE_CACHE_NO_L3) { | 341 | hv_pte_get_mode(pte) == HV_PTE_MODE_CACHE_NO_L3) { |
358 | pte = hv_pte_set_mode(pte, HV_PTE_MODE_UNCACHED); | 342 | pte = hv_pte_set_mode(pte, HV_PTE_MODE_UNCACHED); |
359 | } | 343 | } |
360 | #endif | ||
361 | 344 | ||
362 | /* Checking this case here gives a better panic than from the hv. */ | 345 | /* Checking this case here gives a better panic than from the hv. */ |
363 | BUG_ON(hv_pte_get_mode(pte) == 0); | 346 | BUG_ON(hv_pte_get_mode(pte) == 0); |
@@ -373,16 +356,10 @@ EXPORT_SYMBOL(pte_set_home); | |||
373 | * so they're not suitable for anything but infrequent use. | 356 | * so they're not suitable for anything but infrequent use. |
374 | */ | 357 | */ |
375 | 358 | ||
376 | #if CHIP_HAS_CBOX_HOME_MAP() | ||
377 | static inline int initial_page_home(void) { return PAGE_HOME_HASH; } | ||
378 | #else | ||
379 | static inline int initial_page_home(void) { return 0; } | ||
380 | #endif | ||
381 | |||
382 | int page_home(struct page *page) | 359 | int page_home(struct page *page) |
383 | { | 360 | { |
384 | if (PageHighMem(page)) { | 361 | if (PageHighMem(page)) { |
385 | return initial_page_home(); | 362 | return PAGE_HOME_HASH; |
386 | } else { | 363 | } else { |
387 | unsigned long kva = (unsigned long)page_address(page); | 364 | unsigned long kva = (unsigned long)page_address(page); |
388 | return pte_to_home(*virt_to_kpte(kva)); | 365 | return pte_to_home(*virt_to_kpte(kva)); |
@@ -438,7 +415,7 @@ struct page *homecache_alloc_pages_node(int nid, gfp_t gfp_mask, | |||
438 | void __homecache_free_pages(struct page *page, unsigned int order) | 415 | void __homecache_free_pages(struct page *page, unsigned int order) |
439 | { | 416 | { |
440 | if (put_page_testzero(page)) { | 417 | if (put_page_testzero(page)) { |
441 | homecache_change_page_home(page, order, initial_page_home()); | 418 | homecache_change_page_home(page, order, PAGE_HOME_HASH); |
442 | if (order == 0) { | 419 | if (order == 0) { |
443 | free_hot_cold_page(page, 0); | 420 | free_hot_cold_page(page, 0); |
444 | } else { | 421 | } else { |