diff options
Diffstat (limited to 'arch/tile/kernel/traps.c')
| -rw-r--r-- | arch/tile/kernel/traps.c | 317 |
1 files changed, 317 insertions, 0 deletions
diff --git a/arch/tile/kernel/traps.c b/arch/tile/kernel/traps.c new file mode 100644 index 000000000000..3870abbeeaa2 --- /dev/null +++ b/arch/tile/kernel/traps.c | |||
| @@ -0,0 +1,317 @@ | |||
| 1 | /* | ||
| 2 | * Copyright 2010 Tilera Corporation. All Rights Reserved. | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or | ||
| 5 | * modify it under the terms of the GNU General Public License | ||
| 6 | * as published by the Free Software Foundation, version 2. | ||
| 7 | * | ||
| 8 | * This program is distributed in the hope that it will be useful, but | ||
| 9 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 10 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | ||
| 11 | * NON INFRINGEMENT. See the GNU General Public License for | ||
| 12 | * more details. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include <linux/sched.h> | ||
| 16 | #include <linux/kernel.h> | ||
| 17 | #include <linux/kprobes.h> | ||
| 18 | #include <linux/module.h> | ||
| 19 | #include <linux/reboot.h> | ||
| 20 | #include <linux/uaccess.h> | ||
| 21 | #include <linux/ptrace.h> | ||
| 22 | #include <asm/opcode-tile.h> | ||
| 23 | #include <asm/opcode_constants.h> | ||
| 24 | #include <asm/stack.h> | ||
| 25 | #include <asm/traps.h> | ||
| 26 | |||
| 27 | #include <arch/interrupts.h> | ||
| 28 | #include <arch/spr_def.h> | ||
| 29 | |||
| 30 | void __init trap_init(void) | ||
| 31 | { | ||
| 32 | /* Nothing needed here since we link code at .intrpt1 */ | ||
| 33 | } | ||
| 34 | |||
| 35 | int unaligned_fixup = 1; | ||
| 36 | |||
| 37 | static int __init setup_unaligned_fixup(char *str) | ||
| 38 | { | ||
| 39 | /* | ||
| 40 | * Say "=-1" to completely disable it. If you just do "=0", we | ||
| 41 | * will still parse the instruction, then fire a SIGBUS with | ||
| 42 | * the correct address from inside the single_step code. | ||
| 43 | */ | ||
| 44 | long val; | ||
| 45 | if (strict_strtol(str, 0, &val) != 0) | ||
| 46 | return 0; | ||
| 47 | unaligned_fixup = val; | ||
| 48 | pr_info("Fixups for unaligned data accesses are %s\n", | ||
| 49 | unaligned_fixup >= 0 ? | ||
| 50 | (unaligned_fixup ? "enabled" : "disabled") : | ||
| 51 | "completely disabled"); | ||
| 52 | return 1; | ||
| 53 | } | ||
| 54 | __setup("unaligned_fixup=", setup_unaligned_fixup); | ||
| 55 | |||
| 56 | #if CHIP_HAS_TILE_DMA() | ||
| 57 | |||
| 58 | static int dma_disabled; | ||
| 59 | |||
| 60 | static int __init nodma(char *str) | ||
| 61 | { | ||
| 62 | pr_info("User-space DMA is disabled\n"); | ||
| 63 | dma_disabled = 1; | ||
| 64 | return 1; | ||
| 65 | } | ||
| 66 | __setup("nodma", nodma); | ||
| 67 | |||
| 68 | /* How to decode SPR_GPV_REASON */ | ||
| 69 | #define IRET_ERROR (1U << 31) | ||
| 70 | #define MT_ERROR (1U << 30) | ||
| 71 | #define MF_ERROR (1U << 29) | ||
| 72 | #define SPR_INDEX ((1U << 15) - 1) | ||
| 73 | #define SPR_MPL_SHIFT 9 /* starting bit position for MPL encoded in SPR */ | ||
| 74 | |||
| 75 | /* | ||
| 76 | * See if this GPV is just to notify the kernel of SPR use and we can | ||
| 77 | * retry the user instruction after adjusting some MPLs suitably. | ||
| 78 | */ | ||
| 79 | static int retry_gpv(unsigned int gpv_reason) | ||
| 80 | { | ||
| 81 | int mpl; | ||
| 82 | |||
| 83 | if (gpv_reason & IRET_ERROR) | ||
| 84 | return 0; | ||
| 85 | |||
| 86 | BUG_ON((gpv_reason & (MT_ERROR|MF_ERROR)) == 0); | ||
| 87 | mpl = (gpv_reason & SPR_INDEX) >> SPR_MPL_SHIFT; | ||
| 88 | if (mpl == INT_DMA_NOTIFY && !dma_disabled) { | ||
| 89 | /* User is turning on DMA. Allow it and retry. */ | ||
| 90 | printk(KERN_DEBUG "Process %d/%s is now enabled for DMA\n", | ||
| 91 | current->pid, current->comm); | ||
| 92 | BUG_ON(current->thread.tile_dma_state.enabled); | ||
| 93 | current->thread.tile_dma_state.enabled = 1; | ||
| 94 | grant_dma_mpls(); | ||
| 95 | return 1; | ||
| 96 | } | ||
| 97 | |||
| 98 | return 0; | ||
| 99 | } | ||
| 100 | |||
| 101 | #endif /* CHIP_HAS_TILE_DMA() */ | ||
| 102 | |||
| 103 | #ifdef __tilegx__ | ||
| 104 | #define bundle_bits tilegx_bundle_bits | ||
| 105 | #else | ||
| 106 | #define bundle_bits tile_bundle_bits | ||
| 107 | #endif | ||
| 108 | |||
| 109 | extern bundle_bits bpt_code; | ||
| 110 | |||
| 111 | asm(".pushsection .rodata.bpt_code,\"a\";" | ||
| 112 | ".align 8;" | ||
| 113 | "bpt_code: bpt;" | ||
| 114 | ".size bpt_code,.-bpt_code;" | ||
| 115 | ".popsection"); | ||
| 116 | |||
| 117 | static int special_ill(bundle_bits bundle, int *sigp, int *codep) | ||
| 118 | { | ||
| 119 | int sig, code, maxcode; | ||
| 120 | |||
| 121 | if (bundle == bpt_code) { | ||
| 122 | *sigp = SIGTRAP; | ||
| 123 | *codep = TRAP_BRKPT; | ||
| 124 | return 1; | ||
| 125 | } | ||
| 126 | |||
| 127 | /* If it's a "raise" bundle, then "ill" must be in pipe X1. */ | ||
| 128 | #ifdef __tilegx__ | ||
| 129 | if ((bundle & TILEGX_BUNDLE_MODE_MASK) != 0) | ||
| 130 | return 0; | ||
| 131 | if (get_Opcode_X1(bundle) != UNARY_OPCODE_X1) | ||
| 132 | return 0; | ||
| 133 | if (get_UnaryOpcodeExtension_X1(bundle) != ILL_UNARY_OPCODE_X1) | ||
| 134 | return 0; | ||
| 135 | #else | ||
| 136 | if (bundle & TILE_BUNDLE_Y_ENCODING_MASK) | ||
| 137 | return 0; | ||
| 138 | if (get_Opcode_X1(bundle) != SHUN_0_OPCODE_X1) | ||
| 139 | return 0; | ||
| 140 | if (get_UnShOpcodeExtension_X1(bundle) != UN_0_SHUN_0_OPCODE_X1) | ||
| 141 | return 0; | ||
| 142 | if (get_UnOpcodeExtension_X1(bundle) != ILL_UN_0_SHUN_0_OPCODE_X1) | ||
| 143 | return 0; | ||
| 144 | #endif | ||
| 145 | |||
| 146 | /* Check that the magic distinguishers are set to mean "raise". */ | ||
| 147 | if (get_Dest_X1(bundle) != 29 || get_SrcA_X1(bundle) != 37) | ||
| 148 | return 0; | ||
| 149 | |||
| 150 | /* There must be an "addli zero, zero, VAL" in X0. */ | ||
| 151 | if (get_Opcode_X0(bundle) != ADDLI_OPCODE_X0) | ||
| 152 | return 0; | ||
| 153 | if (get_Dest_X0(bundle) != TREG_ZERO) | ||
| 154 | return 0; | ||
| 155 | if (get_SrcA_X0(bundle) != TREG_ZERO) | ||
| 156 | return 0; | ||
| 157 | |||
| 158 | /* | ||
| 159 | * Validate the proposed signal number and si_code value. | ||
| 160 | * Note that we embed these in the static instruction itself | ||
| 161 | * so that we perturb the register state as little as possible | ||
| 162 | * at the time of the actual fault; it's unlikely you'd ever | ||
| 163 | * need to dynamically choose which kind of fault to raise | ||
| 164 | * from user space. | ||
| 165 | */ | ||
| 166 | sig = get_Imm16_X0(bundle) & 0x3f; | ||
| 167 | switch (sig) { | ||
| 168 | case SIGILL: | ||
| 169 | maxcode = NSIGILL; | ||
| 170 | break; | ||
| 171 | case SIGFPE: | ||
| 172 | maxcode = NSIGFPE; | ||
| 173 | break; | ||
| 174 | case SIGSEGV: | ||
| 175 | maxcode = NSIGSEGV; | ||
| 176 | break; | ||
| 177 | case SIGBUS: | ||
| 178 | maxcode = NSIGBUS; | ||
| 179 | break; | ||
| 180 | case SIGTRAP: | ||
| 181 | maxcode = NSIGTRAP; | ||
| 182 | break; | ||
| 183 | default: | ||
| 184 | return 0; | ||
| 185 | } | ||
| 186 | code = (get_Imm16_X0(bundle) >> 6) & 0xf; | ||
| 187 | if (code <= 0 || code > maxcode) | ||
| 188 | return 0; | ||
| 189 | |||
| 190 | /* Make it the requested signal. */ | ||
| 191 | *sigp = sig; | ||
| 192 | *codep = code | __SI_FAULT; | ||
| 193 | return 1; | ||
| 194 | } | ||
| 195 | |||
| 196 | void __kprobes do_trap(struct pt_regs *regs, int fault_num, | ||
| 197 | unsigned long reason) | ||
| 198 | { | ||
| 199 | siginfo_t info = { 0 }; | ||
| 200 | int signo, code; | ||
| 201 | unsigned long address; | ||
| 202 | bundle_bits instr; | ||
| 203 | |||
| 204 | /* Re-enable interrupts. */ | ||
| 205 | local_irq_enable(); | ||
| 206 | |||
| 207 | /* | ||
| 208 | * If it hits in kernel mode and we can't fix it up, just exit the | ||
| 209 | * current process and hope for the best. | ||
| 210 | */ | ||
| 211 | if (!user_mode(regs)) { | ||
| 212 | if (fixup_exception(regs)) /* only UNALIGN_DATA in practice */ | ||
| 213 | return; | ||
| 214 | pr_alert("Kernel took bad trap %d at PC %#lx\n", | ||
| 215 | fault_num, regs->pc); | ||
| 216 | if (fault_num == INT_GPV) | ||
| 217 | pr_alert("GPV_REASON is %#lx\n", reason); | ||
| 218 | show_regs(regs); | ||
| 219 | do_exit(SIGKILL); /* FIXME: implement i386 die() */ | ||
| 220 | return; | ||
| 221 | } | ||
| 222 | |||
| 223 | switch (fault_num) { | ||
| 224 | case INT_ILL: | ||
| 225 | if (copy_from_user(&instr, (void __user *)regs->pc, | ||
| 226 | sizeof(instr))) { | ||
| 227 | pr_err("Unreadable instruction for INT_ILL:" | ||
| 228 | " %#lx\n", regs->pc); | ||
| 229 | do_exit(SIGKILL); | ||
| 230 | return; | ||
| 231 | } | ||
| 232 | if (!special_ill(instr, &signo, &code)) { | ||
| 233 | signo = SIGILL; | ||
| 234 | code = ILL_ILLOPC; | ||
| 235 | } | ||
| 236 | address = regs->pc; | ||
| 237 | break; | ||
| 238 | case INT_GPV: | ||
| 239 | #if CHIP_HAS_TILE_DMA() | ||
| 240 | if (retry_gpv(reason)) | ||
| 241 | return; | ||
| 242 | #endif | ||
| 243 | /*FALLTHROUGH*/ | ||
| 244 | case INT_UDN_ACCESS: | ||
| 245 | case INT_IDN_ACCESS: | ||
| 246 | #if CHIP_HAS_SN() | ||
| 247 | case INT_SN_ACCESS: | ||
| 248 | #endif | ||
| 249 | signo = SIGILL; | ||
| 250 | code = ILL_PRVREG; | ||
| 251 | address = regs->pc; | ||
| 252 | break; | ||
| 253 | case INT_SWINT_3: | ||
| 254 | case INT_SWINT_2: | ||
| 255 | case INT_SWINT_0: | ||
| 256 | signo = SIGILL; | ||
| 257 | code = ILL_ILLTRP; | ||
| 258 | address = regs->pc; | ||
| 259 | break; | ||
| 260 | case INT_UNALIGN_DATA: | ||
| 261 | #ifndef __tilegx__ /* FIXME: GX: no single-step yet */ | ||
| 262 | if (unaligned_fixup >= 0) { | ||
| 263 | struct single_step_state *state = | ||
| 264 | current_thread_info()->step_state; | ||
| 265 | if (!state || | ||
| 266 | (void __user *)(regs->pc) != state->buffer) { | ||
| 267 | single_step_once(regs); | ||
| 268 | return; | ||
| 269 | } | ||
| 270 | } | ||
| 271 | #endif | ||
| 272 | signo = SIGBUS; | ||
| 273 | code = BUS_ADRALN; | ||
| 274 | address = 0; | ||
| 275 | break; | ||
| 276 | case INT_DOUBLE_FAULT: | ||
| 277 | /* | ||
| 278 | * For double fault, "reason" is actually passed as | ||
| 279 | * SYSTEM_SAVE_1_2, the hypervisor's double-fault info, so | ||
| 280 | * we can provide the original fault number rather than | ||
| 281 | * the uninteresting "INT_DOUBLE_FAULT" so the user can | ||
| 282 | * learn what actually struck while PL0 ICS was set. | ||
| 283 | */ | ||
| 284 | fault_num = reason; | ||
| 285 | signo = SIGILL; | ||
| 286 | code = ILL_DBLFLT; | ||
| 287 | address = regs->pc; | ||
| 288 | break; | ||
| 289 | #ifdef __tilegx__ | ||
| 290 | case INT_ILL_TRANS: | ||
| 291 | signo = SIGSEGV; | ||
| 292 | code = SEGV_MAPERR; | ||
| 293 | if (reason & SPR_ILL_TRANS_REASON__I_STREAM_VA_RMASK) | ||
| 294 | address = regs->pc; | ||
| 295 | else | ||
| 296 | address = 0; /* FIXME: GX: single-step for address */ | ||
| 297 | break; | ||
| 298 | #endif | ||
| 299 | default: | ||
| 300 | panic("Unexpected do_trap interrupt number %d", fault_num); | ||
| 301 | return; | ||
| 302 | } | ||
| 303 | |||
| 304 | info.si_signo = signo; | ||
| 305 | info.si_code = code; | ||
| 306 | info.si_addr = (void __user *)address; | ||
| 307 | if (signo == SIGILL) | ||
| 308 | info.si_trapno = fault_num; | ||
| 309 | force_sig_info(signo, &info, current); | ||
| 310 | } | ||
| 311 | |||
| 312 | void kernel_double_fault(int dummy, ulong pc, ulong lr, ulong sp, ulong r52) | ||
| 313 | { | ||
| 314 | _dump_stack(dummy, pc, lr, sp, r52); | ||
| 315 | pr_emerg("Double fault: exiting\n"); | ||
| 316 | machine_halt(); | ||
| 317 | } | ||
