diff options
Diffstat (limited to 'arch/tile/kernel/tile-desc_64.c')
-rw-r--r-- | arch/tile/kernel/tile-desc_64.c | 2200 |
1 files changed, 2200 insertions, 0 deletions
diff --git a/arch/tile/kernel/tile-desc_64.c b/arch/tile/kernel/tile-desc_64.c new file mode 100644 index 000000000000..d57007bed77f --- /dev/null +++ b/arch/tile/kernel/tile-desc_64.c | |||
@@ -0,0 +1,2200 @@ | |||
1 | /* This define is BFD_RELOC_##x for real bfd, or -1 for everyone else. */ | ||
2 | #define BFD_RELOC(x) -1 | ||
3 | |||
4 | /* Special registers. */ | ||
5 | #define TREG_LR 55 | ||
6 | #define TREG_SN 56 | ||
7 | #define TREG_ZERO 63 | ||
8 | |||
9 | /* FIXME: Rename this. */ | ||
10 | #include <asm/opcode-tile_64.h> | ||
11 | |||
12 | #include <linux/stddef.h> | ||
13 | |||
14 | const struct tilegx_opcode tilegx_opcodes[334] = | ||
15 | { | ||
16 | { "bpt", TILEGX_OPC_BPT, 0x2, 0, TREG_ZERO, 0, | ||
17 | { { 0, }, { }, { 0, }, { 0, }, { 0, } }, | ||
18 | }, | ||
19 | { "info", TILEGX_OPC_INFO, 0xf, 1, TREG_ZERO, 1, | ||
20 | { { 0 }, { 1 }, { 2 }, { 3 }, { 0, } }, | ||
21 | }, | ||
22 | { "infol", TILEGX_OPC_INFOL, 0x3, 1, TREG_ZERO, 1, | ||
23 | { { 4 }, { 5 }, { 0, }, { 0, }, { 0, } }, | ||
24 | }, | ||
25 | { "move", TILEGX_OPC_MOVE, 0xf, 2, TREG_ZERO, 1, | ||
26 | { { 6, 7 }, { 8, 9 }, { 10, 11 }, { 12, 13 }, { 0, } }, | ||
27 | }, | ||
28 | { "movei", TILEGX_OPC_MOVEI, 0xf, 2, TREG_ZERO, 1, | ||
29 | { { 6, 0 }, { 8, 1 }, { 10, 2 }, { 12, 3 }, { 0, } }, | ||
30 | }, | ||
31 | { "moveli", TILEGX_OPC_MOVELI, 0x3, 2, TREG_ZERO, 1, | ||
32 | { { 6, 4 }, { 8, 5 }, { 0, }, { 0, }, { 0, } }, | ||
33 | }, | ||
34 | { "prefetch", TILEGX_OPC_PREFETCH, 0x12, 1, TREG_ZERO, 1, | ||
35 | { { 0, }, { 9 }, { 0, }, { 0, }, { 14 } }, | ||
36 | }, | ||
37 | { "prefetch_add_l1", TILEGX_OPC_PREFETCH_ADD_L1, 0x2, 2, TREG_ZERO, 1, | ||
38 | { { 0, }, { 15, 1 }, { 0, }, { 0, }, { 0, } }, | ||
39 | }, | ||
40 | { "prefetch_add_l1_fault", TILEGX_OPC_PREFETCH_ADD_L1_FAULT, 0x2, 2, TREG_ZERO, 1, | ||
41 | { { 0, }, { 15, 1 }, { 0, }, { 0, }, { 0, } }, | ||
42 | }, | ||
43 | { "prefetch_add_l2", TILEGX_OPC_PREFETCH_ADD_L2, 0x2, 2, TREG_ZERO, 1, | ||
44 | { { 0, }, { 15, 1 }, { 0, }, { 0, }, { 0, } }, | ||
45 | }, | ||
46 | { "prefetch_add_l2_fault", TILEGX_OPC_PREFETCH_ADD_L2_FAULT, 0x2, 2, TREG_ZERO, 1, | ||
47 | { { 0, }, { 15, 1 }, { 0, }, { 0, }, { 0, } }, | ||
48 | }, | ||
49 | { "prefetch_add_l3", TILEGX_OPC_PREFETCH_ADD_L3, 0x2, 2, TREG_ZERO, 1, | ||
50 | { { 0, }, { 15, 1 }, { 0, }, { 0, }, { 0, } }, | ||
51 | }, | ||
52 | { "prefetch_add_l3_fault", TILEGX_OPC_PREFETCH_ADD_L3_FAULT, 0x2, 2, TREG_ZERO, 1, | ||
53 | { { 0, }, { 15, 1 }, { 0, }, { 0, }, { 0, } }, | ||
54 | }, | ||
55 | { "prefetch_l1", TILEGX_OPC_PREFETCH_L1, 0x12, 1, TREG_ZERO, 1, | ||
56 | { { 0, }, { 9 }, { 0, }, { 0, }, { 14 } }, | ||
57 | }, | ||
58 | { "prefetch_l1_fault", TILEGX_OPC_PREFETCH_L1_FAULT, 0x12, 1, TREG_ZERO, 1, | ||
59 | { { 0, }, { 9 }, { 0, }, { 0, }, { 14 } }, | ||
60 | }, | ||
61 | { "prefetch_l2", TILEGX_OPC_PREFETCH_L2, 0x12, 1, TREG_ZERO, 1, | ||
62 | { { 0, }, { 9 }, { 0, }, { 0, }, { 14 } }, | ||
63 | }, | ||
64 | { "prefetch_l2_fault", TILEGX_OPC_PREFETCH_L2_FAULT, 0x12, 1, TREG_ZERO, 1, | ||
65 | { { 0, }, { 9 }, { 0, }, { 0, }, { 14 } }, | ||
66 | }, | ||
67 | { "prefetch_l3", TILEGX_OPC_PREFETCH_L3, 0x12, 1, TREG_ZERO, 1, | ||
68 | { { 0, }, { 9 }, { 0, }, { 0, }, { 14 } }, | ||
69 | }, | ||
70 | { "prefetch_l3_fault", TILEGX_OPC_PREFETCH_L3_FAULT, 0x12, 1, TREG_ZERO, 1, | ||
71 | { { 0, }, { 9 }, { 0, }, { 0, }, { 14 } }, | ||
72 | }, | ||
73 | { "raise", TILEGX_OPC_RAISE, 0x2, 0, TREG_ZERO, 1, | ||
74 | { { 0, }, { }, { 0, }, { 0, }, { 0, } }, | ||
75 | }, | ||
76 | { "add", TILEGX_OPC_ADD, 0xf, 3, TREG_ZERO, 1, | ||
77 | { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, | ||
78 | }, | ||
79 | { "addi", TILEGX_OPC_ADDI, 0xf, 3, TREG_ZERO, 1, | ||
80 | { { 6, 7, 0 }, { 8, 9, 1 }, { 10, 11, 2 }, { 12, 13, 3 }, { 0, } }, | ||
81 | }, | ||
82 | { "addli", TILEGX_OPC_ADDLI, 0x3, 3, TREG_ZERO, 1, | ||
83 | { { 6, 7, 4 }, { 8, 9, 5 }, { 0, }, { 0, }, { 0, } }, | ||
84 | }, | ||
85 | { "addx", TILEGX_OPC_ADDX, 0xf, 3, TREG_ZERO, 1, | ||
86 | { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, | ||
87 | }, | ||
88 | { "addxi", TILEGX_OPC_ADDXI, 0xf, 3, TREG_ZERO, 1, | ||
89 | { { 6, 7, 0 }, { 8, 9, 1 }, { 10, 11, 2 }, { 12, 13, 3 }, { 0, } }, | ||
90 | }, | ||
91 | { "addxli", TILEGX_OPC_ADDXLI, 0x3, 3, TREG_ZERO, 1, | ||
92 | { { 6, 7, 4 }, { 8, 9, 5 }, { 0, }, { 0, }, { 0, } }, | ||
93 | }, | ||
94 | { "addxsc", TILEGX_OPC_ADDXSC, 0x3, 3, TREG_ZERO, 1, | ||
95 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
96 | }, | ||
97 | { "and", TILEGX_OPC_AND, 0xf, 3, TREG_ZERO, 1, | ||
98 | { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, | ||
99 | }, | ||
100 | { "andi", TILEGX_OPC_ANDI, 0xf, 3, TREG_ZERO, 1, | ||
101 | { { 6, 7, 0 }, { 8, 9, 1 }, { 10, 11, 2 }, { 12, 13, 3 }, { 0, } }, | ||
102 | }, | ||
103 | { "beqz", TILEGX_OPC_BEQZ, 0x2, 2, TREG_ZERO, 1, | ||
104 | { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, | ||
105 | }, | ||
106 | { "beqzt", TILEGX_OPC_BEQZT, 0x2, 2, TREG_ZERO, 1, | ||
107 | { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, | ||
108 | }, | ||
109 | { "bfexts", TILEGX_OPC_BFEXTS, 0x1, 4, TREG_ZERO, 1, | ||
110 | { { 6, 7, 21, 22 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
111 | }, | ||
112 | { "bfextu", TILEGX_OPC_BFEXTU, 0x1, 4, TREG_ZERO, 1, | ||
113 | { { 6, 7, 21, 22 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
114 | }, | ||
115 | { "bfins", TILEGX_OPC_BFINS, 0x1, 4, TREG_ZERO, 1, | ||
116 | { { 23, 7, 21, 22 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
117 | }, | ||
118 | { "bgez", TILEGX_OPC_BGEZ, 0x2, 2, TREG_ZERO, 1, | ||
119 | { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, | ||
120 | }, | ||
121 | { "bgezt", TILEGX_OPC_BGEZT, 0x2, 2, TREG_ZERO, 1, | ||
122 | { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, | ||
123 | }, | ||
124 | { "bgtz", TILEGX_OPC_BGTZ, 0x2, 2, TREG_ZERO, 1, | ||
125 | { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, | ||
126 | }, | ||
127 | { "bgtzt", TILEGX_OPC_BGTZT, 0x2, 2, TREG_ZERO, 1, | ||
128 | { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, | ||
129 | }, | ||
130 | { "blbc", TILEGX_OPC_BLBC, 0x2, 2, TREG_ZERO, 1, | ||
131 | { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, | ||
132 | }, | ||
133 | { "blbct", TILEGX_OPC_BLBCT, 0x2, 2, TREG_ZERO, 1, | ||
134 | { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, | ||
135 | }, | ||
136 | { "blbs", TILEGX_OPC_BLBS, 0x2, 2, TREG_ZERO, 1, | ||
137 | { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, | ||
138 | }, | ||
139 | { "blbst", TILEGX_OPC_BLBST, 0x2, 2, TREG_ZERO, 1, | ||
140 | { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, | ||
141 | }, | ||
142 | { "blez", TILEGX_OPC_BLEZ, 0x2, 2, TREG_ZERO, 1, | ||
143 | { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, | ||
144 | }, | ||
145 | { "blezt", TILEGX_OPC_BLEZT, 0x2, 2, TREG_ZERO, 1, | ||
146 | { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, | ||
147 | }, | ||
148 | { "bltz", TILEGX_OPC_BLTZ, 0x2, 2, TREG_ZERO, 1, | ||
149 | { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, | ||
150 | }, | ||
151 | { "bltzt", TILEGX_OPC_BLTZT, 0x2, 2, TREG_ZERO, 1, | ||
152 | { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, | ||
153 | }, | ||
154 | { "bnez", TILEGX_OPC_BNEZ, 0x2, 2, TREG_ZERO, 1, | ||
155 | { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, | ||
156 | }, | ||
157 | { "bnezt", TILEGX_OPC_BNEZT, 0x2, 2, TREG_ZERO, 1, | ||
158 | { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } }, | ||
159 | }, | ||
160 | { "clz", TILEGX_OPC_CLZ, 0x5, 2, TREG_ZERO, 1, | ||
161 | { { 6, 7 }, { 0, }, { 10, 11 }, { 0, }, { 0, } }, | ||
162 | }, | ||
163 | { "cmoveqz", TILEGX_OPC_CMOVEQZ, 0x5, 3, TREG_ZERO, 1, | ||
164 | { { 23, 7, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } }, | ||
165 | }, | ||
166 | { "cmovnez", TILEGX_OPC_CMOVNEZ, 0x5, 3, TREG_ZERO, 1, | ||
167 | { { 23, 7, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } }, | ||
168 | }, | ||
169 | { "cmpeq", TILEGX_OPC_CMPEQ, 0xf, 3, TREG_ZERO, 1, | ||
170 | { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, | ||
171 | }, | ||
172 | { "cmpeqi", TILEGX_OPC_CMPEQI, 0xf, 3, TREG_ZERO, 1, | ||
173 | { { 6, 7, 0 }, { 8, 9, 1 }, { 10, 11, 2 }, { 12, 13, 3 }, { 0, } }, | ||
174 | }, | ||
175 | { "cmpexch", TILEGX_OPC_CMPEXCH, 0x2, 3, TREG_ZERO, 1, | ||
176 | { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
177 | }, | ||
178 | { "cmpexch4", TILEGX_OPC_CMPEXCH4, 0x2, 3, TREG_ZERO, 1, | ||
179 | { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
180 | }, | ||
181 | { "cmples", TILEGX_OPC_CMPLES, 0xf, 3, TREG_ZERO, 1, | ||
182 | { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, | ||
183 | }, | ||
184 | { "cmpleu", TILEGX_OPC_CMPLEU, 0xf, 3, TREG_ZERO, 1, | ||
185 | { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, | ||
186 | }, | ||
187 | { "cmplts", TILEGX_OPC_CMPLTS, 0xf, 3, TREG_ZERO, 1, | ||
188 | { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, | ||
189 | }, | ||
190 | { "cmpltsi", TILEGX_OPC_CMPLTSI, 0xf, 3, TREG_ZERO, 1, | ||
191 | { { 6, 7, 0 }, { 8, 9, 1 }, { 10, 11, 2 }, { 12, 13, 3 }, { 0, } }, | ||
192 | }, | ||
193 | { "cmpltu", TILEGX_OPC_CMPLTU, 0xf, 3, TREG_ZERO, 1, | ||
194 | { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, | ||
195 | }, | ||
196 | { "cmpltui", TILEGX_OPC_CMPLTUI, 0x3, 3, TREG_ZERO, 1, | ||
197 | { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } }, | ||
198 | }, | ||
199 | { "cmpne", TILEGX_OPC_CMPNE, 0xf, 3, TREG_ZERO, 1, | ||
200 | { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, | ||
201 | }, | ||
202 | { "cmul", TILEGX_OPC_CMUL, 0x1, 3, TREG_ZERO, 1, | ||
203 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
204 | }, | ||
205 | { "cmula", TILEGX_OPC_CMULA, 0x1, 3, TREG_ZERO, 1, | ||
206 | { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
207 | }, | ||
208 | { "cmulaf", TILEGX_OPC_CMULAF, 0x1, 3, TREG_ZERO, 1, | ||
209 | { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
210 | }, | ||
211 | { "cmulf", TILEGX_OPC_CMULF, 0x1, 3, TREG_ZERO, 1, | ||
212 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
213 | }, | ||
214 | { "cmulfr", TILEGX_OPC_CMULFR, 0x1, 3, TREG_ZERO, 1, | ||
215 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
216 | }, | ||
217 | { "cmulh", TILEGX_OPC_CMULH, 0x1, 3, TREG_ZERO, 1, | ||
218 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
219 | }, | ||
220 | { "cmulhr", TILEGX_OPC_CMULHR, 0x1, 3, TREG_ZERO, 1, | ||
221 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
222 | }, | ||
223 | { "crc32_32", TILEGX_OPC_CRC32_32, 0x1, 3, TREG_ZERO, 1, | ||
224 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
225 | }, | ||
226 | { "crc32_8", TILEGX_OPC_CRC32_8, 0x1, 3, TREG_ZERO, 1, | ||
227 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
228 | }, | ||
229 | { "ctz", TILEGX_OPC_CTZ, 0x5, 2, TREG_ZERO, 1, | ||
230 | { { 6, 7 }, { 0, }, { 10, 11 }, { 0, }, { 0, } }, | ||
231 | }, | ||
232 | { "dblalign", TILEGX_OPC_DBLALIGN, 0x1, 3, TREG_ZERO, 1, | ||
233 | { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
234 | }, | ||
235 | { "dblalign2", TILEGX_OPC_DBLALIGN2, 0x3, 3, TREG_ZERO, 1, | ||
236 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
237 | }, | ||
238 | { "dblalign4", TILEGX_OPC_DBLALIGN4, 0x3, 3, TREG_ZERO, 1, | ||
239 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
240 | }, | ||
241 | { "dblalign6", TILEGX_OPC_DBLALIGN6, 0x3, 3, TREG_ZERO, 1, | ||
242 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
243 | }, | ||
244 | { "drain", TILEGX_OPC_DRAIN, 0x2, 0, TREG_ZERO, 0, | ||
245 | { { 0, }, { }, { 0, }, { 0, }, { 0, } }, | ||
246 | }, | ||
247 | { "dtlbpr", TILEGX_OPC_DTLBPR, 0x2, 1, TREG_ZERO, 1, | ||
248 | { { 0, }, { 9 }, { 0, }, { 0, }, { 0, } }, | ||
249 | }, | ||
250 | { "exch", TILEGX_OPC_EXCH, 0x2, 3, TREG_ZERO, 1, | ||
251 | { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
252 | }, | ||
253 | { "exch4", TILEGX_OPC_EXCH4, 0x2, 3, TREG_ZERO, 1, | ||
254 | { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
255 | }, | ||
256 | { "fdouble_add_flags", TILEGX_OPC_FDOUBLE_ADD_FLAGS, 0x1, 3, TREG_ZERO, 1, | ||
257 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
258 | }, | ||
259 | { "fdouble_addsub", TILEGX_OPC_FDOUBLE_ADDSUB, 0x1, 3, TREG_ZERO, 1, | ||
260 | { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
261 | }, | ||
262 | { "fdouble_mul_flags", TILEGX_OPC_FDOUBLE_MUL_FLAGS, 0x1, 3, TREG_ZERO, 1, | ||
263 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
264 | }, | ||
265 | { "fdouble_pack1", TILEGX_OPC_FDOUBLE_PACK1, 0x1, 3, TREG_ZERO, 1, | ||
266 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
267 | }, | ||
268 | { "fdouble_pack2", TILEGX_OPC_FDOUBLE_PACK2, 0x1, 3, TREG_ZERO, 1, | ||
269 | { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
270 | }, | ||
271 | { "fdouble_sub_flags", TILEGX_OPC_FDOUBLE_SUB_FLAGS, 0x1, 3, TREG_ZERO, 1, | ||
272 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
273 | }, | ||
274 | { "fdouble_unpack_max", TILEGX_OPC_FDOUBLE_UNPACK_MAX, 0x1, 3, TREG_ZERO, 1, | ||
275 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
276 | }, | ||
277 | { "fdouble_unpack_min", TILEGX_OPC_FDOUBLE_UNPACK_MIN, 0x1, 3, TREG_ZERO, 1, | ||
278 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
279 | }, | ||
280 | { "fetchadd", TILEGX_OPC_FETCHADD, 0x2, 3, TREG_ZERO, 1, | ||
281 | { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
282 | }, | ||
283 | { "fetchadd4", TILEGX_OPC_FETCHADD4, 0x2, 3, TREG_ZERO, 1, | ||
284 | { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
285 | }, | ||
286 | { "fetchaddgez", TILEGX_OPC_FETCHADDGEZ, 0x2, 3, TREG_ZERO, 1, | ||
287 | { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
288 | }, | ||
289 | { "fetchaddgez4", TILEGX_OPC_FETCHADDGEZ4, 0x2, 3, TREG_ZERO, 1, | ||
290 | { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
291 | }, | ||
292 | { "fetchand", TILEGX_OPC_FETCHAND, 0x2, 3, TREG_ZERO, 1, | ||
293 | { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
294 | }, | ||
295 | { "fetchand4", TILEGX_OPC_FETCHAND4, 0x2, 3, TREG_ZERO, 1, | ||
296 | { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
297 | }, | ||
298 | { "fetchor", TILEGX_OPC_FETCHOR, 0x2, 3, TREG_ZERO, 1, | ||
299 | { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
300 | }, | ||
301 | { "fetchor4", TILEGX_OPC_FETCHOR4, 0x2, 3, TREG_ZERO, 1, | ||
302 | { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
303 | }, | ||
304 | { "finv", TILEGX_OPC_FINV, 0x2, 1, TREG_ZERO, 1, | ||
305 | { { 0, }, { 9 }, { 0, }, { 0, }, { 0, } }, | ||
306 | }, | ||
307 | { "flush", TILEGX_OPC_FLUSH, 0x2, 1, TREG_ZERO, 1, | ||
308 | { { 0, }, { 9 }, { 0, }, { 0, }, { 0, } }, | ||
309 | }, | ||
310 | { "flushwb", TILEGX_OPC_FLUSHWB, 0x2, 0, TREG_ZERO, 1, | ||
311 | { { 0, }, { }, { 0, }, { 0, }, { 0, } }, | ||
312 | }, | ||
313 | { "fnop", TILEGX_OPC_FNOP, 0xf, 0, TREG_ZERO, 1, | ||
314 | { { }, { }, { }, { }, { 0, } }, | ||
315 | }, | ||
316 | { "fsingle_add1", TILEGX_OPC_FSINGLE_ADD1, 0x1, 3, TREG_ZERO, 1, | ||
317 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
318 | }, | ||
319 | { "fsingle_addsub2", TILEGX_OPC_FSINGLE_ADDSUB2, 0x1, 3, TREG_ZERO, 1, | ||
320 | { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
321 | }, | ||
322 | { "fsingle_mul1", TILEGX_OPC_FSINGLE_MUL1, 0x1, 3, TREG_ZERO, 1, | ||
323 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
324 | }, | ||
325 | { "fsingle_mul2", TILEGX_OPC_FSINGLE_MUL2, 0x1, 3, TREG_ZERO, 1, | ||
326 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
327 | }, | ||
328 | { "fsingle_pack1", TILEGX_OPC_FSINGLE_PACK1, 0x5, 2, TREG_ZERO, 1, | ||
329 | { { 6, 7 }, { 0, }, { 10, 11 }, { 0, }, { 0, } }, | ||
330 | }, | ||
331 | { "fsingle_pack2", TILEGX_OPC_FSINGLE_PACK2, 0x1, 3, TREG_ZERO, 1, | ||
332 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
333 | }, | ||
334 | { "fsingle_sub1", TILEGX_OPC_FSINGLE_SUB1, 0x1, 3, TREG_ZERO, 1, | ||
335 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
336 | }, | ||
337 | { "icoh", TILEGX_OPC_ICOH, 0x2, 1, TREG_ZERO, 1, | ||
338 | { { 0, }, { 9 }, { 0, }, { 0, }, { 0, } }, | ||
339 | }, | ||
340 | { "ill", TILEGX_OPC_ILL, 0xa, 0, TREG_ZERO, 1, | ||
341 | { { 0, }, { }, { 0, }, { }, { 0, } }, | ||
342 | }, | ||
343 | { "inv", TILEGX_OPC_INV, 0x2, 1, TREG_ZERO, 1, | ||
344 | { { 0, }, { 9 }, { 0, }, { 0, }, { 0, } }, | ||
345 | }, | ||
346 | { "iret", TILEGX_OPC_IRET, 0x2, 0, TREG_ZERO, 1, | ||
347 | { { 0, }, { }, { 0, }, { 0, }, { 0, } }, | ||
348 | }, | ||
349 | { "j", TILEGX_OPC_J, 0x2, 1, TREG_ZERO, 1, | ||
350 | { { 0, }, { 25 }, { 0, }, { 0, }, { 0, } }, | ||
351 | }, | ||
352 | { "jal", TILEGX_OPC_JAL, 0x2, 1, TREG_LR, 1, | ||
353 | { { 0, }, { 25 }, { 0, }, { 0, }, { 0, } }, | ||
354 | }, | ||
355 | { "jalr", TILEGX_OPC_JALR, 0xa, 1, TREG_LR, 1, | ||
356 | { { 0, }, { 9 }, { 0, }, { 13 }, { 0, } }, | ||
357 | }, | ||
358 | { "jalrp", TILEGX_OPC_JALRP, 0xa, 1, TREG_LR, 1, | ||
359 | { { 0, }, { 9 }, { 0, }, { 13 }, { 0, } }, | ||
360 | }, | ||
361 | { "jr", TILEGX_OPC_JR, 0xa, 1, TREG_ZERO, 1, | ||
362 | { { 0, }, { 9 }, { 0, }, { 13 }, { 0, } }, | ||
363 | }, | ||
364 | { "jrp", TILEGX_OPC_JRP, 0xa, 1, TREG_ZERO, 1, | ||
365 | { { 0, }, { 9 }, { 0, }, { 13 }, { 0, } }, | ||
366 | }, | ||
367 | { "ld", TILEGX_OPC_LD, 0x12, 2, TREG_ZERO, 1, | ||
368 | { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 26, 14 } }, | ||
369 | }, | ||
370 | { "ld1s", TILEGX_OPC_LD1S, 0x12, 2, TREG_ZERO, 1, | ||
371 | { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 26, 14 } }, | ||
372 | }, | ||
373 | { "ld1s_add", TILEGX_OPC_LD1S_ADD, 0x2, 3, TREG_ZERO, 1, | ||
374 | { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } }, | ||
375 | }, | ||
376 | { "ld1u", TILEGX_OPC_LD1U, 0x12, 2, TREG_ZERO, 1, | ||
377 | { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 26, 14 } }, | ||
378 | }, | ||
379 | { "ld1u_add", TILEGX_OPC_LD1U_ADD, 0x2, 3, TREG_ZERO, 1, | ||
380 | { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } }, | ||
381 | }, | ||
382 | { "ld2s", TILEGX_OPC_LD2S, 0x12, 2, TREG_ZERO, 1, | ||
383 | { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 26, 14 } }, | ||
384 | }, | ||
385 | { "ld2s_add", TILEGX_OPC_LD2S_ADD, 0x2, 3, TREG_ZERO, 1, | ||
386 | { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } }, | ||
387 | }, | ||
388 | { "ld2u", TILEGX_OPC_LD2U, 0x12, 2, TREG_ZERO, 1, | ||
389 | { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 26, 14 } }, | ||
390 | }, | ||
391 | { "ld2u_add", TILEGX_OPC_LD2U_ADD, 0x2, 3, TREG_ZERO, 1, | ||
392 | { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } }, | ||
393 | }, | ||
394 | { "ld4s", TILEGX_OPC_LD4S, 0x12, 2, TREG_ZERO, 1, | ||
395 | { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 26, 14 } }, | ||
396 | }, | ||
397 | { "ld4s_add", TILEGX_OPC_LD4S_ADD, 0x2, 3, TREG_ZERO, 1, | ||
398 | { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } }, | ||
399 | }, | ||
400 | { "ld4u", TILEGX_OPC_LD4U, 0x12, 2, TREG_ZERO, 1, | ||
401 | { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 26, 14 } }, | ||
402 | }, | ||
403 | { "ld4u_add", TILEGX_OPC_LD4U_ADD, 0x2, 3, TREG_ZERO, 1, | ||
404 | { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } }, | ||
405 | }, | ||
406 | { "ld_add", TILEGX_OPC_LD_ADD, 0x2, 3, TREG_ZERO, 1, | ||
407 | { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } }, | ||
408 | }, | ||
409 | { "ldna", TILEGX_OPC_LDNA, 0x2, 2, TREG_ZERO, 1, | ||
410 | { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 0, } }, | ||
411 | }, | ||
412 | { "ldna_add", TILEGX_OPC_LDNA_ADD, 0x2, 3, TREG_ZERO, 1, | ||
413 | { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } }, | ||
414 | }, | ||
415 | { "ldnt", TILEGX_OPC_LDNT, 0x2, 2, TREG_ZERO, 1, | ||
416 | { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 0, } }, | ||
417 | }, | ||
418 | { "ldnt1s", TILEGX_OPC_LDNT1S, 0x2, 2, TREG_ZERO, 1, | ||
419 | { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 0, } }, | ||
420 | }, | ||
421 | { "ldnt1s_add", TILEGX_OPC_LDNT1S_ADD, 0x2, 3, TREG_ZERO, 1, | ||
422 | { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } }, | ||
423 | }, | ||
424 | { "ldnt1u", TILEGX_OPC_LDNT1U, 0x2, 2, TREG_ZERO, 1, | ||
425 | { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 0, } }, | ||
426 | }, | ||
427 | { "ldnt1u_add", TILEGX_OPC_LDNT1U_ADD, 0x2, 3, TREG_ZERO, 1, | ||
428 | { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } }, | ||
429 | }, | ||
430 | { "ldnt2s", TILEGX_OPC_LDNT2S, 0x2, 2, TREG_ZERO, 1, | ||
431 | { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 0, } }, | ||
432 | }, | ||
433 | { "ldnt2s_add", TILEGX_OPC_LDNT2S_ADD, 0x2, 3, TREG_ZERO, 1, | ||
434 | { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } }, | ||
435 | }, | ||
436 | { "ldnt2u", TILEGX_OPC_LDNT2U, 0x2, 2, TREG_ZERO, 1, | ||
437 | { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 0, } }, | ||
438 | }, | ||
439 | { "ldnt2u_add", TILEGX_OPC_LDNT2U_ADD, 0x2, 3, TREG_ZERO, 1, | ||
440 | { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } }, | ||
441 | }, | ||
442 | { "ldnt4s", TILEGX_OPC_LDNT4S, 0x2, 2, TREG_ZERO, 1, | ||
443 | { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 0, } }, | ||
444 | }, | ||
445 | { "ldnt4s_add", TILEGX_OPC_LDNT4S_ADD, 0x2, 3, TREG_ZERO, 1, | ||
446 | { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } }, | ||
447 | }, | ||
448 | { "ldnt4u", TILEGX_OPC_LDNT4U, 0x2, 2, TREG_ZERO, 1, | ||
449 | { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 0, } }, | ||
450 | }, | ||
451 | { "ldnt4u_add", TILEGX_OPC_LDNT4U_ADD, 0x2, 3, TREG_ZERO, 1, | ||
452 | { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } }, | ||
453 | }, | ||
454 | { "ldnt_add", TILEGX_OPC_LDNT_ADD, 0x2, 3, TREG_ZERO, 1, | ||
455 | { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } }, | ||
456 | }, | ||
457 | { "lnk", TILEGX_OPC_LNK, 0xa, 1, TREG_ZERO, 1, | ||
458 | { { 0, }, { 8 }, { 0, }, { 12 }, { 0, } }, | ||
459 | }, | ||
460 | { "mf", TILEGX_OPC_MF, 0x2, 0, TREG_ZERO, 1, | ||
461 | { { 0, }, { }, { 0, }, { 0, }, { 0, } }, | ||
462 | }, | ||
463 | { "mfspr", TILEGX_OPC_MFSPR, 0x2, 2, TREG_ZERO, 1, | ||
464 | { { 0, }, { 8, 27 }, { 0, }, { 0, }, { 0, } }, | ||
465 | }, | ||
466 | { "mm", TILEGX_OPC_MM, 0x1, 4, TREG_ZERO, 1, | ||
467 | { { 23, 7, 21, 22 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
468 | }, | ||
469 | { "mnz", TILEGX_OPC_MNZ, 0xf, 3, TREG_ZERO, 1, | ||
470 | { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, | ||
471 | }, | ||
472 | { "mtspr", TILEGX_OPC_MTSPR, 0x2, 2, TREG_ZERO, 1, | ||
473 | { { 0, }, { 28, 9 }, { 0, }, { 0, }, { 0, } }, | ||
474 | }, | ||
475 | { "mul_hs_hs", TILEGX_OPC_MUL_HS_HS, 0x5, 3, TREG_ZERO, 1, | ||
476 | { { 6, 7, 16 }, { 0, }, { 10, 11, 18 }, { 0, }, { 0, } }, | ||
477 | }, | ||
478 | { "mul_hs_hu", TILEGX_OPC_MUL_HS_HU, 0x1, 3, TREG_ZERO, 1, | ||
479 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
480 | }, | ||
481 | { "mul_hs_ls", TILEGX_OPC_MUL_HS_LS, 0x1, 3, TREG_ZERO, 1, | ||
482 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
483 | }, | ||
484 | { "mul_hs_lu", TILEGX_OPC_MUL_HS_LU, 0x1, 3, TREG_ZERO, 1, | ||
485 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
486 | }, | ||
487 | { "mul_hu_hu", TILEGX_OPC_MUL_HU_HU, 0x5, 3, TREG_ZERO, 1, | ||
488 | { { 6, 7, 16 }, { 0, }, { 10, 11, 18 }, { 0, }, { 0, } }, | ||
489 | }, | ||
490 | { "mul_hu_ls", TILEGX_OPC_MUL_HU_LS, 0x1, 3, TREG_ZERO, 1, | ||
491 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
492 | }, | ||
493 | { "mul_hu_lu", TILEGX_OPC_MUL_HU_LU, 0x1, 3, TREG_ZERO, 1, | ||
494 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
495 | }, | ||
496 | { "mul_ls_ls", TILEGX_OPC_MUL_LS_LS, 0x5, 3, TREG_ZERO, 1, | ||
497 | { { 6, 7, 16 }, { 0, }, { 10, 11, 18 }, { 0, }, { 0, } }, | ||
498 | }, | ||
499 | { "mul_ls_lu", TILEGX_OPC_MUL_LS_LU, 0x1, 3, TREG_ZERO, 1, | ||
500 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
501 | }, | ||
502 | { "mul_lu_lu", TILEGX_OPC_MUL_LU_LU, 0x5, 3, TREG_ZERO, 1, | ||
503 | { { 6, 7, 16 }, { 0, }, { 10, 11, 18 }, { 0, }, { 0, } }, | ||
504 | }, | ||
505 | { "mula_hs_hs", TILEGX_OPC_MULA_HS_HS, 0x5, 3, TREG_ZERO, 1, | ||
506 | { { 23, 7, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } }, | ||
507 | }, | ||
508 | { "mula_hs_hu", TILEGX_OPC_MULA_HS_HU, 0x1, 3, TREG_ZERO, 1, | ||
509 | { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
510 | }, | ||
511 | { "mula_hs_ls", TILEGX_OPC_MULA_HS_LS, 0x1, 3, TREG_ZERO, 1, | ||
512 | { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
513 | }, | ||
514 | { "mula_hs_lu", TILEGX_OPC_MULA_HS_LU, 0x1, 3, TREG_ZERO, 1, | ||
515 | { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
516 | }, | ||
517 | { "mula_hu_hu", TILEGX_OPC_MULA_HU_HU, 0x5, 3, TREG_ZERO, 1, | ||
518 | { { 23, 7, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } }, | ||
519 | }, | ||
520 | { "mula_hu_ls", TILEGX_OPC_MULA_HU_LS, 0x1, 3, TREG_ZERO, 1, | ||
521 | { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
522 | }, | ||
523 | { "mula_hu_lu", TILEGX_OPC_MULA_HU_LU, 0x1, 3, TREG_ZERO, 1, | ||
524 | { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
525 | }, | ||
526 | { "mula_ls_ls", TILEGX_OPC_MULA_LS_LS, 0x5, 3, TREG_ZERO, 1, | ||
527 | { { 23, 7, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } }, | ||
528 | }, | ||
529 | { "mula_ls_lu", TILEGX_OPC_MULA_LS_LU, 0x1, 3, TREG_ZERO, 1, | ||
530 | { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
531 | }, | ||
532 | { "mula_lu_lu", TILEGX_OPC_MULA_LU_LU, 0x5, 3, TREG_ZERO, 1, | ||
533 | { { 23, 7, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } }, | ||
534 | }, | ||
535 | { "mulax", TILEGX_OPC_MULAX, 0x5, 3, TREG_ZERO, 1, | ||
536 | { { 23, 7, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } }, | ||
537 | }, | ||
538 | { "mulx", TILEGX_OPC_MULX, 0x5, 3, TREG_ZERO, 1, | ||
539 | { { 6, 7, 16 }, { 0, }, { 10, 11, 18 }, { 0, }, { 0, } }, | ||
540 | }, | ||
541 | { "mz", TILEGX_OPC_MZ, 0xf, 3, TREG_ZERO, 1, | ||
542 | { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, | ||
543 | }, | ||
544 | { "nap", TILEGX_OPC_NAP, 0x2, 0, TREG_ZERO, 0, | ||
545 | { { 0, }, { }, { 0, }, { 0, }, { 0, } }, | ||
546 | }, | ||
547 | { "nop", TILEGX_OPC_NOP, 0xf, 0, TREG_ZERO, 1, | ||
548 | { { }, { }, { }, { }, { 0, } }, | ||
549 | }, | ||
550 | { "nor", TILEGX_OPC_NOR, 0xf, 3, TREG_ZERO, 1, | ||
551 | { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, | ||
552 | }, | ||
553 | { "or", TILEGX_OPC_OR, 0xf, 3, TREG_ZERO, 1, | ||
554 | { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, | ||
555 | }, | ||
556 | { "ori", TILEGX_OPC_ORI, 0x3, 3, TREG_ZERO, 1, | ||
557 | { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } }, | ||
558 | }, | ||
559 | { "pcnt", TILEGX_OPC_PCNT, 0x5, 2, TREG_ZERO, 1, | ||
560 | { { 6, 7 }, { 0, }, { 10, 11 }, { 0, }, { 0, } }, | ||
561 | }, | ||
562 | { "revbits", TILEGX_OPC_REVBITS, 0x5, 2, TREG_ZERO, 1, | ||
563 | { { 6, 7 }, { 0, }, { 10, 11 }, { 0, }, { 0, } }, | ||
564 | }, | ||
565 | { "revbytes", TILEGX_OPC_REVBYTES, 0x5, 2, TREG_ZERO, 1, | ||
566 | { { 6, 7 }, { 0, }, { 10, 11 }, { 0, }, { 0, } }, | ||
567 | }, | ||
568 | { "rotl", TILEGX_OPC_ROTL, 0xf, 3, TREG_ZERO, 1, | ||
569 | { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, | ||
570 | }, | ||
571 | { "rotli", TILEGX_OPC_ROTLI, 0xf, 3, TREG_ZERO, 1, | ||
572 | { { 6, 7, 29 }, { 8, 9, 30 }, { 10, 11, 31 }, { 12, 13, 32 }, { 0, } }, | ||
573 | }, | ||
574 | { "shl", TILEGX_OPC_SHL, 0xf, 3, TREG_ZERO, 1, | ||
575 | { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, | ||
576 | }, | ||
577 | { "shl16insli", TILEGX_OPC_SHL16INSLI, 0x3, 3, TREG_ZERO, 1, | ||
578 | { { 6, 7, 4 }, { 8, 9, 5 }, { 0, }, { 0, }, { 0, } }, | ||
579 | }, | ||
580 | { "shl1add", TILEGX_OPC_SHL1ADD, 0xf, 3, TREG_ZERO, 1, | ||
581 | { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, | ||
582 | }, | ||
583 | { "shl1addx", TILEGX_OPC_SHL1ADDX, 0xf, 3, TREG_ZERO, 1, | ||
584 | { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, | ||
585 | }, | ||
586 | { "shl2add", TILEGX_OPC_SHL2ADD, 0xf, 3, TREG_ZERO, 1, | ||
587 | { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, | ||
588 | }, | ||
589 | { "shl2addx", TILEGX_OPC_SHL2ADDX, 0xf, 3, TREG_ZERO, 1, | ||
590 | { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, | ||
591 | }, | ||
592 | { "shl3add", TILEGX_OPC_SHL3ADD, 0xf, 3, TREG_ZERO, 1, | ||
593 | { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, | ||
594 | }, | ||
595 | { "shl3addx", TILEGX_OPC_SHL3ADDX, 0xf, 3, TREG_ZERO, 1, | ||
596 | { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, | ||
597 | }, | ||
598 | { "shli", TILEGX_OPC_SHLI, 0xf, 3, TREG_ZERO, 1, | ||
599 | { { 6, 7, 29 }, { 8, 9, 30 }, { 10, 11, 31 }, { 12, 13, 32 }, { 0, } }, | ||
600 | }, | ||
601 | { "shlx", TILEGX_OPC_SHLX, 0x3, 3, TREG_ZERO, 1, | ||
602 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
603 | }, | ||
604 | { "shlxi", TILEGX_OPC_SHLXI, 0x3, 3, TREG_ZERO, 1, | ||
605 | { { 6, 7, 29 }, { 8, 9, 30 }, { 0, }, { 0, }, { 0, } }, | ||
606 | }, | ||
607 | { "shrs", TILEGX_OPC_SHRS, 0xf, 3, TREG_ZERO, 1, | ||
608 | { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, | ||
609 | }, | ||
610 | { "shrsi", TILEGX_OPC_SHRSI, 0xf, 3, TREG_ZERO, 1, | ||
611 | { { 6, 7, 29 }, { 8, 9, 30 }, { 10, 11, 31 }, { 12, 13, 32 }, { 0, } }, | ||
612 | }, | ||
613 | { "shru", TILEGX_OPC_SHRU, 0xf, 3, TREG_ZERO, 1, | ||
614 | { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, | ||
615 | }, | ||
616 | { "shrui", TILEGX_OPC_SHRUI, 0xf, 3, TREG_ZERO, 1, | ||
617 | { { 6, 7, 29 }, { 8, 9, 30 }, { 10, 11, 31 }, { 12, 13, 32 }, { 0, } }, | ||
618 | }, | ||
619 | { "shrux", TILEGX_OPC_SHRUX, 0x3, 3, TREG_ZERO, 1, | ||
620 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
621 | }, | ||
622 | { "shruxi", TILEGX_OPC_SHRUXI, 0x3, 3, TREG_ZERO, 1, | ||
623 | { { 6, 7, 29 }, { 8, 9, 30 }, { 0, }, { 0, }, { 0, } }, | ||
624 | }, | ||
625 | { "shufflebytes", TILEGX_OPC_SHUFFLEBYTES, 0x1, 3, TREG_ZERO, 1, | ||
626 | { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
627 | }, | ||
628 | { "st", TILEGX_OPC_ST, 0x12, 2, TREG_ZERO, 1, | ||
629 | { { 0, }, { 9, 17 }, { 0, }, { 0, }, { 14, 33 } }, | ||
630 | }, | ||
631 | { "st1", TILEGX_OPC_ST1, 0x12, 2, TREG_ZERO, 1, | ||
632 | { { 0, }, { 9, 17 }, { 0, }, { 0, }, { 14, 33 } }, | ||
633 | }, | ||
634 | { "st1_add", TILEGX_OPC_ST1_ADD, 0x2, 3, TREG_ZERO, 1, | ||
635 | { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } }, | ||
636 | }, | ||
637 | { "st2", TILEGX_OPC_ST2, 0x12, 2, TREG_ZERO, 1, | ||
638 | { { 0, }, { 9, 17 }, { 0, }, { 0, }, { 14, 33 } }, | ||
639 | }, | ||
640 | { "st2_add", TILEGX_OPC_ST2_ADD, 0x2, 3, TREG_ZERO, 1, | ||
641 | { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } }, | ||
642 | }, | ||
643 | { "st4", TILEGX_OPC_ST4, 0x12, 2, TREG_ZERO, 1, | ||
644 | { { 0, }, { 9, 17 }, { 0, }, { 0, }, { 14, 33 } }, | ||
645 | }, | ||
646 | { "st4_add", TILEGX_OPC_ST4_ADD, 0x2, 3, TREG_ZERO, 1, | ||
647 | { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } }, | ||
648 | }, | ||
649 | { "st_add", TILEGX_OPC_ST_ADD, 0x2, 3, TREG_ZERO, 1, | ||
650 | { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } }, | ||
651 | }, | ||
652 | { "stnt", TILEGX_OPC_STNT, 0x2, 2, TREG_ZERO, 1, | ||
653 | { { 0, }, { 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
654 | }, | ||
655 | { "stnt1", TILEGX_OPC_STNT1, 0x2, 2, TREG_ZERO, 1, | ||
656 | { { 0, }, { 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
657 | }, | ||
658 | { "stnt1_add", TILEGX_OPC_STNT1_ADD, 0x2, 3, TREG_ZERO, 1, | ||
659 | { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } }, | ||
660 | }, | ||
661 | { "stnt2", TILEGX_OPC_STNT2, 0x2, 2, TREG_ZERO, 1, | ||
662 | { { 0, }, { 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
663 | }, | ||
664 | { "stnt2_add", TILEGX_OPC_STNT2_ADD, 0x2, 3, TREG_ZERO, 1, | ||
665 | { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } }, | ||
666 | }, | ||
667 | { "stnt4", TILEGX_OPC_STNT4, 0x2, 2, TREG_ZERO, 1, | ||
668 | { { 0, }, { 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
669 | }, | ||
670 | { "stnt4_add", TILEGX_OPC_STNT4_ADD, 0x2, 3, TREG_ZERO, 1, | ||
671 | { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } }, | ||
672 | }, | ||
673 | { "stnt_add", TILEGX_OPC_STNT_ADD, 0x2, 3, TREG_ZERO, 1, | ||
674 | { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } }, | ||
675 | }, | ||
676 | { "sub", TILEGX_OPC_SUB, 0xf, 3, TREG_ZERO, 1, | ||
677 | { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, | ||
678 | }, | ||
679 | { "subx", TILEGX_OPC_SUBX, 0xf, 3, TREG_ZERO, 1, | ||
680 | { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, | ||
681 | }, | ||
682 | { "subxsc", TILEGX_OPC_SUBXSC, 0x3, 3, TREG_ZERO, 1, | ||
683 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
684 | }, | ||
685 | { "swint0", TILEGX_OPC_SWINT0, 0x2, 0, TREG_ZERO, 0, | ||
686 | { { 0, }, { }, { 0, }, { 0, }, { 0, } }, | ||
687 | }, | ||
688 | { "swint1", TILEGX_OPC_SWINT1, 0x2, 0, TREG_ZERO, 0, | ||
689 | { { 0, }, { }, { 0, }, { 0, }, { 0, } }, | ||
690 | }, | ||
691 | { "swint2", TILEGX_OPC_SWINT2, 0x2, 0, TREG_ZERO, 0, | ||
692 | { { 0, }, { }, { 0, }, { 0, }, { 0, } }, | ||
693 | }, | ||
694 | { "swint3", TILEGX_OPC_SWINT3, 0x2, 0, TREG_ZERO, 0, | ||
695 | { { 0, }, { }, { 0, }, { 0, }, { 0, } }, | ||
696 | }, | ||
697 | { "tblidxb0", TILEGX_OPC_TBLIDXB0, 0x5, 2, TREG_ZERO, 1, | ||
698 | { { 23, 7 }, { 0, }, { 24, 11 }, { 0, }, { 0, } }, | ||
699 | }, | ||
700 | { "tblidxb1", TILEGX_OPC_TBLIDXB1, 0x5, 2, TREG_ZERO, 1, | ||
701 | { { 23, 7 }, { 0, }, { 24, 11 }, { 0, }, { 0, } }, | ||
702 | }, | ||
703 | { "tblidxb2", TILEGX_OPC_TBLIDXB2, 0x5, 2, TREG_ZERO, 1, | ||
704 | { { 23, 7 }, { 0, }, { 24, 11 }, { 0, }, { 0, } }, | ||
705 | }, | ||
706 | { "tblidxb3", TILEGX_OPC_TBLIDXB3, 0x5, 2, TREG_ZERO, 1, | ||
707 | { { 23, 7 }, { 0, }, { 24, 11 }, { 0, }, { 0, } }, | ||
708 | }, | ||
709 | { "v1add", TILEGX_OPC_V1ADD, 0x3, 3, TREG_ZERO, 1, | ||
710 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
711 | }, | ||
712 | { "v1addi", TILEGX_OPC_V1ADDI, 0x3, 3, TREG_ZERO, 1, | ||
713 | { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } }, | ||
714 | }, | ||
715 | { "v1adduc", TILEGX_OPC_V1ADDUC, 0x3, 3, TREG_ZERO, 1, | ||
716 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
717 | }, | ||
718 | { "v1adiffu", TILEGX_OPC_V1ADIFFU, 0x1, 3, TREG_ZERO, 1, | ||
719 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
720 | }, | ||
721 | { "v1avgu", TILEGX_OPC_V1AVGU, 0x1, 3, TREG_ZERO, 1, | ||
722 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
723 | }, | ||
724 | { "v1cmpeq", TILEGX_OPC_V1CMPEQ, 0x3, 3, TREG_ZERO, 1, | ||
725 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
726 | }, | ||
727 | { "v1cmpeqi", TILEGX_OPC_V1CMPEQI, 0x3, 3, TREG_ZERO, 1, | ||
728 | { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } }, | ||
729 | }, | ||
730 | { "v1cmples", TILEGX_OPC_V1CMPLES, 0x3, 3, TREG_ZERO, 1, | ||
731 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
732 | }, | ||
733 | { "v1cmpleu", TILEGX_OPC_V1CMPLEU, 0x3, 3, TREG_ZERO, 1, | ||
734 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
735 | }, | ||
736 | { "v1cmplts", TILEGX_OPC_V1CMPLTS, 0x3, 3, TREG_ZERO, 1, | ||
737 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
738 | }, | ||
739 | { "v1cmpltsi", TILEGX_OPC_V1CMPLTSI, 0x3, 3, TREG_ZERO, 1, | ||
740 | { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } }, | ||
741 | }, | ||
742 | { "v1cmpltu", TILEGX_OPC_V1CMPLTU, 0x3, 3, TREG_ZERO, 1, | ||
743 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
744 | }, | ||
745 | { "v1cmpltui", TILEGX_OPC_V1CMPLTUI, 0x3, 3, TREG_ZERO, 1, | ||
746 | { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } }, | ||
747 | }, | ||
748 | { "v1cmpne", TILEGX_OPC_V1CMPNE, 0x3, 3, TREG_ZERO, 1, | ||
749 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
750 | }, | ||
751 | { "v1ddotpu", TILEGX_OPC_V1DDOTPU, 0x1, 3, TREG_ZERO, 1, | ||
752 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
753 | }, | ||
754 | { "v1ddotpua", TILEGX_OPC_V1DDOTPUA, 0x1, 3, TREG_ZERO, 1, | ||
755 | { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
756 | }, | ||
757 | { "v1ddotpus", TILEGX_OPC_V1DDOTPUS, 0x1, 3, TREG_ZERO, 1, | ||
758 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
759 | }, | ||
760 | { "v1ddotpusa", TILEGX_OPC_V1DDOTPUSA, 0x1, 3, TREG_ZERO, 1, | ||
761 | { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
762 | }, | ||
763 | { "v1dotp", TILEGX_OPC_V1DOTP, 0x1, 3, TREG_ZERO, 1, | ||
764 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
765 | }, | ||
766 | { "v1dotpa", TILEGX_OPC_V1DOTPA, 0x1, 3, TREG_ZERO, 1, | ||
767 | { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
768 | }, | ||
769 | { "v1dotpu", TILEGX_OPC_V1DOTPU, 0x1, 3, TREG_ZERO, 1, | ||
770 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
771 | }, | ||
772 | { "v1dotpua", TILEGX_OPC_V1DOTPUA, 0x1, 3, TREG_ZERO, 1, | ||
773 | { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
774 | }, | ||
775 | { "v1dotpus", TILEGX_OPC_V1DOTPUS, 0x1, 3, TREG_ZERO, 1, | ||
776 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
777 | }, | ||
778 | { "v1dotpusa", TILEGX_OPC_V1DOTPUSA, 0x1, 3, TREG_ZERO, 1, | ||
779 | { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
780 | }, | ||
781 | { "v1int_h", TILEGX_OPC_V1INT_H, 0x3, 3, TREG_ZERO, 1, | ||
782 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
783 | }, | ||
784 | { "v1int_l", TILEGX_OPC_V1INT_L, 0x3, 3, TREG_ZERO, 1, | ||
785 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
786 | }, | ||
787 | { "v1maxu", TILEGX_OPC_V1MAXU, 0x3, 3, TREG_ZERO, 1, | ||
788 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
789 | }, | ||
790 | { "v1maxui", TILEGX_OPC_V1MAXUI, 0x3, 3, TREG_ZERO, 1, | ||
791 | { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } }, | ||
792 | }, | ||
793 | { "v1minu", TILEGX_OPC_V1MINU, 0x3, 3, TREG_ZERO, 1, | ||
794 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
795 | }, | ||
796 | { "v1minui", TILEGX_OPC_V1MINUI, 0x3, 3, TREG_ZERO, 1, | ||
797 | { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } }, | ||
798 | }, | ||
799 | { "v1mnz", TILEGX_OPC_V1MNZ, 0x3, 3, TREG_ZERO, 1, | ||
800 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
801 | }, | ||
802 | { "v1multu", TILEGX_OPC_V1MULTU, 0x1, 3, TREG_ZERO, 1, | ||
803 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
804 | }, | ||
805 | { "v1mulu", TILEGX_OPC_V1MULU, 0x1, 3, TREG_ZERO, 1, | ||
806 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
807 | }, | ||
808 | { "v1mulus", TILEGX_OPC_V1MULUS, 0x1, 3, TREG_ZERO, 1, | ||
809 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
810 | }, | ||
811 | { "v1mz", TILEGX_OPC_V1MZ, 0x3, 3, TREG_ZERO, 1, | ||
812 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
813 | }, | ||
814 | { "v1sadau", TILEGX_OPC_V1SADAU, 0x1, 3, TREG_ZERO, 1, | ||
815 | { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
816 | }, | ||
817 | { "v1sadu", TILEGX_OPC_V1SADU, 0x1, 3, TREG_ZERO, 1, | ||
818 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
819 | }, | ||
820 | { "v1shl", TILEGX_OPC_V1SHL, 0x3, 3, TREG_ZERO, 1, | ||
821 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
822 | }, | ||
823 | { "v1shli", TILEGX_OPC_V1SHLI, 0x3, 3, TREG_ZERO, 1, | ||
824 | { { 6, 7, 29 }, { 8, 9, 30 }, { 0, }, { 0, }, { 0, } }, | ||
825 | }, | ||
826 | { "v1shrs", TILEGX_OPC_V1SHRS, 0x3, 3, TREG_ZERO, 1, | ||
827 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
828 | }, | ||
829 | { "v1shrsi", TILEGX_OPC_V1SHRSI, 0x3, 3, TREG_ZERO, 1, | ||
830 | { { 6, 7, 29 }, { 8, 9, 30 }, { 0, }, { 0, }, { 0, } }, | ||
831 | }, | ||
832 | { "v1shru", TILEGX_OPC_V1SHRU, 0x3, 3, TREG_ZERO, 1, | ||
833 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
834 | }, | ||
835 | { "v1shrui", TILEGX_OPC_V1SHRUI, 0x3, 3, TREG_ZERO, 1, | ||
836 | { { 6, 7, 29 }, { 8, 9, 30 }, { 0, }, { 0, }, { 0, } }, | ||
837 | }, | ||
838 | { "v1sub", TILEGX_OPC_V1SUB, 0x3, 3, TREG_ZERO, 1, | ||
839 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
840 | }, | ||
841 | { "v1subuc", TILEGX_OPC_V1SUBUC, 0x3, 3, TREG_ZERO, 1, | ||
842 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
843 | }, | ||
844 | { "v2add", TILEGX_OPC_V2ADD, 0x3, 3, TREG_ZERO, 1, | ||
845 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
846 | }, | ||
847 | { "v2addi", TILEGX_OPC_V2ADDI, 0x3, 3, TREG_ZERO, 1, | ||
848 | { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } }, | ||
849 | }, | ||
850 | { "v2addsc", TILEGX_OPC_V2ADDSC, 0x3, 3, TREG_ZERO, 1, | ||
851 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
852 | }, | ||
853 | { "v2adiffs", TILEGX_OPC_V2ADIFFS, 0x1, 3, TREG_ZERO, 1, | ||
854 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
855 | }, | ||
856 | { "v2avgs", TILEGX_OPC_V2AVGS, 0x1, 3, TREG_ZERO, 1, | ||
857 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
858 | }, | ||
859 | { "v2cmpeq", TILEGX_OPC_V2CMPEQ, 0x3, 3, TREG_ZERO, 1, | ||
860 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
861 | }, | ||
862 | { "v2cmpeqi", TILEGX_OPC_V2CMPEQI, 0x3, 3, TREG_ZERO, 1, | ||
863 | { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } }, | ||
864 | }, | ||
865 | { "v2cmples", TILEGX_OPC_V2CMPLES, 0x3, 3, TREG_ZERO, 1, | ||
866 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
867 | }, | ||
868 | { "v2cmpleu", TILEGX_OPC_V2CMPLEU, 0x3, 3, TREG_ZERO, 1, | ||
869 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
870 | }, | ||
871 | { "v2cmplts", TILEGX_OPC_V2CMPLTS, 0x3, 3, TREG_ZERO, 1, | ||
872 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
873 | }, | ||
874 | { "v2cmpltsi", TILEGX_OPC_V2CMPLTSI, 0x3, 3, TREG_ZERO, 1, | ||
875 | { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } }, | ||
876 | }, | ||
877 | { "v2cmpltu", TILEGX_OPC_V2CMPLTU, 0x3, 3, TREG_ZERO, 1, | ||
878 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
879 | }, | ||
880 | { "v2cmpltui", TILEGX_OPC_V2CMPLTUI, 0x3, 3, TREG_ZERO, 1, | ||
881 | { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } }, | ||
882 | }, | ||
883 | { "v2cmpne", TILEGX_OPC_V2CMPNE, 0x3, 3, TREG_ZERO, 1, | ||
884 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
885 | }, | ||
886 | { "v2dotp", TILEGX_OPC_V2DOTP, 0x1, 3, TREG_ZERO, 1, | ||
887 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
888 | }, | ||
889 | { "v2dotpa", TILEGX_OPC_V2DOTPA, 0x1, 3, TREG_ZERO, 1, | ||
890 | { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
891 | }, | ||
892 | { "v2int_h", TILEGX_OPC_V2INT_H, 0x3, 3, TREG_ZERO, 1, | ||
893 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
894 | }, | ||
895 | { "v2int_l", TILEGX_OPC_V2INT_L, 0x3, 3, TREG_ZERO, 1, | ||
896 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
897 | }, | ||
898 | { "v2maxs", TILEGX_OPC_V2MAXS, 0x3, 3, TREG_ZERO, 1, | ||
899 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
900 | }, | ||
901 | { "v2maxsi", TILEGX_OPC_V2MAXSI, 0x3, 3, TREG_ZERO, 1, | ||
902 | { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } }, | ||
903 | }, | ||
904 | { "v2mins", TILEGX_OPC_V2MINS, 0x3, 3, TREG_ZERO, 1, | ||
905 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
906 | }, | ||
907 | { "v2minsi", TILEGX_OPC_V2MINSI, 0x3, 3, TREG_ZERO, 1, | ||
908 | { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } }, | ||
909 | }, | ||
910 | { "v2mnz", TILEGX_OPC_V2MNZ, 0x3, 3, TREG_ZERO, 1, | ||
911 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
912 | }, | ||
913 | { "v2mulfsc", TILEGX_OPC_V2MULFSC, 0x1, 3, TREG_ZERO, 1, | ||
914 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
915 | }, | ||
916 | { "v2muls", TILEGX_OPC_V2MULS, 0x1, 3, TREG_ZERO, 1, | ||
917 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
918 | }, | ||
919 | { "v2mults", TILEGX_OPC_V2MULTS, 0x1, 3, TREG_ZERO, 1, | ||
920 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
921 | }, | ||
922 | { "v2mz", TILEGX_OPC_V2MZ, 0x3, 3, TREG_ZERO, 1, | ||
923 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
924 | }, | ||
925 | { "v2packh", TILEGX_OPC_V2PACKH, 0x3, 3, TREG_ZERO, 1, | ||
926 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
927 | }, | ||
928 | { "v2packl", TILEGX_OPC_V2PACKL, 0x3, 3, TREG_ZERO, 1, | ||
929 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
930 | }, | ||
931 | { "v2packuc", TILEGX_OPC_V2PACKUC, 0x3, 3, TREG_ZERO, 1, | ||
932 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
933 | }, | ||
934 | { "v2sadas", TILEGX_OPC_V2SADAS, 0x1, 3, TREG_ZERO, 1, | ||
935 | { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
936 | }, | ||
937 | { "v2sadau", TILEGX_OPC_V2SADAU, 0x1, 3, TREG_ZERO, 1, | ||
938 | { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
939 | }, | ||
940 | { "v2sads", TILEGX_OPC_V2SADS, 0x1, 3, TREG_ZERO, 1, | ||
941 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
942 | }, | ||
943 | { "v2sadu", TILEGX_OPC_V2SADU, 0x1, 3, TREG_ZERO, 1, | ||
944 | { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | ||
945 | }, | ||
946 | { "v2shl", TILEGX_OPC_V2SHL, 0x3, 3, TREG_ZERO, 1, | ||
947 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
948 | }, | ||
949 | { "v2shli", TILEGX_OPC_V2SHLI, 0x3, 3, TREG_ZERO, 1, | ||
950 | { { 6, 7, 29 }, { 8, 9, 30 }, { 0, }, { 0, }, { 0, } }, | ||
951 | }, | ||
952 | { "v2shlsc", TILEGX_OPC_V2SHLSC, 0x3, 3, TREG_ZERO, 1, | ||
953 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
954 | }, | ||
955 | { "v2shrs", TILEGX_OPC_V2SHRS, 0x3, 3, TREG_ZERO, 1, | ||
956 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
957 | }, | ||
958 | { "v2shrsi", TILEGX_OPC_V2SHRSI, 0x3, 3, TREG_ZERO, 1, | ||
959 | { { 6, 7, 29 }, { 8, 9, 30 }, { 0, }, { 0, }, { 0, } }, | ||
960 | }, | ||
961 | { "v2shru", TILEGX_OPC_V2SHRU, 0x3, 3, TREG_ZERO, 1, | ||
962 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
963 | }, | ||
964 | { "v2shrui", TILEGX_OPC_V2SHRUI, 0x3, 3, TREG_ZERO, 1, | ||
965 | { { 6, 7, 29 }, { 8, 9, 30 }, { 0, }, { 0, }, { 0, } }, | ||
966 | }, | ||
967 | { "v2sub", TILEGX_OPC_V2SUB, 0x3, 3, TREG_ZERO, 1, | ||
968 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
969 | }, | ||
970 | { "v2subsc", TILEGX_OPC_V2SUBSC, 0x3, 3, TREG_ZERO, 1, | ||
971 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
972 | }, | ||
973 | { "v4add", TILEGX_OPC_V4ADD, 0x3, 3, TREG_ZERO, 1, | ||
974 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
975 | }, | ||
976 | { "v4addsc", TILEGX_OPC_V4ADDSC, 0x3, 3, TREG_ZERO, 1, | ||
977 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
978 | }, | ||
979 | { "v4int_h", TILEGX_OPC_V4INT_H, 0x3, 3, TREG_ZERO, 1, | ||
980 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
981 | }, | ||
982 | { "v4int_l", TILEGX_OPC_V4INT_L, 0x3, 3, TREG_ZERO, 1, | ||
983 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
984 | }, | ||
985 | { "v4packsc", TILEGX_OPC_V4PACKSC, 0x3, 3, TREG_ZERO, 1, | ||
986 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
987 | }, | ||
988 | { "v4shl", TILEGX_OPC_V4SHL, 0x3, 3, TREG_ZERO, 1, | ||
989 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
990 | }, | ||
991 | { "v4shlsc", TILEGX_OPC_V4SHLSC, 0x3, 3, TREG_ZERO, 1, | ||
992 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
993 | }, | ||
994 | { "v4shrs", TILEGX_OPC_V4SHRS, 0x3, 3, TREG_ZERO, 1, | ||
995 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
996 | }, | ||
997 | { "v4shru", TILEGX_OPC_V4SHRU, 0x3, 3, TREG_ZERO, 1, | ||
998 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
999 | }, | ||
1000 | { "v4sub", TILEGX_OPC_V4SUB, 0x3, 3, TREG_ZERO, 1, | ||
1001 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
1002 | }, | ||
1003 | { "v4subsc", TILEGX_OPC_V4SUBSC, 0x3, 3, TREG_ZERO, 1, | ||
1004 | { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } }, | ||
1005 | }, | ||
1006 | { "wh64", TILEGX_OPC_WH64, 0x2, 1, TREG_ZERO, 1, | ||
1007 | { { 0, }, { 9 }, { 0, }, { 0, }, { 0, } }, | ||
1008 | }, | ||
1009 | { "xor", TILEGX_OPC_XOR, 0xf, 3, TREG_ZERO, 1, | ||
1010 | { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } }, | ||
1011 | }, | ||
1012 | { "xori", TILEGX_OPC_XORI, 0x3, 3, TREG_ZERO, 1, | ||
1013 | { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } }, | ||
1014 | }, | ||
1015 | { NULL, TILEGX_OPC_NONE, 0, 0, TREG_ZERO, 0, { { 0, } }, | ||
1016 | } | ||
1017 | }; | ||
1018 | #define BITFIELD(start, size) ((start) | (((1 << (size)) - 1) << 6)) | ||
1019 | #define CHILD(array_index) (TILEGX_OPC_NONE + (array_index)) | ||
1020 | |||
1021 | static const unsigned short decode_X0_fsm[936] = | ||
1022 | { | ||
1023 | BITFIELD(22, 9) /* index 0 */, | ||
1024 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1025 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1026 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1027 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1028 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1029 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1030 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1031 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1032 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1033 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1034 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1035 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1036 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1037 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1038 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1039 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1040 | CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), | ||
1041 | CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), | ||
1042 | CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), | ||
1043 | CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), | ||
1044 | CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), | ||
1045 | CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), | ||
1046 | CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), | ||
1047 | CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), | ||
1048 | CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), | ||
1049 | CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), | ||
1050 | CHILD(513), CHILD(513), CHILD(513), CHILD(513), TILEGX_OPC_ADDXLI, | ||
1051 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, | ||
1052 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, | ||
1053 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, | ||
1054 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, | ||
1055 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, | ||
1056 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, | ||
1057 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, | ||
1058 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, | ||
1059 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, | ||
1060 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, | ||
1061 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, | ||
1062 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, | ||
1063 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, | ||
1064 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, | ||
1065 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, | ||
1066 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_NONE, | ||
1067 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1068 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1069 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1070 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_BFEXTS, | ||
1071 | TILEGX_OPC_BFEXTS, TILEGX_OPC_BFEXTS, TILEGX_OPC_BFEXTS, TILEGX_OPC_BFEXTU, | ||
1072 | TILEGX_OPC_BFEXTU, TILEGX_OPC_BFEXTU, TILEGX_OPC_BFEXTU, TILEGX_OPC_BFINS, | ||
1073 | TILEGX_OPC_BFINS, TILEGX_OPC_BFINS, TILEGX_OPC_BFINS, TILEGX_OPC_MM, | ||
1074 | TILEGX_OPC_MM, TILEGX_OPC_MM, TILEGX_OPC_MM, TILEGX_OPC_NONE, | ||
1075 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1076 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1077 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1078 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1079 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1080 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1081 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1082 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, CHILD(528), CHILD(578), | ||
1083 | CHILD(583), CHILD(588), CHILD(593), CHILD(598), TILEGX_OPC_NONE, | ||
1084 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1085 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1086 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1087 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1088 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1089 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1090 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1091 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1092 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1093 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1094 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1095 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1096 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1097 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1098 | TILEGX_OPC_NONE, CHILD(603), CHILD(620), CHILD(637), CHILD(654), CHILD(671), | ||
1099 | CHILD(703), CHILD(797), CHILD(814), CHILD(831), CHILD(848), CHILD(865), | ||
1100 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1101 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1102 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1103 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1104 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1105 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1106 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1107 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1108 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1109 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1110 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1111 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1112 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1113 | TILEGX_OPC_NONE, CHILD(889), TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1114 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1115 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1116 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1117 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1118 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1119 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1120 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1121 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1122 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1123 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1124 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1125 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1126 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1127 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1128 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1129 | TILEGX_OPC_NONE, CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), | ||
1130 | CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), | ||
1131 | CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), | ||
1132 | CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), | ||
1133 | CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), | ||
1134 | CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), | ||
1135 | CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), | ||
1136 | CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), | ||
1137 | CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), | ||
1138 | CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), | ||
1139 | CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), | ||
1140 | BITFIELD(6, 2) /* index 513 */, | ||
1141 | TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, CHILD(518), | ||
1142 | BITFIELD(8, 2) /* index 518 */, | ||
1143 | TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, CHILD(523), | ||
1144 | BITFIELD(10, 2) /* index 523 */, | ||
1145 | TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_MOVELI, | ||
1146 | BITFIELD(20, 2) /* index 528 */, | ||
1147 | TILEGX_OPC_NONE, CHILD(533), TILEGX_OPC_ADDXI, CHILD(548), | ||
1148 | BITFIELD(6, 2) /* index 533 */, | ||
1149 | TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(538), | ||
1150 | BITFIELD(8, 2) /* index 538 */, | ||
1151 | TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(543), | ||
1152 | BITFIELD(10, 2) /* index 543 */, | ||
1153 | TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_MOVEI, | ||
1154 | BITFIELD(0, 2) /* index 548 */, | ||
1155 | TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(553), | ||
1156 | BITFIELD(2, 2) /* index 553 */, | ||
1157 | TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(558), | ||
1158 | BITFIELD(4, 2) /* index 558 */, | ||
1159 | TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(563), | ||
1160 | BITFIELD(6, 2) /* index 563 */, | ||
1161 | TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(568), | ||
1162 | BITFIELD(8, 2) /* index 568 */, | ||
1163 | TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(573), | ||
1164 | BITFIELD(10, 2) /* index 573 */, | ||
1165 | TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_INFO, | ||
1166 | BITFIELD(20, 2) /* index 578 */, | ||
1167 | TILEGX_OPC_CMPEQI, TILEGX_OPC_CMPLTSI, TILEGX_OPC_CMPLTUI, TILEGX_OPC_ORI, | ||
1168 | BITFIELD(20, 2) /* index 583 */, | ||
1169 | TILEGX_OPC_V1ADDI, TILEGX_OPC_V1CMPEQI, TILEGX_OPC_V1CMPLTSI, | ||
1170 | TILEGX_OPC_V1CMPLTUI, | ||
1171 | BITFIELD(20, 2) /* index 588 */, | ||
1172 | TILEGX_OPC_V1MAXUI, TILEGX_OPC_V1MINUI, TILEGX_OPC_V2ADDI, | ||
1173 | TILEGX_OPC_V2CMPEQI, | ||
1174 | BITFIELD(20, 2) /* index 593 */, | ||
1175 | TILEGX_OPC_V2CMPLTSI, TILEGX_OPC_V2CMPLTUI, TILEGX_OPC_V2MAXSI, | ||
1176 | TILEGX_OPC_V2MINSI, | ||
1177 | BITFIELD(20, 2) /* index 598 */, | ||
1178 | TILEGX_OPC_XORI, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1179 | BITFIELD(18, 4) /* index 603 */, | ||
1180 | TILEGX_OPC_NONE, TILEGX_OPC_ADDXSC, TILEGX_OPC_ADDX, TILEGX_OPC_ADD, | ||
1181 | TILEGX_OPC_AND, TILEGX_OPC_CMOVEQZ, TILEGX_OPC_CMOVNEZ, TILEGX_OPC_CMPEQ, | ||
1182 | TILEGX_OPC_CMPLES, TILEGX_OPC_CMPLEU, TILEGX_OPC_CMPLTS, TILEGX_OPC_CMPLTU, | ||
1183 | TILEGX_OPC_CMPNE, TILEGX_OPC_CMULAF, TILEGX_OPC_CMULA, TILEGX_OPC_CMULFR, | ||
1184 | BITFIELD(18, 4) /* index 620 */, | ||
1185 | TILEGX_OPC_CMULF, TILEGX_OPC_CMULHR, TILEGX_OPC_CMULH, TILEGX_OPC_CMUL, | ||
1186 | TILEGX_OPC_CRC32_32, TILEGX_OPC_CRC32_8, TILEGX_OPC_DBLALIGN2, | ||
1187 | TILEGX_OPC_DBLALIGN4, TILEGX_OPC_DBLALIGN6, TILEGX_OPC_DBLALIGN, | ||
1188 | TILEGX_OPC_FDOUBLE_ADDSUB, TILEGX_OPC_FDOUBLE_ADD_FLAGS, | ||
1189 | TILEGX_OPC_FDOUBLE_MUL_FLAGS, TILEGX_OPC_FDOUBLE_PACK1, | ||
1190 | TILEGX_OPC_FDOUBLE_PACK2, TILEGX_OPC_FDOUBLE_SUB_FLAGS, | ||
1191 | BITFIELD(18, 4) /* index 637 */, | ||
1192 | TILEGX_OPC_FDOUBLE_UNPACK_MAX, TILEGX_OPC_FDOUBLE_UNPACK_MIN, | ||
1193 | TILEGX_OPC_FSINGLE_ADD1, TILEGX_OPC_FSINGLE_ADDSUB2, | ||
1194 | TILEGX_OPC_FSINGLE_MUL1, TILEGX_OPC_FSINGLE_MUL2, TILEGX_OPC_FSINGLE_PACK2, | ||
1195 | TILEGX_OPC_FSINGLE_SUB1, TILEGX_OPC_MNZ, TILEGX_OPC_MULAX, | ||
1196 | TILEGX_OPC_MULA_HS_HS, TILEGX_OPC_MULA_HS_HU, TILEGX_OPC_MULA_HS_LS, | ||
1197 | TILEGX_OPC_MULA_HS_LU, TILEGX_OPC_MULA_HU_HU, TILEGX_OPC_MULA_HU_LS, | ||
1198 | BITFIELD(18, 4) /* index 654 */, | ||
1199 | TILEGX_OPC_MULA_HU_LU, TILEGX_OPC_MULA_LS_LS, TILEGX_OPC_MULA_LS_LU, | ||
1200 | TILEGX_OPC_MULA_LU_LU, TILEGX_OPC_MULX, TILEGX_OPC_MUL_HS_HS, | ||
1201 | TILEGX_OPC_MUL_HS_HU, TILEGX_OPC_MUL_HS_LS, TILEGX_OPC_MUL_HS_LU, | ||
1202 | TILEGX_OPC_MUL_HU_HU, TILEGX_OPC_MUL_HU_LS, TILEGX_OPC_MUL_HU_LU, | ||
1203 | TILEGX_OPC_MUL_LS_LS, TILEGX_OPC_MUL_LS_LU, TILEGX_OPC_MUL_LU_LU, | ||
1204 | TILEGX_OPC_MZ, | ||
1205 | BITFIELD(18, 4) /* index 671 */, | ||
1206 | TILEGX_OPC_NOR, CHILD(688), TILEGX_OPC_ROTL, TILEGX_OPC_SHL1ADDX, | ||
1207 | TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL2ADDX, TILEGX_OPC_SHL2ADD, | ||
1208 | TILEGX_OPC_SHL3ADDX, TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHLX, TILEGX_OPC_SHL, | ||
1209 | TILEGX_OPC_SHRS, TILEGX_OPC_SHRUX, TILEGX_OPC_SHRU, TILEGX_OPC_SHUFFLEBYTES, | ||
1210 | TILEGX_OPC_SUBXSC, | ||
1211 | BITFIELD(12, 2) /* index 688 */, | ||
1212 | TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(693), | ||
1213 | BITFIELD(14, 2) /* index 693 */, | ||
1214 | TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(698), | ||
1215 | BITFIELD(16, 2) /* index 698 */, | ||
1216 | TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_MOVE, | ||
1217 | BITFIELD(18, 4) /* index 703 */, | ||
1218 | TILEGX_OPC_SUBX, TILEGX_OPC_SUB, CHILD(720), TILEGX_OPC_V1ADDUC, | ||
1219 | TILEGX_OPC_V1ADD, TILEGX_OPC_V1ADIFFU, TILEGX_OPC_V1AVGU, | ||
1220 | TILEGX_OPC_V1CMPEQ, TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLEU, | ||
1221 | TILEGX_OPC_V1CMPLTS, TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPNE, | ||
1222 | TILEGX_OPC_V1DDOTPUSA, TILEGX_OPC_V1DDOTPUS, TILEGX_OPC_V1DOTPA, | ||
1223 | BITFIELD(12, 4) /* index 720 */, | ||
1224 | TILEGX_OPC_NONE, CHILD(737), CHILD(742), CHILD(747), CHILD(752), CHILD(757), | ||
1225 | CHILD(762), CHILD(767), CHILD(772), CHILD(777), CHILD(782), CHILD(787), | ||
1226 | CHILD(792), TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1227 | BITFIELD(16, 2) /* index 737 */, | ||
1228 | TILEGX_OPC_CLZ, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1229 | BITFIELD(16, 2) /* index 742 */, | ||
1230 | TILEGX_OPC_CTZ, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1231 | BITFIELD(16, 2) /* index 747 */, | ||
1232 | TILEGX_OPC_FNOP, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1233 | BITFIELD(16, 2) /* index 752 */, | ||
1234 | TILEGX_OPC_FSINGLE_PACK1, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1235 | BITFIELD(16, 2) /* index 757 */, | ||
1236 | TILEGX_OPC_NOP, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1237 | BITFIELD(16, 2) /* index 762 */, | ||
1238 | TILEGX_OPC_PCNT, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1239 | BITFIELD(16, 2) /* index 767 */, | ||
1240 | TILEGX_OPC_REVBITS, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1241 | BITFIELD(16, 2) /* index 772 */, | ||
1242 | TILEGX_OPC_REVBYTES, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1243 | BITFIELD(16, 2) /* index 777 */, | ||
1244 | TILEGX_OPC_TBLIDXB0, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1245 | BITFIELD(16, 2) /* index 782 */, | ||
1246 | TILEGX_OPC_TBLIDXB1, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1247 | BITFIELD(16, 2) /* index 787 */, | ||
1248 | TILEGX_OPC_TBLIDXB2, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1249 | BITFIELD(16, 2) /* index 792 */, | ||
1250 | TILEGX_OPC_TBLIDXB3, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1251 | BITFIELD(18, 4) /* index 797 */, | ||
1252 | TILEGX_OPC_V1DOTPUSA, TILEGX_OPC_V1DOTPUS, TILEGX_OPC_V1DOTP, | ||
1253 | TILEGX_OPC_V1INT_H, TILEGX_OPC_V1INT_L, TILEGX_OPC_V1MAXU, | ||
1254 | TILEGX_OPC_V1MINU, TILEGX_OPC_V1MNZ, TILEGX_OPC_V1MULTU, TILEGX_OPC_V1MULUS, | ||
1255 | TILEGX_OPC_V1MULU, TILEGX_OPC_V1MZ, TILEGX_OPC_V1SADAU, TILEGX_OPC_V1SADU, | ||
1256 | TILEGX_OPC_V1SHL, TILEGX_OPC_V1SHRS, | ||
1257 | BITFIELD(18, 4) /* index 814 */, | ||
1258 | TILEGX_OPC_V1SHRU, TILEGX_OPC_V1SUBUC, TILEGX_OPC_V1SUB, TILEGX_OPC_V2ADDSC, | ||
1259 | TILEGX_OPC_V2ADD, TILEGX_OPC_V2ADIFFS, TILEGX_OPC_V2AVGS, | ||
1260 | TILEGX_OPC_V2CMPEQ, TILEGX_OPC_V2CMPLES, TILEGX_OPC_V2CMPLEU, | ||
1261 | TILEGX_OPC_V2CMPLTS, TILEGX_OPC_V2CMPLTU, TILEGX_OPC_V2CMPNE, | ||
1262 | TILEGX_OPC_V2DOTPA, TILEGX_OPC_V2DOTP, TILEGX_OPC_V2INT_H, | ||
1263 | BITFIELD(18, 4) /* index 831 */, | ||
1264 | TILEGX_OPC_V2INT_L, TILEGX_OPC_V2MAXS, TILEGX_OPC_V2MINS, TILEGX_OPC_V2MNZ, | ||
1265 | TILEGX_OPC_V2MULFSC, TILEGX_OPC_V2MULS, TILEGX_OPC_V2MULTS, TILEGX_OPC_V2MZ, | ||
1266 | TILEGX_OPC_V2PACKH, TILEGX_OPC_V2PACKL, TILEGX_OPC_V2PACKUC, | ||
1267 | TILEGX_OPC_V2SADAS, TILEGX_OPC_V2SADAU, TILEGX_OPC_V2SADS, | ||
1268 | TILEGX_OPC_V2SADU, TILEGX_OPC_V2SHLSC, | ||
1269 | BITFIELD(18, 4) /* index 848 */, | ||
1270 | TILEGX_OPC_V2SHL, TILEGX_OPC_V2SHRS, TILEGX_OPC_V2SHRU, TILEGX_OPC_V2SUBSC, | ||
1271 | TILEGX_OPC_V2SUB, TILEGX_OPC_V4ADDSC, TILEGX_OPC_V4ADD, TILEGX_OPC_V4INT_H, | ||
1272 | TILEGX_OPC_V4INT_L, TILEGX_OPC_V4PACKSC, TILEGX_OPC_V4SHLSC, | ||
1273 | TILEGX_OPC_V4SHL, TILEGX_OPC_V4SHRS, TILEGX_OPC_V4SHRU, TILEGX_OPC_V4SUBSC, | ||
1274 | TILEGX_OPC_V4SUB, | ||
1275 | BITFIELD(18, 3) /* index 865 */, | ||
1276 | CHILD(874), CHILD(877), CHILD(880), CHILD(883), CHILD(886), TILEGX_OPC_NONE, | ||
1277 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1278 | BITFIELD(21, 1) /* index 874 */, | ||
1279 | TILEGX_OPC_XOR, TILEGX_OPC_NONE, | ||
1280 | BITFIELD(21, 1) /* index 877 */, | ||
1281 | TILEGX_OPC_V1DDOTPUA, TILEGX_OPC_NONE, | ||
1282 | BITFIELD(21, 1) /* index 880 */, | ||
1283 | TILEGX_OPC_V1DDOTPU, TILEGX_OPC_NONE, | ||
1284 | BITFIELD(21, 1) /* index 883 */, | ||
1285 | TILEGX_OPC_V1DOTPUA, TILEGX_OPC_NONE, | ||
1286 | BITFIELD(21, 1) /* index 886 */, | ||
1287 | TILEGX_OPC_V1DOTPU, TILEGX_OPC_NONE, | ||
1288 | BITFIELD(18, 4) /* index 889 */, | ||
1289 | TILEGX_OPC_NONE, TILEGX_OPC_ROTLI, TILEGX_OPC_SHLI, TILEGX_OPC_SHLXI, | ||
1290 | TILEGX_OPC_SHRSI, TILEGX_OPC_SHRUI, TILEGX_OPC_SHRUXI, TILEGX_OPC_V1SHLI, | ||
1291 | TILEGX_OPC_V1SHRSI, TILEGX_OPC_V1SHRUI, TILEGX_OPC_V2SHLI, | ||
1292 | TILEGX_OPC_V2SHRSI, TILEGX_OPC_V2SHRUI, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1293 | TILEGX_OPC_NONE, | ||
1294 | BITFIELD(0, 2) /* index 906 */, | ||
1295 | TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, | ||
1296 | CHILD(911), | ||
1297 | BITFIELD(2, 2) /* index 911 */, | ||
1298 | TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, | ||
1299 | CHILD(916), | ||
1300 | BITFIELD(4, 2) /* index 916 */, | ||
1301 | TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, | ||
1302 | CHILD(921), | ||
1303 | BITFIELD(6, 2) /* index 921 */, | ||
1304 | TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, | ||
1305 | CHILD(926), | ||
1306 | BITFIELD(8, 2) /* index 926 */, | ||
1307 | TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, | ||
1308 | CHILD(931), | ||
1309 | BITFIELD(10, 2) /* index 931 */, | ||
1310 | TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, | ||
1311 | TILEGX_OPC_INFOL, | ||
1312 | }; | ||
1313 | |||
1314 | static const unsigned short decode_X1_fsm[1206] = | ||
1315 | { | ||
1316 | BITFIELD(53, 9) /* index 0 */, | ||
1317 | CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), | ||
1318 | CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), | ||
1319 | CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), | ||
1320 | CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), | ||
1321 | CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), | ||
1322 | CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), | ||
1323 | CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), | ||
1324 | CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), | ||
1325 | CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), | ||
1326 | CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), | ||
1327 | CHILD(513), CHILD(513), CHILD(513), CHILD(513), TILEGX_OPC_ADDXLI, | ||
1328 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, | ||
1329 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, | ||
1330 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, | ||
1331 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, | ||
1332 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, | ||
1333 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, | ||
1334 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, | ||
1335 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, | ||
1336 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, | ||
1337 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, | ||
1338 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, | ||
1339 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, | ||
1340 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, | ||
1341 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, | ||
1342 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, | ||
1343 | TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_NONE, | ||
1344 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1345 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1346 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1347 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1348 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1349 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1350 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1351 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_BEQZT, | ||
1352 | TILEGX_OPC_BEQZT, TILEGX_OPC_BEQZ, TILEGX_OPC_BEQZ, TILEGX_OPC_BGEZT, | ||
1353 | TILEGX_OPC_BGEZT, TILEGX_OPC_BGEZ, TILEGX_OPC_BGEZ, TILEGX_OPC_BGTZT, | ||
1354 | TILEGX_OPC_BGTZT, TILEGX_OPC_BGTZ, TILEGX_OPC_BGTZ, TILEGX_OPC_BLBCT, | ||
1355 | TILEGX_OPC_BLBCT, TILEGX_OPC_BLBC, TILEGX_OPC_BLBC, TILEGX_OPC_BLBST, | ||
1356 | TILEGX_OPC_BLBST, TILEGX_OPC_BLBS, TILEGX_OPC_BLBS, TILEGX_OPC_BLEZT, | ||
1357 | TILEGX_OPC_BLEZT, TILEGX_OPC_BLEZ, TILEGX_OPC_BLEZ, TILEGX_OPC_BLTZT, | ||
1358 | TILEGX_OPC_BLTZT, TILEGX_OPC_BLTZ, TILEGX_OPC_BLTZ, TILEGX_OPC_BNEZT, | ||
1359 | TILEGX_OPC_BNEZT, TILEGX_OPC_BNEZ, TILEGX_OPC_BNEZ, CHILD(528), CHILD(578), | ||
1360 | CHILD(598), CHILD(663), CHILD(683), CHILD(688), CHILD(693), CHILD(698), | ||
1361 | CHILD(703), CHILD(708), CHILD(713), CHILD(718), TILEGX_OPC_NONE, | ||
1362 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1363 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1364 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1365 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1366 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1367 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1368 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1369 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1370 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1371 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1372 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1373 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1374 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_JAL, | ||
1375 | TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, | ||
1376 | TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, | ||
1377 | TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, | ||
1378 | TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, | ||
1379 | TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, | ||
1380 | TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, | ||
1381 | TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, | ||
1382 | TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_J, TILEGX_OPC_J, | ||
1383 | TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, | ||
1384 | TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, | ||
1385 | TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, | ||
1386 | TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, | ||
1387 | TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, | ||
1388 | TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, | ||
1389 | CHILD(723), CHILD(740), CHILD(772), CHILD(789), CHILD(1108), CHILD(1125), | ||
1390 | CHILD(1142), TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1391 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1392 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1393 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1394 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1395 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1396 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1397 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1398 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1399 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1400 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1401 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1402 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1403 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1404 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, CHILD(1159), TILEGX_OPC_NONE, | ||
1405 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1406 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1407 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1408 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1409 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1410 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1411 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1412 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1413 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1414 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1415 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1416 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1417 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1418 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1419 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1420 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, CHILD(1176), CHILD(1176), CHILD(1176), | ||
1421 | CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), | ||
1422 | CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), | ||
1423 | CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), | ||
1424 | CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), | ||
1425 | CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), | ||
1426 | CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), | ||
1427 | CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), | ||
1428 | CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), | ||
1429 | CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), | ||
1430 | CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), | ||
1431 | CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), | ||
1432 | CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), | ||
1433 | CHILD(1176), | ||
1434 | BITFIELD(37, 2) /* index 513 */, | ||
1435 | TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, CHILD(518), | ||
1436 | BITFIELD(39, 2) /* index 518 */, | ||
1437 | TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, CHILD(523), | ||
1438 | BITFIELD(41, 2) /* index 523 */, | ||
1439 | TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_MOVELI, | ||
1440 | BITFIELD(51, 2) /* index 528 */, | ||
1441 | TILEGX_OPC_NONE, CHILD(533), TILEGX_OPC_ADDXI, CHILD(548), | ||
1442 | BITFIELD(37, 2) /* index 533 */, | ||
1443 | TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(538), | ||
1444 | BITFIELD(39, 2) /* index 538 */, | ||
1445 | TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(543), | ||
1446 | BITFIELD(41, 2) /* index 543 */, | ||
1447 | TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_MOVEI, | ||
1448 | BITFIELD(31, 2) /* index 548 */, | ||
1449 | TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(553), | ||
1450 | BITFIELD(33, 2) /* index 553 */, | ||
1451 | TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(558), | ||
1452 | BITFIELD(35, 2) /* index 558 */, | ||
1453 | TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(563), | ||
1454 | BITFIELD(37, 2) /* index 563 */, | ||
1455 | TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(568), | ||
1456 | BITFIELD(39, 2) /* index 568 */, | ||
1457 | TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(573), | ||
1458 | BITFIELD(41, 2) /* index 573 */, | ||
1459 | TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_INFO, | ||
1460 | BITFIELD(51, 2) /* index 578 */, | ||
1461 | TILEGX_OPC_CMPEQI, TILEGX_OPC_CMPLTSI, TILEGX_OPC_CMPLTUI, CHILD(583), | ||
1462 | BITFIELD(31, 2) /* index 583 */, | ||
1463 | TILEGX_OPC_LD1S_ADD, TILEGX_OPC_LD1S_ADD, TILEGX_OPC_LD1S_ADD, CHILD(588), | ||
1464 | BITFIELD(33, 2) /* index 588 */, | ||
1465 | TILEGX_OPC_LD1S_ADD, TILEGX_OPC_LD1S_ADD, TILEGX_OPC_LD1S_ADD, CHILD(593), | ||
1466 | BITFIELD(35, 2) /* index 593 */, | ||
1467 | TILEGX_OPC_LD1S_ADD, TILEGX_OPC_LD1S_ADD, TILEGX_OPC_LD1S_ADD, | ||
1468 | TILEGX_OPC_PREFETCH_ADD_L1_FAULT, | ||
1469 | BITFIELD(51, 2) /* index 598 */, | ||
1470 | CHILD(603), CHILD(618), CHILD(633), CHILD(648), | ||
1471 | BITFIELD(31, 2) /* index 603 */, | ||
1472 | TILEGX_OPC_LD1U_ADD, TILEGX_OPC_LD1U_ADD, TILEGX_OPC_LD1U_ADD, CHILD(608), | ||
1473 | BITFIELD(33, 2) /* index 608 */, | ||
1474 | TILEGX_OPC_LD1U_ADD, TILEGX_OPC_LD1U_ADD, TILEGX_OPC_LD1U_ADD, CHILD(613), | ||
1475 | BITFIELD(35, 2) /* index 613 */, | ||
1476 | TILEGX_OPC_LD1U_ADD, TILEGX_OPC_LD1U_ADD, TILEGX_OPC_LD1U_ADD, | ||
1477 | TILEGX_OPC_PREFETCH_ADD_L1, | ||
1478 | BITFIELD(31, 2) /* index 618 */, | ||
1479 | TILEGX_OPC_LD2S_ADD, TILEGX_OPC_LD2S_ADD, TILEGX_OPC_LD2S_ADD, CHILD(623), | ||
1480 | BITFIELD(33, 2) /* index 623 */, | ||
1481 | TILEGX_OPC_LD2S_ADD, TILEGX_OPC_LD2S_ADD, TILEGX_OPC_LD2S_ADD, CHILD(628), | ||
1482 | BITFIELD(35, 2) /* index 628 */, | ||
1483 | TILEGX_OPC_LD2S_ADD, TILEGX_OPC_LD2S_ADD, TILEGX_OPC_LD2S_ADD, | ||
1484 | TILEGX_OPC_PREFETCH_ADD_L2_FAULT, | ||
1485 | BITFIELD(31, 2) /* index 633 */, | ||
1486 | TILEGX_OPC_LD2U_ADD, TILEGX_OPC_LD2U_ADD, TILEGX_OPC_LD2U_ADD, CHILD(638), | ||
1487 | BITFIELD(33, 2) /* index 638 */, | ||
1488 | TILEGX_OPC_LD2U_ADD, TILEGX_OPC_LD2U_ADD, TILEGX_OPC_LD2U_ADD, CHILD(643), | ||
1489 | BITFIELD(35, 2) /* index 643 */, | ||
1490 | TILEGX_OPC_LD2U_ADD, TILEGX_OPC_LD2U_ADD, TILEGX_OPC_LD2U_ADD, | ||
1491 | TILEGX_OPC_PREFETCH_ADD_L2, | ||
1492 | BITFIELD(31, 2) /* index 648 */, | ||
1493 | TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD, CHILD(653), | ||
1494 | BITFIELD(33, 2) /* index 653 */, | ||
1495 | TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD, CHILD(658), | ||
1496 | BITFIELD(35, 2) /* index 658 */, | ||
1497 | TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD, | ||
1498 | TILEGX_OPC_PREFETCH_ADD_L3_FAULT, | ||
1499 | BITFIELD(51, 2) /* index 663 */, | ||
1500 | CHILD(668), TILEGX_OPC_LDNT1S_ADD, TILEGX_OPC_LDNT1U_ADD, | ||
1501 | TILEGX_OPC_LDNT2S_ADD, | ||
1502 | BITFIELD(31, 2) /* index 668 */, | ||
1503 | TILEGX_OPC_LD4U_ADD, TILEGX_OPC_LD4U_ADD, TILEGX_OPC_LD4U_ADD, CHILD(673), | ||
1504 | BITFIELD(33, 2) /* index 673 */, | ||
1505 | TILEGX_OPC_LD4U_ADD, TILEGX_OPC_LD4U_ADD, TILEGX_OPC_LD4U_ADD, CHILD(678), | ||
1506 | BITFIELD(35, 2) /* index 678 */, | ||
1507 | TILEGX_OPC_LD4U_ADD, TILEGX_OPC_LD4U_ADD, TILEGX_OPC_LD4U_ADD, | ||
1508 | TILEGX_OPC_PREFETCH_ADD_L3, | ||
1509 | BITFIELD(51, 2) /* index 683 */, | ||
1510 | TILEGX_OPC_LDNT2U_ADD, TILEGX_OPC_LDNT4S_ADD, TILEGX_OPC_LDNT4U_ADD, | ||
1511 | TILEGX_OPC_LDNT_ADD, | ||
1512 | BITFIELD(51, 2) /* index 688 */, | ||
1513 | TILEGX_OPC_LD_ADD, TILEGX_OPC_LDNA_ADD, TILEGX_OPC_MFSPR, TILEGX_OPC_MTSPR, | ||
1514 | BITFIELD(51, 2) /* index 693 */, | ||
1515 | TILEGX_OPC_ORI, TILEGX_OPC_ST1_ADD, TILEGX_OPC_ST2_ADD, TILEGX_OPC_ST4_ADD, | ||
1516 | BITFIELD(51, 2) /* index 698 */, | ||
1517 | TILEGX_OPC_STNT1_ADD, TILEGX_OPC_STNT2_ADD, TILEGX_OPC_STNT4_ADD, | ||
1518 | TILEGX_OPC_STNT_ADD, | ||
1519 | BITFIELD(51, 2) /* index 703 */, | ||
1520 | TILEGX_OPC_ST_ADD, TILEGX_OPC_V1ADDI, TILEGX_OPC_V1CMPEQI, | ||
1521 | TILEGX_OPC_V1CMPLTSI, | ||
1522 | BITFIELD(51, 2) /* index 708 */, | ||
1523 | TILEGX_OPC_V1CMPLTUI, TILEGX_OPC_V1MAXUI, TILEGX_OPC_V1MINUI, | ||
1524 | TILEGX_OPC_V2ADDI, | ||
1525 | BITFIELD(51, 2) /* index 713 */, | ||
1526 | TILEGX_OPC_V2CMPEQI, TILEGX_OPC_V2CMPLTSI, TILEGX_OPC_V2CMPLTUI, | ||
1527 | TILEGX_OPC_V2MAXSI, | ||
1528 | BITFIELD(51, 2) /* index 718 */, | ||
1529 | TILEGX_OPC_V2MINSI, TILEGX_OPC_XORI, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1530 | BITFIELD(49, 4) /* index 723 */, | ||
1531 | TILEGX_OPC_NONE, TILEGX_OPC_ADDXSC, TILEGX_OPC_ADDX, TILEGX_OPC_ADD, | ||
1532 | TILEGX_OPC_AND, TILEGX_OPC_CMPEQ, TILEGX_OPC_CMPEXCH4, TILEGX_OPC_CMPEXCH, | ||
1533 | TILEGX_OPC_CMPLES, TILEGX_OPC_CMPLEU, TILEGX_OPC_CMPLTS, TILEGX_OPC_CMPLTU, | ||
1534 | TILEGX_OPC_CMPNE, TILEGX_OPC_DBLALIGN2, TILEGX_OPC_DBLALIGN4, | ||
1535 | TILEGX_OPC_DBLALIGN6, | ||
1536 | BITFIELD(49, 4) /* index 740 */, | ||
1537 | TILEGX_OPC_EXCH4, TILEGX_OPC_EXCH, TILEGX_OPC_FETCHADD4, | ||
1538 | TILEGX_OPC_FETCHADDGEZ4, TILEGX_OPC_FETCHADDGEZ, TILEGX_OPC_FETCHADD, | ||
1539 | TILEGX_OPC_FETCHAND4, TILEGX_OPC_FETCHAND, TILEGX_OPC_FETCHOR4, | ||
1540 | TILEGX_OPC_FETCHOR, TILEGX_OPC_MNZ, TILEGX_OPC_MZ, TILEGX_OPC_NOR, | ||
1541 | CHILD(757), TILEGX_OPC_ROTL, TILEGX_OPC_SHL1ADDX, | ||
1542 | BITFIELD(43, 2) /* index 757 */, | ||
1543 | TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(762), | ||
1544 | BITFIELD(45, 2) /* index 762 */, | ||
1545 | TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(767), | ||
1546 | BITFIELD(47, 2) /* index 767 */, | ||
1547 | TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_MOVE, | ||
1548 | BITFIELD(49, 4) /* index 772 */, | ||
1549 | TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL2ADDX, TILEGX_OPC_SHL2ADD, | ||
1550 | TILEGX_OPC_SHL3ADDX, TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHLX, TILEGX_OPC_SHL, | ||
1551 | TILEGX_OPC_SHRS, TILEGX_OPC_SHRUX, TILEGX_OPC_SHRU, TILEGX_OPC_ST1, | ||
1552 | TILEGX_OPC_ST2, TILEGX_OPC_ST4, TILEGX_OPC_STNT1, TILEGX_OPC_STNT2, | ||
1553 | TILEGX_OPC_STNT4, | ||
1554 | BITFIELD(46, 7) /* index 789 */, | ||
1555 | TILEGX_OPC_STNT, TILEGX_OPC_STNT, TILEGX_OPC_STNT, TILEGX_OPC_STNT, | ||
1556 | TILEGX_OPC_STNT, TILEGX_OPC_STNT, TILEGX_OPC_STNT, TILEGX_OPC_STNT, | ||
1557 | TILEGX_OPC_ST, TILEGX_OPC_ST, TILEGX_OPC_ST, TILEGX_OPC_ST, TILEGX_OPC_ST, | ||
1558 | TILEGX_OPC_ST, TILEGX_OPC_ST, TILEGX_OPC_ST, TILEGX_OPC_SUBXSC, | ||
1559 | TILEGX_OPC_SUBXSC, TILEGX_OPC_SUBXSC, TILEGX_OPC_SUBXSC, TILEGX_OPC_SUBXSC, | ||
1560 | TILEGX_OPC_SUBXSC, TILEGX_OPC_SUBXSC, TILEGX_OPC_SUBXSC, TILEGX_OPC_SUBX, | ||
1561 | TILEGX_OPC_SUBX, TILEGX_OPC_SUBX, TILEGX_OPC_SUBX, TILEGX_OPC_SUBX, | ||
1562 | TILEGX_OPC_SUBX, TILEGX_OPC_SUBX, TILEGX_OPC_SUBX, TILEGX_OPC_SUB, | ||
1563 | TILEGX_OPC_SUB, TILEGX_OPC_SUB, TILEGX_OPC_SUB, TILEGX_OPC_SUB, | ||
1564 | TILEGX_OPC_SUB, TILEGX_OPC_SUB, TILEGX_OPC_SUB, CHILD(918), CHILD(927), | ||
1565 | CHILD(1006), CHILD(1090), CHILD(1099), TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1566 | TILEGX_OPC_NONE, TILEGX_OPC_V1ADDUC, TILEGX_OPC_V1ADDUC, TILEGX_OPC_V1ADDUC, | ||
1567 | TILEGX_OPC_V1ADDUC, TILEGX_OPC_V1ADDUC, TILEGX_OPC_V1ADDUC, | ||
1568 | TILEGX_OPC_V1ADDUC, TILEGX_OPC_V1ADDUC, TILEGX_OPC_V1ADD, TILEGX_OPC_V1ADD, | ||
1569 | TILEGX_OPC_V1ADD, TILEGX_OPC_V1ADD, TILEGX_OPC_V1ADD, TILEGX_OPC_V1ADD, | ||
1570 | TILEGX_OPC_V1ADD, TILEGX_OPC_V1ADD, TILEGX_OPC_V1CMPEQ, TILEGX_OPC_V1CMPEQ, | ||
1571 | TILEGX_OPC_V1CMPEQ, TILEGX_OPC_V1CMPEQ, TILEGX_OPC_V1CMPEQ, | ||
1572 | TILEGX_OPC_V1CMPEQ, TILEGX_OPC_V1CMPEQ, TILEGX_OPC_V1CMPEQ, | ||
1573 | TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLES, | ||
1574 | TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLES, | ||
1575 | TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLEU, | ||
1576 | TILEGX_OPC_V1CMPLEU, TILEGX_OPC_V1CMPLEU, TILEGX_OPC_V1CMPLEU, | ||
1577 | TILEGX_OPC_V1CMPLEU, TILEGX_OPC_V1CMPLEU, TILEGX_OPC_V1CMPLEU, | ||
1578 | TILEGX_OPC_V1CMPLEU, TILEGX_OPC_V1CMPLTS, TILEGX_OPC_V1CMPLTS, | ||
1579 | TILEGX_OPC_V1CMPLTS, TILEGX_OPC_V1CMPLTS, TILEGX_OPC_V1CMPLTS, | ||
1580 | TILEGX_OPC_V1CMPLTS, TILEGX_OPC_V1CMPLTS, TILEGX_OPC_V1CMPLTS, | ||
1581 | TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPLTU, | ||
1582 | TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPLTU, | ||
1583 | TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPNE, | ||
1584 | TILEGX_OPC_V1CMPNE, TILEGX_OPC_V1CMPNE, TILEGX_OPC_V1CMPNE, | ||
1585 | TILEGX_OPC_V1CMPNE, TILEGX_OPC_V1CMPNE, TILEGX_OPC_V1CMPNE, | ||
1586 | TILEGX_OPC_V1CMPNE, TILEGX_OPC_V1INT_H, TILEGX_OPC_V1INT_H, | ||
1587 | TILEGX_OPC_V1INT_H, TILEGX_OPC_V1INT_H, TILEGX_OPC_V1INT_H, | ||
1588 | TILEGX_OPC_V1INT_H, TILEGX_OPC_V1INT_H, TILEGX_OPC_V1INT_H, | ||
1589 | TILEGX_OPC_V1INT_L, TILEGX_OPC_V1INT_L, TILEGX_OPC_V1INT_L, | ||
1590 | TILEGX_OPC_V1INT_L, TILEGX_OPC_V1INT_L, TILEGX_OPC_V1INT_L, | ||
1591 | TILEGX_OPC_V1INT_L, TILEGX_OPC_V1INT_L, | ||
1592 | BITFIELD(43, 3) /* index 918 */, | ||
1593 | TILEGX_OPC_NONE, TILEGX_OPC_DRAIN, TILEGX_OPC_DTLBPR, TILEGX_OPC_FINV, | ||
1594 | TILEGX_OPC_FLUSHWB, TILEGX_OPC_FLUSH, TILEGX_OPC_FNOP, TILEGX_OPC_ICOH, | ||
1595 | BITFIELD(43, 3) /* index 927 */, | ||
1596 | CHILD(936), TILEGX_OPC_INV, TILEGX_OPC_IRET, TILEGX_OPC_JALRP, | ||
1597 | TILEGX_OPC_JALR, TILEGX_OPC_JRP, TILEGX_OPC_JR, CHILD(991), | ||
1598 | BITFIELD(31, 2) /* index 936 */, | ||
1599 | CHILD(941), CHILD(966), TILEGX_OPC_ILL, TILEGX_OPC_ILL, | ||
1600 | BITFIELD(33, 2) /* index 941 */, | ||
1601 | TILEGX_OPC_ILL, TILEGX_OPC_ILL, TILEGX_OPC_ILL, CHILD(946), | ||
1602 | BITFIELD(35, 2) /* index 946 */, | ||
1603 | TILEGX_OPC_ILL, CHILD(951), TILEGX_OPC_ILL, TILEGX_OPC_ILL, | ||
1604 | BITFIELD(37, 2) /* index 951 */, | ||
1605 | TILEGX_OPC_ILL, CHILD(956), TILEGX_OPC_ILL, TILEGX_OPC_ILL, | ||
1606 | BITFIELD(39, 2) /* index 956 */, | ||
1607 | TILEGX_OPC_ILL, CHILD(961), TILEGX_OPC_ILL, TILEGX_OPC_ILL, | ||
1608 | BITFIELD(41, 2) /* index 961 */, | ||
1609 | TILEGX_OPC_ILL, TILEGX_OPC_ILL, TILEGX_OPC_BPT, TILEGX_OPC_ILL, | ||
1610 | BITFIELD(33, 2) /* index 966 */, | ||
1611 | TILEGX_OPC_ILL, TILEGX_OPC_ILL, TILEGX_OPC_ILL, CHILD(971), | ||
1612 | BITFIELD(35, 2) /* index 971 */, | ||
1613 | TILEGX_OPC_ILL, CHILD(976), TILEGX_OPC_ILL, TILEGX_OPC_ILL, | ||
1614 | BITFIELD(37, 2) /* index 976 */, | ||
1615 | TILEGX_OPC_ILL, CHILD(981), TILEGX_OPC_ILL, TILEGX_OPC_ILL, | ||
1616 | BITFIELD(39, 2) /* index 981 */, | ||
1617 | TILEGX_OPC_ILL, CHILD(986), TILEGX_OPC_ILL, TILEGX_OPC_ILL, | ||
1618 | BITFIELD(41, 2) /* index 986 */, | ||
1619 | TILEGX_OPC_ILL, TILEGX_OPC_ILL, TILEGX_OPC_RAISE, TILEGX_OPC_ILL, | ||
1620 | BITFIELD(31, 2) /* index 991 */, | ||
1621 | TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, CHILD(996), | ||
1622 | BITFIELD(33, 2) /* index 996 */, | ||
1623 | TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, CHILD(1001), | ||
1624 | BITFIELD(35, 2) /* index 1001 */, | ||
1625 | TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, | ||
1626 | TILEGX_OPC_PREFETCH_L1_FAULT, | ||
1627 | BITFIELD(43, 3) /* index 1006 */, | ||
1628 | CHILD(1015), CHILD(1030), CHILD(1045), CHILD(1060), CHILD(1075), | ||
1629 | TILEGX_OPC_LDNA, TILEGX_OPC_LDNT1S, TILEGX_OPC_LDNT1U, | ||
1630 | BITFIELD(31, 2) /* index 1015 */, | ||
1631 | TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, CHILD(1020), | ||
1632 | BITFIELD(33, 2) /* index 1020 */, | ||
1633 | TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, CHILD(1025), | ||
1634 | BITFIELD(35, 2) /* index 1025 */, | ||
1635 | TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_PREFETCH, | ||
1636 | BITFIELD(31, 2) /* index 1030 */, | ||
1637 | TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, CHILD(1035), | ||
1638 | BITFIELD(33, 2) /* index 1035 */, | ||
1639 | TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, CHILD(1040), | ||
1640 | BITFIELD(35, 2) /* index 1040 */, | ||
1641 | TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, | ||
1642 | TILEGX_OPC_PREFETCH_L2_FAULT, | ||
1643 | BITFIELD(31, 2) /* index 1045 */, | ||
1644 | TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, CHILD(1050), | ||
1645 | BITFIELD(33, 2) /* index 1050 */, | ||
1646 | TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, CHILD(1055), | ||
1647 | BITFIELD(35, 2) /* index 1055 */, | ||
1648 | TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_PREFETCH_L2, | ||
1649 | BITFIELD(31, 2) /* index 1060 */, | ||
1650 | TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, CHILD(1065), | ||
1651 | BITFIELD(33, 2) /* index 1065 */, | ||
1652 | TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, CHILD(1070), | ||
1653 | BITFIELD(35, 2) /* index 1070 */, | ||
1654 | TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, | ||
1655 | TILEGX_OPC_PREFETCH_L3_FAULT, | ||
1656 | BITFIELD(31, 2) /* index 1075 */, | ||
1657 | TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, CHILD(1080), | ||
1658 | BITFIELD(33, 2) /* index 1080 */, | ||
1659 | TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, CHILD(1085), | ||
1660 | BITFIELD(35, 2) /* index 1085 */, | ||
1661 | TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, TILEGX_OPC_PREFETCH_L3, | ||
1662 | BITFIELD(43, 3) /* index 1090 */, | ||
1663 | TILEGX_OPC_LDNT2S, TILEGX_OPC_LDNT2U, TILEGX_OPC_LDNT4S, TILEGX_OPC_LDNT4U, | ||
1664 | TILEGX_OPC_LDNT, TILEGX_OPC_LD, TILEGX_OPC_LNK, TILEGX_OPC_MF, | ||
1665 | BITFIELD(43, 3) /* index 1099 */, | ||
1666 | TILEGX_OPC_NAP, TILEGX_OPC_NOP, TILEGX_OPC_SWINT0, TILEGX_OPC_SWINT1, | ||
1667 | TILEGX_OPC_SWINT2, TILEGX_OPC_SWINT3, TILEGX_OPC_WH64, TILEGX_OPC_NONE, | ||
1668 | BITFIELD(49, 4) /* index 1108 */, | ||
1669 | TILEGX_OPC_V1MAXU, TILEGX_OPC_V1MINU, TILEGX_OPC_V1MNZ, TILEGX_OPC_V1MZ, | ||
1670 | TILEGX_OPC_V1SHL, TILEGX_OPC_V1SHRS, TILEGX_OPC_V1SHRU, TILEGX_OPC_V1SUBUC, | ||
1671 | TILEGX_OPC_V1SUB, TILEGX_OPC_V2ADDSC, TILEGX_OPC_V2ADD, TILEGX_OPC_V2CMPEQ, | ||
1672 | TILEGX_OPC_V2CMPLES, TILEGX_OPC_V2CMPLEU, TILEGX_OPC_V2CMPLTS, | ||
1673 | TILEGX_OPC_V2CMPLTU, | ||
1674 | BITFIELD(49, 4) /* index 1125 */, | ||
1675 | TILEGX_OPC_V2CMPNE, TILEGX_OPC_V2INT_H, TILEGX_OPC_V2INT_L, | ||
1676 | TILEGX_OPC_V2MAXS, TILEGX_OPC_V2MINS, TILEGX_OPC_V2MNZ, TILEGX_OPC_V2MZ, | ||
1677 | TILEGX_OPC_V2PACKH, TILEGX_OPC_V2PACKL, TILEGX_OPC_V2PACKUC, | ||
1678 | TILEGX_OPC_V2SHLSC, TILEGX_OPC_V2SHL, TILEGX_OPC_V2SHRS, TILEGX_OPC_V2SHRU, | ||
1679 | TILEGX_OPC_V2SUBSC, TILEGX_OPC_V2SUB, | ||
1680 | BITFIELD(49, 4) /* index 1142 */, | ||
1681 | TILEGX_OPC_V4ADDSC, TILEGX_OPC_V4ADD, TILEGX_OPC_V4INT_H, | ||
1682 | TILEGX_OPC_V4INT_L, TILEGX_OPC_V4PACKSC, TILEGX_OPC_V4SHLSC, | ||
1683 | TILEGX_OPC_V4SHL, TILEGX_OPC_V4SHRS, TILEGX_OPC_V4SHRU, TILEGX_OPC_V4SUBSC, | ||
1684 | TILEGX_OPC_V4SUB, TILEGX_OPC_XOR, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1685 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1686 | BITFIELD(49, 4) /* index 1159 */, | ||
1687 | TILEGX_OPC_NONE, TILEGX_OPC_ROTLI, TILEGX_OPC_SHLI, TILEGX_OPC_SHLXI, | ||
1688 | TILEGX_OPC_SHRSI, TILEGX_OPC_SHRUI, TILEGX_OPC_SHRUXI, TILEGX_OPC_V1SHLI, | ||
1689 | TILEGX_OPC_V1SHRSI, TILEGX_OPC_V1SHRUI, TILEGX_OPC_V2SHLI, | ||
1690 | TILEGX_OPC_V2SHRSI, TILEGX_OPC_V2SHRUI, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1691 | TILEGX_OPC_NONE, | ||
1692 | BITFIELD(31, 2) /* index 1176 */, | ||
1693 | TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, | ||
1694 | CHILD(1181), | ||
1695 | BITFIELD(33, 2) /* index 1181 */, | ||
1696 | TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, | ||
1697 | CHILD(1186), | ||
1698 | BITFIELD(35, 2) /* index 1186 */, | ||
1699 | TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, | ||
1700 | CHILD(1191), | ||
1701 | BITFIELD(37, 2) /* index 1191 */, | ||
1702 | TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, | ||
1703 | CHILD(1196), | ||
1704 | BITFIELD(39, 2) /* index 1196 */, | ||
1705 | TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, | ||
1706 | CHILD(1201), | ||
1707 | BITFIELD(41, 2) /* index 1201 */, | ||
1708 | TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, | ||
1709 | TILEGX_OPC_INFOL, | ||
1710 | }; | ||
1711 | |||
1712 | static const unsigned short decode_Y0_fsm[178] = | ||
1713 | { | ||
1714 | BITFIELD(27, 4) /* index 0 */, | ||
1715 | CHILD(17), TILEGX_OPC_ADDXI, CHILD(32), TILEGX_OPC_CMPEQI, | ||
1716 | TILEGX_OPC_CMPLTSI, CHILD(62), CHILD(67), CHILD(118), CHILD(123), | ||
1717 | CHILD(128), CHILD(133), CHILD(153), CHILD(158), CHILD(163), CHILD(168), | ||
1718 | CHILD(173), | ||
1719 | BITFIELD(6, 2) /* index 17 */, | ||
1720 | TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(22), | ||
1721 | BITFIELD(8, 2) /* index 22 */, | ||
1722 | TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(27), | ||
1723 | BITFIELD(10, 2) /* index 27 */, | ||
1724 | TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_MOVEI, | ||
1725 | BITFIELD(0, 2) /* index 32 */, | ||
1726 | TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(37), | ||
1727 | BITFIELD(2, 2) /* index 37 */, | ||
1728 | TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(42), | ||
1729 | BITFIELD(4, 2) /* index 42 */, | ||
1730 | TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(47), | ||
1731 | BITFIELD(6, 2) /* index 47 */, | ||
1732 | TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(52), | ||
1733 | BITFIELD(8, 2) /* index 52 */, | ||
1734 | TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(57), | ||
1735 | BITFIELD(10, 2) /* index 57 */, | ||
1736 | TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_INFO, | ||
1737 | BITFIELD(18, 2) /* index 62 */, | ||
1738 | TILEGX_OPC_ADDX, TILEGX_OPC_ADD, TILEGX_OPC_SUBX, TILEGX_OPC_SUB, | ||
1739 | BITFIELD(15, 5) /* index 67 */, | ||
1740 | TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD, | ||
1741 | TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD, | ||
1742 | TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL2ADD, | ||
1743 | TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL2ADD, | ||
1744 | TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL2ADD, | ||
1745 | TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD, | ||
1746 | TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD, | ||
1747 | TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD, CHILD(100), | ||
1748 | CHILD(109), TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1749 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1750 | BITFIELD(12, 3) /* index 100 */, | ||
1751 | TILEGX_OPC_NONE, TILEGX_OPC_CLZ, TILEGX_OPC_CTZ, TILEGX_OPC_FNOP, | ||
1752 | TILEGX_OPC_FSINGLE_PACK1, TILEGX_OPC_NOP, TILEGX_OPC_PCNT, | ||
1753 | TILEGX_OPC_REVBITS, | ||
1754 | BITFIELD(12, 3) /* index 109 */, | ||
1755 | TILEGX_OPC_REVBYTES, TILEGX_OPC_TBLIDXB0, TILEGX_OPC_TBLIDXB1, | ||
1756 | TILEGX_OPC_TBLIDXB2, TILEGX_OPC_TBLIDXB3, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1757 | TILEGX_OPC_NONE, | ||
1758 | BITFIELD(18, 2) /* index 118 */, | ||
1759 | TILEGX_OPC_CMPLES, TILEGX_OPC_CMPLEU, TILEGX_OPC_CMPLTS, TILEGX_OPC_CMPLTU, | ||
1760 | BITFIELD(18, 2) /* index 123 */, | ||
1761 | TILEGX_OPC_CMPEQ, TILEGX_OPC_CMPNE, TILEGX_OPC_MULAX, TILEGX_OPC_MULX, | ||
1762 | BITFIELD(18, 2) /* index 128 */, | ||
1763 | TILEGX_OPC_CMOVEQZ, TILEGX_OPC_CMOVNEZ, TILEGX_OPC_MNZ, TILEGX_OPC_MZ, | ||
1764 | BITFIELD(18, 2) /* index 133 */, | ||
1765 | TILEGX_OPC_AND, TILEGX_OPC_NOR, CHILD(138), TILEGX_OPC_XOR, | ||
1766 | BITFIELD(12, 2) /* index 138 */, | ||
1767 | TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(143), | ||
1768 | BITFIELD(14, 2) /* index 143 */, | ||
1769 | TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(148), | ||
1770 | BITFIELD(16, 2) /* index 148 */, | ||
1771 | TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_MOVE, | ||
1772 | BITFIELD(18, 2) /* index 153 */, | ||
1773 | TILEGX_OPC_ROTL, TILEGX_OPC_SHL, TILEGX_OPC_SHRS, TILEGX_OPC_SHRU, | ||
1774 | BITFIELD(18, 2) /* index 158 */, | ||
1775 | TILEGX_OPC_NONE, TILEGX_OPC_SHL1ADDX, TILEGX_OPC_SHL2ADDX, | ||
1776 | TILEGX_OPC_SHL3ADDX, | ||
1777 | BITFIELD(18, 2) /* index 163 */, | ||
1778 | TILEGX_OPC_MUL_HS_HS, TILEGX_OPC_MUL_HU_HU, TILEGX_OPC_MUL_LS_LS, | ||
1779 | TILEGX_OPC_MUL_LU_LU, | ||
1780 | BITFIELD(18, 2) /* index 168 */, | ||
1781 | TILEGX_OPC_MULA_HS_HS, TILEGX_OPC_MULA_HU_HU, TILEGX_OPC_MULA_LS_LS, | ||
1782 | TILEGX_OPC_MULA_LU_LU, | ||
1783 | BITFIELD(18, 2) /* index 173 */, | ||
1784 | TILEGX_OPC_ROTLI, TILEGX_OPC_SHLI, TILEGX_OPC_SHRSI, TILEGX_OPC_SHRUI, | ||
1785 | }; | ||
1786 | |||
1787 | static const unsigned short decode_Y1_fsm[167] = | ||
1788 | { | ||
1789 | BITFIELD(58, 4) /* index 0 */, | ||
1790 | TILEGX_OPC_NONE, CHILD(17), TILEGX_OPC_ADDXI, CHILD(32), TILEGX_OPC_CMPEQI, | ||
1791 | TILEGX_OPC_CMPLTSI, CHILD(62), CHILD(67), CHILD(117), CHILD(122), | ||
1792 | CHILD(127), CHILD(132), CHILD(152), CHILD(157), CHILD(162), TILEGX_OPC_NONE, | ||
1793 | BITFIELD(37, 2) /* index 17 */, | ||
1794 | TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(22), | ||
1795 | BITFIELD(39, 2) /* index 22 */, | ||
1796 | TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(27), | ||
1797 | BITFIELD(41, 2) /* index 27 */, | ||
1798 | TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_MOVEI, | ||
1799 | BITFIELD(31, 2) /* index 32 */, | ||
1800 | TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(37), | ||
1801 | BITFIELD(33, 2) /* index 37 */, | ||
1802 | TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(42), | ||
1803 | BITFIELD(35, 2) /* index 42 */, | ||
1804 | TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(47), | ||
1805 | BITFIELD(37, 2) /* index 47 */, | ||
1806 | TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(52), | ||
1807 | BITFIELD(39, 2) /* index 52 */, | ||
1808 | TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(57), | ||
1809 | BITFIELD(41, 2) /* index 57 */, | ||
1810 | TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_INFO, | ||
1811 | BITFIELD(49, 2) /* index 62 */, | ||
1812 | TILEGX_OPC_ADDX, TILEGX_OPC_ADD, TILEGX_OPC_SUBX, TILEGX_OPC_SUB, | ||
1813 | BITFIELD(47, 4) /* index 67 */, | ||
1814 | TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD, | ||
1815 | TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL2ADD, | ||
1816 | TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL3ADD, | ||
1817 | TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD, CHILD(84), | ||
1818 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, | ||
1819 | BITFIELD(43, 3) /* index 84 */, | ||
1820 | CHILD(93), CHILD(96), CHILD(99), CHILD(102), CHILD(105), CHILD(108), | ||
1821 | CHILD(111), CHILD(114), | ||
1822 | BITFIELD(46, 1) /* index 93 */, | ||
1823 | TILEGX_OPC_NONE, TILEGX_OPC_FNOP, | ||
1824 | BITFIELD(46, 1) /* index 96 */, | ||
1825 | TILEGX_OPC_NONE, TILEGX_OPC_ILL, | ||
1826 | BITFIELD(46, 1) /* index 99 */, | ||
1827 | TILEGX_OPC_NONE, TILEGX_OPC_JALRP, | ||
1828 | BITFIELD(46, 1) /* index 102 */, | ||
1829 | TILEGX_OPC_NONE, TILEGX_OPC_JALR, | ||
1830 | BITFIELD(46, 1) /* index 105 */, | ||
1831 | TILEGX_OPC_NONE, TILEGX_OPC_JRP, | ||
1832 | BITFIELD(46, 1) /* index 108 */, | ||
1833 | TILEGX_OPC_NONE, TILEGX_OPC_JR, | ||
1834 | BITFIELD(46, 1) /* index 111 */, | ||
1835 | TILEGX_OPC_NONE, TILEGX_OPC_LNK, | ||
1836 | BITFIELD(46, 1) /* index 114 */, | ||
1837 | TILEGX_OPC_NONE, TILEGX_OPC_NOP, | ||
1838 | BITFIELD(49, 2) /* index 117 */, | ||
1839 | TILEGX_OPC_CMPLES, TILEGX_OPC_CMPLEU, TILEGX_OPC_CMPLTS, TILEGX_OPC_CMPLTU, | ||
1840 | BITFIELD(49, 2) /* index 122 */, | ||
1841 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_CMPEQ, TILEGX_OPC_CMPNE, | ||
1842 | BITFIELD(49, 2) /* index 127 */, | ||
1843 | TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_MNZ, TILEGX_OPC_MZ, | ||
1844 | BITFIELD(49, 2) /* index 132 */, | ||
1845 | TILEGX_OPC_AND, TILEGX_OPC_NOR, CHILD(137), TILEGX_OPC_XOR, | ||
1846 | BITFIELD(43, 2) /* index 137 */, | ||
1847 | TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(142), | ||
1848 | BITFIELD(45, 2) /* index 142 */, | ||
1849 | TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(147), | ||
1850 | BITFIELD(47, 2) /* index 147 */, | ||
1851 | TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_MOVE, | ||
1852 | BITFIELD(49, 2) /* index 152 */, | ||
1853 | TILEGX_OPC_ROTL, TILEGX_OPC_SHL, TILEGX_OPC_SHRS, TILEGX_OPC_SHRU, | ||
1854 | BITFIELD(49, 2) /* index 157 */, | ||
1855 | TILEGX_OPC_NONE, TILEGX_OPC_SHL1ADDX, TILEGX_OPC_SHL2ADDX, | ||
1856 | TILEGX_OPC_SHL3ADDX, | ||
1857 | BITFIELD(49, 2) /* index 162 */, | ||
1858 | TILEGX_OPC_ROTLI, TILEGX_OPC_SHLI, TILEGX_OPC_SHRSI, TILEGX_OPC_SHRUI, | ||
1859 | }; | ||
1860 | |||
1861 | static const unsigned short decode_Y2_fsm[118] = | ||
1862 | { | ||
1863 | BITFIELD(62, 2) /* index 0 */, | ||
1864 | TILEGX_OPC_NONE, CHILD(5), CHILD(66), CHILD(109), | ||
1865 | BITFIELD(55, 3) /* index 5 */, | ||
1866 | CHILD(14), CHILD(14), CHILD(14), CHILD(17), CHILD(40), CHILD(40), CHILD(40), | ||
1867 | CHILD(43), | ||
1868 | BITFIELD(26, 1) /* index 14 */, | ||
1869 | TILEGX_OPC_LD1S, TILEGX_OPC_LD1U, | ||
1870 | BITFIELD(26, 1) /* index 17 */, | ||
1871 | CHILD(20), CHILD(30), | ||
1872 | BITFIELD(51, 2) /* index 20 */, | ||
1873 | TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, CHILD(25), | ||
1874 | BITFIELD(53, 2) /* index 25 */, | ||
1875 | TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, | ||
1876 | TILEGX_OPC_PREFETCH_L1_FAULT, | ||
1877 | BITFIELD(51, 2) /* index 30 */, | ||
1878 | TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, CHILD(35), | ||
1879 | BITFIELD(53, 2) /* index 35 */, | ||
1880 | TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_PREFETCH, | ||
1881 | BITFIELD(26, 1) /* index 40 */, | ||
1882 | TILEGX_OPC_LD2S, TILEGX_OPC_LD2U, | ||
1883 | BITFIELD(26, 1) /* index 43 */, | ||
1884 | CHILD(46), CHILD(56), | ||
1885 | BITFIELD(51, 2) /* index 46 */, | ||
1886 | TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, CHILD(51), | ||
1887 | BITFIELD(53, 2) /* index 51 */, | ||
1888 | TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, | ||
1889 | TILEGX_OPC_PREFETCH_L2_FAULT, | ||
1890 | BITFIELD(51, 2) /* index 56 */, | ||
1891 | TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, CHILD(61), | ||
1892 | BITFIELD(53, 2) /* index 61 */, | ||
1893 | TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_PREFETCH_L2, | ||
1894 | BITFIELD(56, 2) /* index 66 */, | ||
1895 | CHILD(71), CHILD(74), CHILD(90), CHILD(93), | ||
1896 | BITFIELD(26, 1) /* index 71 */, | ||
1897 | TILEGX_OPC_NONE, TILEGX_OPC_LD4S, | ||
1898 | BITFIELD(26, 1) /* index 74 */, | ||
1899 | TILEGX_OPC_NONE, CHILD(77), | ||
1900 | BITFIELD(51, 2) /* index 77 */, | ||
1901 | TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, CHILD(82), | ||
1902 | BITFIELD(53, 2) /* index 82 */, | ||
1903 | TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, CHILD(87), | ||
1904 | BITFIELD(55, 1) /* index 87 */, | ||
1905 | TILEGX_OPC_LD4S, TILEGX_OPC_PREFETCH_L3_FAULT, | ||
1906 | BITFIELD(26, 1) /* index 90 */, | ||
1907 | TILEGX_OPC_LD4U, TILEGX_OPC_LD, | ||
1908 | BITFIELD(26, 1) /* index 93 */, | ||
1909 | CHILD(96), TILEGX_OPC_LD, | ||
1910 | BITFIELD(51, 2) /* index 96 */, | ||
1911 | TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, CHILD(101), | ||
1912 | BITFIELD(53, 2) /* index 101 */, | ||
1913 | TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, CHILD(106), | ||
1914 | BITFIELD(55, 1) /* index 106 */, | ||
1915 | TILEGX_OPC_LD4U, TILEGX_OPC_PREFETCH_L3, | ||
1916 | BITFIELD(26, 1) /* index 109 */, | ||
1917 | CHILD(112), CHILD(115), | ||
1918 | BITFIELD(57, 1) /* index 112 */, | ||
1919 | TILEGX_OPC_ST1, TILEGX_OPC_ST4, | ||
1920 | BITFIELD(57, 1) /* index 115 */, | ||
1921 | TILEGX_OPC_ST2, TILEGX_OPC_ST, | ||
1922 | }; | ||
1923 | |||
1924 | #undef BITFIELD | ||
1925 | #undef CHILD | ||
1926 | const unsigned short * const | ||
1927 | tilegx_bundle_decoder_fsms[TILEGX_NUM_PIPELINE_ENCODINGS] = | ||
1928 | { | ||
1929 | decode_X0_fsm, | ||
1930 | decode_X1_fsm, | ||
1931 | decode_Y0_fsm, | ||
1932 | decode_Y1_fsm, | ||
1933 | decode_Y2_fsm | ||
1934 | }; | ||
1935 | const struct tilegx_operand tilegx_operands[35] = | ||
1936 | { | ||
1937 | { | ||
1938 | TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_IMM8_X0), | ||
1939 | 8, 1, 0, 0, 0, 0, | ||
1940 | create_Imm8_X0, get_Imm8_X0 | ||
1941 | }, | ||
1942 | { | ||
1943 | TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_IMM8_X1), | ||
1944 | 8, 1, 0, 0, 0, 0, | ||
1945 | create_Imm8_X1, get_Imm8_X1 | ||
1946 | }, | ||
1947 | { | ||
1948 | TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_IMM8_Y0), | ||
1949 | 8, 1, 0, 0, 0, 0, | ||
1950 | create_Imm8_Y0, get_Imm8_Y0 | ||
1951 | }, | ||
1952 | { | ||
1953 | TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_IMM8_Y1), | ||
1954 | 8, 1, 0, 0, 0, 0, | ||
1955 | create_Imm8_Y1, get_Imm8_Y1 | ||
1956 | }, | ||
1957 | { | ||
1958 | TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_IMM16_X0_HW0_LAST), | ||
1959 | 16, 1, 0, 0, 0, 0, | ||
1960 | create_Imm16_X0, get_Imm16_X0 | ||
1961 | }, | ||
1962 | { | ||
1963 | TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_IMM16_X1_HW0_LAST), | ||
1964 | 16, 1, 0, 0, 0, 0, | ||
1965 | create_Imm16_X1, get_Imm16_X1 | ||
1966 | }, | ||
1967 | { | ||
1968 | TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), | ||
1969 | 6, 0, 0, 1, 0, 0, | ||
1970 | create_Dest_X0, get_Dest_X0 | ||
1971 | }, | ||
1972 | { | ||
1973 | TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), | ||
1974 | 6, 0, 1, 0, 0, 0, | ||
1975 | create_SrcA_X0, get_SrcA_X0 | ||
1976 | }, | ||
1977 | { | ||
1978 | TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), | ||
1979 | 6, 0, 0, 1, 0, 0, | ||
1980 | create_Dest_X1, get_Dest_X1 | ||
1981 | }, | ||
1982 | { | ||
1983 | TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), | ||
1984 | 6, 0, 1, 0, 0, 0, | ||
1985 | create_SrcA_X1, get_SrcA_X1 | ||
1986 | }, | ||
1987 | { | ||
1988 | TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), | ||
1989 | 6, 0, 0, 1, 0, 0, | ||
1990 | create_Dest_Y0, get_Dest_Y0 | ||
1991 | }, | ||
1992 | { | ||
1993 | TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), | ||
1994 | 6, 0, 1, 0, 0, 0, | ||
1995 | create_SrcA_Y0, get_SrcA_Y0 | ||
1996 | }, | ||
1997 | { | ||
1998 | TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), | ||
1999 | 6, 0, 0, 1, 0, 0, | ||
2000 | create_Dest_Y1, get_Dest_Y1 | ||
2001 | }, | ||
2002 | { | ||
2003 | TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), | ||
2004 | 6, 0, 1, 0, 0, 0, | ||
2005 | create_SrcA_Y1, get_SrcA_Y1 | ||
2006 | }, | ||
2007 | { | ||
2008 | TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), | ||
2009 | 6, 0, 1, 0, 0, 0, | ||
2010 | create_SrcA_Y2, get_SrcA_Y2 | ||
2011 | }, | ||
2012 | { | ||
2013 | TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), | ||
2014 | 6, 0, 1, 1, 0, 0, | ||
2015 | create_SrcA_X1, get_SrcA_X1 | ||
2016 | }, | ||
2017 | { | ||
2018 | TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), | ||
2019 | 6, 0, 1, 0, 0, 0, | ||
2020 | create_SrcB_X0, get_SrcB_X0 | ||
2021 | }, | ||
2022 | { | ||
2023 | TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), | ||
2024 | 6, 0, 1, 0, 0, 0, | ||
2025 | create_SrcB_X1, get_SrcB_X1 | ||
2026 | }, | ||
2027 | { | ||
2028 | TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), | ||
2029 | 6, 0, 1, 0, 0, 0, | ||
2030 | create_SrcB_Y0, get_SrcB_Y0 | ||
2031 | }, | ||
2032 | { | ||
2033 | TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), | ||
2034 | 6, 0, 1, 0, 0, 0, | ||
2035 | create_SrcB_Y1, get_SrcB_Y1 | ||
2036 | }, | ||
2037 | { | ||
2038 | TILEGX_OP_TYPE_ADDRESS, BFD_RELOC(TILEGX_BROFF_X1), | ||
2039 | 17, 1, 0, 0, 1, TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES, | ||
2040 | create_BrOff_X1, get_BrOff_X1 | ||
2041 | }, | ||
2042 | { | ||
2043 | TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(NONE), | ||
2044 | 6, 0, 0, 0, 0, 0, | ||
2045 | create_BFStart_X0, get_BFStart_X0 | ||
2046 | }, | ||
2047 | { | ||
2048 | TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(NONE), | ||
2049 | 6, 0, 0, 0, 0, 0, | ||
2050 | create_BFEnd_X0, get_BFEnd_X0 | ||
2051 | }, | ||
2052 | { | ||
2053 | TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), | ||
2054 | 6, 0, 1, 1, 0, 0, | ||
2055 | create_Dest_X0, get_Dest_X0 | ||
2056 | }, | ||
2057 | { | ||
2058 | TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), | ||
2059 | 6, 0, 1, 1, 0, 0, | ||
2060 | create_Dest_Y0, get_Dest_Y0 | ||
2061 | }, | ||
2062 | { | ||
2063 | TILEGX_OP_TYPE_ADDRESS, BFD_RELOC(TILEGX_JUMPOFF_X1), | ||
2064 | 27, 1, 0, 0, 1, TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES, | ||
2065 | create_JumpOff_X1, get_JumpOff_X1 | ||
2066 | }, | ||
2067 | { | ||
2068 | TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), | ||
2069 | 6, 0, 0, 1, 0, 0, | ||
2070 | create_SrcBDest_Y2, get_SrcBDest_Y2 | ||
2071 | }, | ||
2072 | { | ||
2073 | TILEGX_OP_TYPE_SPR, BFD_RELOC(TILEGX_MF_IMM14_X1), | ||
2074 | 14, 0, 0, 0, 0, 0, | ||
2075 | create_MF_Imm14_X1, get_MF_Imm14_X1 | ||
2076 | }, | ||
2077 | { | ||
2078 | TILEGX_OP_TYPE_SPR, BFD_RELOC(TILEGX_MT_IMM14_X1), | ||
2079 | 14, 0, 0, 0, 0, 0, | ||
2080 | create_MT_Imm14_X1, get_MT_Imm14_X1 | ||
2081 | }, | ||
2082 | { | ||
2083 | TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_SHAMT_X0), | ||
2084 | 6, 0, 0, 0, 0, 0, | ||
2085 | create_ShAmt_X0, get_ShAmt_X0 | ||
2086 | }, | ||
2087 | { | ||
2088 | TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_SHAMT_X1), | ||
2089 | 6, 0, 0, 0, 0, 0, | ||
2090 | create_ShAmt_X1, get_ShAmt_X1 | ||
2091 | }, | ||
2092 | { | ||
2093 | TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_SHAMT_Y0), | ||
2094 | 6, 0, 0, 0, 0, 0, | ||
2095 | create_ShAmt_Y0, get_ShAmt_Y0 | ||
2096 | }, | ||
2097 | { | ||
2098 | TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_SHAMT_Y1), | ||
2099 | 6, 0, 0, 0, 0, 0, | ||
2100 | create_ShAmt_Y1, get_ShAmt_Y1 | ||
2101 | }, | ||
2102 | { | ||
2103 | TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE), | ||
2104 | 6, 0, 1, 0, 0, 0, | ||
2105 | create_SrcBDest_Y2, get_SrcBDest_Y2 | ||
2106 | }, | ||
2107 | { | ||
2108 | TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_DEST_IMM8_X1), | ||
2109 | 8, 1, 0, 0, 0, 0, | ||
2110 | create_Dest_Imm8_X1, get_Dest_Imm8_X1 | ||
2111 | } | ||
2112 | }; | ||
2113 | |||
2114 | |||
2115 | |||
2116 | |||
2117 | /* Given a set of bundle bits and the lookup FSM for a specific pipe, | ||
2118 | * returns which instruction the bundle contains in that pipe. | ||
2119 | */ | ||
2120 | static const struct tilegx_opcode * | ||
2121 | find_opcode(tilegx_bundle_bits bits, const unsigned short *table) | ||
2122 | { | ||
2123 | int index = 0; | ||
2124 | |||
2125 | while (1) | ||
2126 | { | ||
2127 | unsigned short bitspec = table[index]; | ||
2128 | unsigned int bitfield = | ||
2129 | ((unsigned int)(bits >> (bitspec & 63))) & (bitspec >> 6); | ||
2130 | |||
2131 | unsigned short next = table[index + 1 + bitfield]; | ||
2132 | if (next <= TILEGX_OPC_NONE) | ||
2133 | return &tilegx_opcodes[next]; | ||
2134 | |||
2135 | index = next - TILEGX_OPC_NONE; | ||
2136 | } | ||
2137 | } | ||
2138 | |||
2139 | |||
2140 | int | ||
2141 | parse_insn_tilegx(tilegx_bundle_bits bits, | ||
2142 | unsigned long long pc, | ||
2143 | struct tilegx_decoded_instruction | ||
2144 | decoded[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE]) | ||
2145 | { | ||
2146 | int num_instructions = 0; | ||
2147 | int pipe; | ||
2148 | |||
2149 | int min_pipe, max_pipe; | ||
2150 | if ((bits & TILEGX_BUNDLE_MODE_MASK) == 0) | ||
2151 | { | ||
2152 | min_pipe = TILEGX_PIPELINE_X0; | ||
2153 | max_pipe = TILEGX_PIPELINE_X1; | ||
2154 | } | ||
2155 | else | ||
2156 | { | ||
2157 | min_pipe = TILEGX_PIPELINE_Y0; | ||
2158 | max_pipe = TILEGX_PIPELINE_Y2; | ||
2159 | } | ||
2160 | |||
2161 | /* For each pipe, find an instruction that fits. */ | ||
2162 | for (pipe = min_pipe; pipe <= max_pipe; pipe++) | ||
2163 | { | ||
2164 | const struct tilegx_opcode *opc; | ||
2165 | struct tilegx_decoded_instruction *d; | ||
2166 | int i; | ||
2167 | |||
2168 | d = &decoded[num_instructions++]; | ||
2169 | opc = find_opcode (bits, tilegx_bundle_decoder_fsms[pipe]); | ||
2170 | d->opcode = opc; | ||
2171 | |||
2172 | /* Decode each operand, sign extending, etc. as appropriate. */ | ||
2173 | for (i = 0; i < opc->num_operands; i++) | ||
2174 | { | ||
2175 | const struct tilegx_operand *op = | ||
2176 | &tilegx_operands[opc->operands[pipe][i]]; | ||
2177 | int raw_opval = op->extract (bits); | ||
2178 | long long opval; | ||
2179 | |||
2180 | if (op->is_signed) | ||
2181 | { | ||
2182 | /* Sign-extend the operand. */ | ||
2183 | int shift = (int)((sizeof(int) * 8) - op->num_bits); | ||
2184 | raw_opval = (raw_opval << shift) >> shift; | ||
2185 | } | ||
2186 | |||
2187 | /* Adjust PC-relative scaled branch offsets. */ | ||
2188 | if (op->type == TILEGX_OP_TYPE_ADDRESS) | ||
2189 | opval = (raw_opval * TILEGX_BUNDLE_SIZE_IN_BYTES) + pc; | ||
2190 | else | ||
2191 | opval = raw_opval; | ||
2192 | |||
2193 | /* Record the final value. */ | ||
2194 | d->operands[i] = op; | ||
2195 | d->operand_values[i] = opval; | ||
2196 | } | ||
2197 | } | ||
2198 | |||
2199 | return num_instructions; | ||
2200 | } | ||