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-rw-r--r--arch/tile/kernel/pci.c206
1 files changed, 116 insertions, 90 deletions
diff --git a/arch/tile/kernel/pci.c b/arch/tile/kernel/pci.c
index ea38f0c9ec7c..6d4cb5d7a9fd 100644
--- a/arch/tile/kernel/pci.c
+++ b/arch/tile/kernel/pci.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright 2010 Tilera Corporation. All Rights Reserved. 2 * Copyright 2011 Tilera Corporation. All Rights Reserved.
3 * 3 *
4 * This program is free software; you can redistribute it and/or 4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License 5 * modify it under the terms of the GNU General Public License
@@ -59,6 +59,7 @@ int __write_once tile_plx_gen1;
59 59
60static struct pci_controller controllers[TILE_NUM_PCIE]; 60static struct pci_controller controllers[TILE_NUM_PCIE];
61static int num_controllers; 61static int num_controllers;
62static int pci_scan_flags[TILE_NUM_PCIE];
62 63
63static struct pci_ops tile_cfg_ops; 64static struct pci_ops tile_cfg_ops;
64 65
@@ -79,7 +80,7 @@ EXPORT_SYMBOL(pcibios_align_resource);
79 * controller_id is the controller number, config type is 0 or 1 for 80 * controller_id is the controller number, config type is 0 or 1 for
80 * config0 or config1 operations. 81 * config0 or config1 operations.
81 */ 82 */
82static int __init tile_pcie_open(int controller_id, int config_type) 83static int __devinit tile_pcie_open(int controller_id, int config_type)
83{ 84{
84 char filename[32]; 85 char filename[32];
85 int fd; 86 int fd;
@@ -95,7 +96,7 @@ static int __init tile_pcie_open(int controller_id, int config_type)
95/* 96/*
96 * Get the IRQ numbers from the HV and set up the handlers for them. 97 * Get the IRQ numbers from the HV and set up the handlers for them.
97 */ 98 */
98static int __init tile_init_irqs(int controller_id, 99static int __devinit tile_init_irqs(int controller_id,
99 struct pci_controller *controller) 100 struct pci_controller *controller)
100{ 101{
101 char filename[32]; 102 char filename[32];
@@ -139,71 +140,74 @@ static int __init tile_init_irqs(int controller_id,
139 * 140 *
140 * Returns the number of controllers discovered. 141 * Returns the number of controllers discovered.
141 */ 142 */
142int __init tile_pci_init(void) 143int __devinit tile_pci_init(void)
143{ 144{
144 int i; 145 int i;
145 146
146 pr_info("PCI: Searching for controllers...\n"); 147 pr_info("PCI: Searching for controllers...\n");
147 148
149 /* Re-init number of PCIe controllers to support hot-plug feature. */
150 num_controllers = 0;
151
148 /* Do any configuration we need before using the PCIe */ 152 /* Do any configuration we need before using the PCIe */
149 153
150 for (i = 0; i < TILE_NUM_PCIE; i++) { 154 for (i = 0; i < TILE_NUM_PCIE; i++) {
151 int hv_cfg_fd0 = -1;
152 int hv_cfg_fd1 = -1;
153 int hv_mem_fd = -1;
154 char name[32];
155 struct pci_controller *controller;
156
157 /* 155 /*
158 * Open the fd to the HV. If it fails then this 156 * To see whether we need a real config op based on
159 * device doesn't exist. 157 * the results of pcibios_init(), to support PCIe hot-plug.
160 */ 158 */
161 hv_cfg_fd0 = tile_pcie_open(i, 0); 159 if (pci_scan_flags[i] == 0) {
162 if (hv_cfg_fd0 < 0) 160 int hv_cfg_fd0 = -1;
163 continue; 161 int hv_cfg_fd1 = -1;
164 hv_cfg_fd1 = tile_pcie_open(i, 1); 162 int hv_mem_fd = -1;
165 if (hv_cfg_fd1 < 0) { 163 char name[32];
166 pr_err("PCI: Couldn't open config fd to HV " 164 struct pci_controller *controller;
167 "for controller %d\n", i); 165
168 goto err_cont; 166 /*
169 } 167 * Open the fd to the HV. If it fails then this
170 168 * device doesn't exist.
171 sprintf(name, "pcie/%d/mem", i); 169 */
172 hv_mem_fd = hv_dev_open((HV_VirtAddr)name, 0); 170 hv_cfg_fd0 = tile_pcie_open(i, 0);
173 if (hv_mem_fd < 0) { 171 if (hv_cfg_fd0 < 0)
174 pr_err("PCI: Could not open mem fd to HV!\n"); 172 continue;
175 goto err_cont; 173 hv_cfg_fd1 = tile_pcie_open(i, 1);
176 } 174 if (hv_cfg_fd1 < 0) {
175 pr_err("PCI: Couldn't open config fd to HV "
176 "for controller %d\n", i);
177 goto err_cont;
178 }
177 179
178 pr_info("PCI: Found PCI controller #%d\n", i); 180 sprintf(name, "pcie/%d/mem", i);
181 hv_mem_fd = hv_dev_open((HV_VirtAddr)name, 0);
182 if (hv_mem_fd < 0) {
183 pr_err("PCI: Could not open mem fd to HV!\n");
184 goto err_cont;
185 }
179 186
180 controller = &controllers[num_controllers]; 187 pr_info("PCI: Found PCI controller #%d\n", i);
181 188
182 if (tile_init_irqs(i, controller)) { 189 controller = &controllers[i];
183 pr_err("PCI: Could not initialize "
184 "IRQs, aborting.\n");
185 goto err_cont;
186 }
187 190
188 controller->index = num_controllers; 191 controller->index = i;
189 controller->hv_cfg_fd[0] = hv_cfg_fd0; 192 controller->hv_cfg_fd[0] = hv_cfg_fd0;
190 controller->hv_cfg_fd[1] = hv_cfg_fd1; 193 controller->hv_cfg_fd[1] = hv_cfg_fd1;
191 controller->hv_mem_fd = hv_mem_fd; 194 controller->hv_mem_fd = hv_mem_fd;
192 controller->first_busno = 0; 195 controller->first_busno = 0;
193 controller->last_busno = 0xff; 196 controller->last_busno = 0xff;
194 controller->ops = &tile_cfg_ops; 197 controller->ops = &tile_cfg_ops;
195 198
196 num_controllers++; 199 num_controllers++;
197 continue; 200 continue;
198 201
199err_cont: 202err_cont:
200 if (hv_cfg_fd0 >= 0) 203 if (hv_cfg_fd0 >= 0)
201 hv_dev_close(hv_cfg_fd0); 204 hv_dev_close(hv_cfg_fd0);
202 if (hv_cfg_fd1 >= 0) 205 if (hv_cfg_fd1 >= 0)
203 hv_dev_close(hv_cfg_fd1); 206 hv_dev_close(hv_cfg_fd1);
204 if (hv_mem_fd >= 0) 207 if (hv_mem_fd >= 0)
205 hv_dev_close(hv_mem_fd); 208 hv_dev_close(hv_mem_fd);
206 continue; 209 continue;
210 }
207 } 211 }
208 212
209 /* 213 /*
@@ -232,7 +236,7 @@ static int tile_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
232} 236}
233 237
234 238
235static void __init fixup_read_and_payload_sizes(void) 239static void __devinit fixup_read_and_payload_sizes(void)
236{ 240{
237 struct pci_dev *dev = NULL; 241 struct pci_dev *dev = NULL;
238 int smallest_max_payload = 0x1; /* Tile maxes out at 256 bytes. */ 242 int smallest_max_payload = 0x1; /* Tile maxes out at 256 bytes. */
@@ -282,7 +286,7 @@ static void __init fixup_read_and_payload_sizes(void)
282 * The controllers have been set up by the time we get here, by a call to 286 * The controllers have been set up by the time we get here, by a call to
283 * tile_pci_init. 287 * tile_pci_init.
284 */ 288 */
285static int __init pcibios_init(void) 289int __devinit pcibios_init(void)
286{ 290{
287 int i; 291 int i;
288 292
@@ -296,25 +300,36 @@ static int __init pcibios_init(void)
296 mdelay(250); 300 mdelay(250);
297 301
298 /* Scan all of the recorded PCI controllers. */ 302 /* Scan all of the recorded PCI controllers. */
299 for (i = 0; i < num_controllers; i++) { 303 for (i = 0; i < TILE_NUM_PCIE; i++) {
300 struct pci_controller *controller = &controllers[i];
301 struct pci_bus *bus;
302
303 pr_info("PCI: initializing controller #%d\n", i);
304
305 /* 304 /*
306 * This comes from the generic Linux PCI driver. 305 * Do real pcibios init ops if the controller is initialized
307 * 306 * by tile_pci_init() successfully and not initialized by
308 * It reads the PCI tree for this bus into the Linux 307 * pcibios_init() yet to support PCIe hot-plug.
309 * data structures.
310 *
311 * This is inlined in linux/pci.h and calls into
312 * pci_scan_bus_parented() in probe.c.
313 */ 308 */
314 bus = pci_scan_bus(0, controller->ops, controller); 309 if (pci_scan_flags[i] == 0 && controllers[i].ops != NULL) {
315 controller->root_bus = bus; 310 struct pci_controller *controller = &controllers[i];
316 controller->last_busno = bus->subordinate; 311 struct pci_bus *bus;
317 312
313 if (tile_init_irqs(i, controller)) {
314 pr_err("PCI: Could not initialize IRQs\n");
315 continue;
316 }
317
318 pr_info("PCI: initializing controller #%d\n", i);
319
320 /*
321 * This comes from the generic Linux PCI driver.
322 *
323 * It reads the PCI tree for this bus into the Linux
324 * data structures.
325 *
326 * This is inlined in linux/pci.h and calls into
327 * pci_scan_bus_parented() in probe.c.
328 */
329 bus = pci_scan_bus(0, controller->ops, controller);
330 controller->root_bus = bus;
331 controller->last_busno = bus->subordinate;
332 }
318 } 333 }
319 334
320 /* Do machine dependent PCI interrupt routing */ 335 /* Do machine dependent PCI interrupt routing */
@@ -326,34 +341,45 @@ static int __init pcibios_init(void)
326 * It allocates all of the resources (I/O memory, etc) 341 * It allocates all of the resources (I/O memory, etc)
327 * associated with the devices read in above. 342 * associated with the devices read in above.
328 */ 343 */
329
330 pci_assign_unassigned_resources(); 344 pci_assign_unassigned_resources();
331 345
332 /* Configure the max_read_size and max_payload_size values. */ 346 /* Configure the max_read_size and max_payload_size values. */
333 fixup_read_and_payload_sizes(); 347 fixup_read_and_payload_sizes();
334 348
335 /* Record the I/O resources in the PCI controller structure. */ 349 /* Record the I/O resources in the PCI controller structure. */
336 for (i = 0; i < num_controllers; i++) { 350 for (i = 0; i < TILE_NUM_PCIE; i++) {
337 struct pci_bus *root_bus = controllers[i].root_bus; 351 /*
338 struct pci_bus *next_bus; 352 * Do real pcibios init ops if the controller is initialized
339 struct pci_dev *dev; 353 * by tile_pci_init() successfully and not initialized by
340 354 * pcibios_init() yet to support PCIe hot-plug.
341 list_for_each_entry(dev, &root_bus->devices, bus_list) { 355 */
342 /* Find the PCI host controller, ie. the 1st bridge. */ 356 if (pci_scan_flags[i] == 0 && controllers[i].ops != NULL) {
343 if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI && 357 struct pci_bus *root_bus = controllers[i].root_bus;
344 (PCI_SLOT(dev->devfn) == 0)) { 358 struct pci_bus *next_bus;
345 next_bus = dev->subordinate; 359 struct pci_dev *dev;
346 controllers[i].mem_resources[0] = 360
347 *next_bus->resource[0]; 361 list_for_each_entry(dev, &root_bus->devices, bus_list) {
348 controllers[i].mem_resources[1] = 362 /*
349 *next_bus->resource[1]; 363 * Find the PCI host controller, ie. the 1st
350 controllers[i].mem_resources[2] = 364 * bridge.
351 *next_bus->resource[2]; 365 */
352 366 if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI &&
353 break; 367 (PCI_SLOT(dev->devfn) == 0)) {
368 next_bus = dev->subordinate;
369 controllers[i].mem_resources[0] =
370 *next_bus->resource[0];
371 controllers[i].mem_resources[1] =
372 *next_bus->resource[1];
373 controllers[i].mem_resources[2] =
374 *next_bus->resource[2];
375
376 /* Setup flags. */
377 pci_scan_flags[i] = 1;
378
379 break;
380 }
354 } 381 }
355 } 382 }
356
357 } 383 }
358 384
359 return 0; 385 return 0;
@@ -381,7 +407,7 @@ char __devinit *pcibios_setup(char *str)
381/* 407/*
382 * This is called from the generic Linux layer. 408 * This is called from the generic Linux layer.
383 */ 409 */
384void __init pcibios_update_irq(struct pci_dev *dev, int irq) 410void __devinit pcibios_update_irq(struct pci_dev *dev, int irq)
385{ 411{
386 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq); 412 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
387} 413}