diff options
Diffstat (limited to 'arch/tile/kernel/head_32.S')
-rw-r--r-- | arch/tile/kernel/head_32.S | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/arch/tile/kernel/head_32.S b/arch/tile/kernel/head_32.S index 05b5f4d54d91..1a39b7c1c87e 100644 --- a/arch/tile/kernel/head_32.S +++ b/arch/tile/kernel/head_32.S | |||
@@ -145,7 +145,7 @@ ENTRY(empty_zero_page) | |||
145 | .endif | 145 | .endif |
146 | .word HV_PTE_PAGE | HV_PTE_DIRTY | HV_PTE_PRESENT | HV_PTE_ACCESSED | \ | 146 | .word HV_PTE_PAGE | HV_PTE_DIRTY | HV_PTE_PRESENT | HV_PTE_ACCESSED | \ |
147 | (HV_PTE_MODE_CACHE_NO_L3 << HV_PTE_INDEX_MODE) | 147 | (HV_PTE_MODE_CACHE_NO_L3 << HV_PTE_INDEX_MODE) |
148 | .word (\bits1) | (HV_CPA_TO_PFN(\cpa) << HV_PTE_INDEX_PFN) | 148 | .word (\bits1) | (HV_CPA_TO_PFN(\cpa) << (HV_PTE_INDEX_PFN - 32)) |
149 | .endm | 149 | .endm |
150 | 150 | ||
151 | __PAGE_ALIGNED_DATA | 151 | __PAGE_ALIGNED_DATA |
@@ -158,12 +158,14 @@ ENTRY(swapper_pg_dir) | |||
158 | */ | 158 | */ |
159 | .set addr, 0 | 159 | .set addr, 0 |
160 | .rept (MEM_USER_INTRPT - PAGE_OFFSET) >> PGDIR_SHIFT | 160 | .rept (MEM_USER_INTRPT - PAGE_OFFSET) >> PGDIR_SHIFT |
161 | PTE addr + PAGE_OFFSET, addr, HV_PTE_READABLE | HV_PTE_WRITABLE | 161 | PTE addr + PAGE_OFFSET, addr, (1 << (HV_PTE_INDEX_READABLE - 32)) | \ |
162 | (1 << (HV_PTE_INDEX_WRITABLE - 32)) | ||
162 | .set addr, addr + PGDIR_SIZE | 163 | .set addr, addr + PGDIR_SIZE |
163 | .endr | 164 | .endr |
164 | 165 | ||
165 | /* The true text VAs are mapped as VA = PA + MEM_SV_INTRPT */ | 166 | /* The true text VAs are mapped as VA = PA + MEM_SV_INTRPT */ |
166 | PTE MEM_SV_INTRPT, 0, HV_PTE_READABLE | HV_PTE_EXECUTABLE | 167 | PTE MEM_SV_INTRPT, 0, (1 << (HV_PTE_INDEX_READABLE - 32)) | \ |
168 | (1 << (HV_PTE_INDEX_EXECUTABLE - 32)) | ||
167 | .org swapper_pg_dir + HV_L1_SIZE | 169 | .org swapper_pg_dir + HV_L1_SIZE |
168 | END(swapper_pg_dir) | 170 | END(swapper_pg_dir) |
169 | 171 | ||
@@ -176,6 +178,7 @@ ENTRY(swapper_pg_dir) | |||
176 | __INITDATA | 178 | __INITDATA |
177 | .align CHIP_L2_LINE_SIZE() | 179 | .align CHIP_L2_LINE_SIZE() |
178 | ENTRY(swapper_pgprot) | 180 | ENTRY(swapper_pgprot) |
179 | PTE 0, 0, HV_PTE_READABLE | HV_PTE_WRITABLE, 1 | 181 | PTE 0, 0, (1 << (HV_PTE_INDEX_READABLE - 32)) | \ |
182 | (1 << (HV_PTE_INDEX_WRITABLE - 32)), 1 | ||
180 | .align CHIP_L2_LINE_SIZE() | 183 | .align CHIP_L2_LINE_SIZE() |
181 | END(swapper_pgprot) | 184 | END(swapper_pgprot) |