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-rw-r--r--arch/tile/include/asm/io.h3
-rw-r--r--arch/tile/include/asm/pci.h9
2 files changed, 3 insertions, 9 deletions
diff --git a/arch/tile/include/asm/io.h b/arch/tile/include/asm/io.h
index c9ea1652af03..d2152deb1f3c 100644
--- a/arch/tile/include/asm/io.h
+++ b/arch/tile/include/asm/io.h
@@ -204,7 +204,8 @@ static inline long ioport_panic(void)
204 204
205static inline void __iomem *ioport_map(unsigned long port, unsigned int len) 205static inline void __iomem *ioport_map(unsigned long port, unsigned int len)
206{ 206{
207 return (void __iomem *) ioport_panic(); 207 pr_info("ioport_map: mapping IO resources is unsupported on tile.\n");
208 return NULL;
208} 209}
209 210
210static inline void ioport_unmap(void __iomem *addr) 211static inline void ioport_unmap(void __iomem *addr)
diff --git a/arch/tile/include/asm/pci.h b/arch/tile/include/asm/pci.h
index 7f03cefed1b9..5d5a635530bd 100644
--- a/arch/tile/include/asm/pci.h
+++ b/arch/tile/include/asm/pci.h
@@ -16,6 +16,7 @@
16#define _ASM_TILE_PCI_H 16#define _ASM_TILE_PCI_H
17 17
18#include <linux/pci.h> 18#include <linux/pci.h>
19#include <asm-generic/pci_iomap.h>
19 20
20/* 21/*
21 * Structure of a PCI controller (host bridge) 22 * Structure of a PCI controller (host bridge)
@@ -49,7 +50,6 @@ struct pci_controller {
49int __devinit tile_pci_init(void); 50int __devinit tile_pci_init(void);
50int __devinit pcibios_init(void); 51int __devinit pcibios_init(void);
51 52
52void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
53static inline void pci_iounmap(struct pci_dev *dev, void __iomem *addr) {} 53static inline void pci_iounmap(struct pci_dev *dev, void __iomem *addr) {}
54 54
55void __devinit pcibios_fixup_bus(struct pci_bus *bus); 55void __devinit pcibios_fixup_bus(struct pci_bus *bus);
@@ -76,13 +76,6 @@ static inline int pcibios_assign_all_busses(void)
76 return 1; 76 return 1;
77} 77}
78 78
79/*
80 * No special bus mastering setup handling.
81 */
82static inline void pcibios_set_master(struct pci_dev *dev)
83{
84}
85
86#define PCIBIOS_MIN_MEM 0 79#define PCIBIOS_MIN_MEM 0
87#define PCIBIOS_MIN_IO 0 80#define PCIBIOS_MIN_IO 0
88 81