diff options
Diffstat (limited to 'arch/tile/include/asm/opcode-tile_64.h')
-rw-r--r-- | arch/tile/include/asm/opcode-tile_64.h | 1507 |
1 files changed, 621 insertions, 886 deletions
diff --git a/arch/tile/include/asm/opcode-tile_64.h b/arch/tile/include/asm/opcode-tile_64.h index 03df7b1e77bf..c0633466cd5c 100644 --- a/arch/tile/include/asm/opcode-tile_64.h +++ b/arch/tile/include/asm/opcode-tile_64.h | |||
@@ -5,863 +5,711 @@ | |||
5 | #ifndef opcode_tile_h | 5 | #ifndef opcode_tile_h |
6 | #define opcode_tile_h | 6 | #define opcode_tile_h |
7 | 7 | ||
8 | typedef unsigned long long tile_bundle_bits; | 8 | typedef unsigned long long tilegx_bundle_bits; |
9 | 9 | ||
10 | 10 | ||
11 | enum | 11 | enum |
12 | { | 12 | { |
13 | TILE_MAX_OPERANDS = 5 /* mm */ | 13 | TILEGX_MAX_OPERANDS = 4 /* bfexts */ |
14 | }; | 14 | }; |
15 | 15 | ||
16 | typedef enum | 16 | typedef enum |
17 | { | 17 | { |
18 | TILE_OPC_BPT, | 18 | TILEGX_OPC_BPT, |
19 | TILE_OPC_INFO, | 19 | TILEGX_OPC_INFO, |
20 | TILE_OPC_INFOL, | 20 | TILEGX_OPC_INFOL, |
21 | TILE_OPC_J, | 21 | TILEGX_OPC_MOVE, |
22 | TILE_OPC_JAL, | 22 | TILEGX_OPC_MOVEI, |
23 | TILE_OPC_MOVE, | 23 | TILEGX_OPC_MOVELI, |
24 | TILE_OPC_MOVE_SN, | 24 | TILEGX_OPC_PREFETCH, |
25 | TILE_OPC_MOVEI, | 25 | TILEGX_OPC_PREFETCH_ADD_L1, |
26 | TILE_OPC_MOVEI_SN, | 26 | TILEGX_OPC_PREFETCH_ADD_L1_FAULT, |
27 | TILE_OPC_MOVELI, | 27 | TILEGX_OPC_PREFETCH_ADD_L2, |
28 | TILE_OPC_MOVELI_SN, | 28 | TILEGX_OPC_PREFETCH_ADD_L2_FAULT, |
29 | TILE_OPC_MOVELIS, | 29 | TILEGX_OPC_PREFETCH_ADD_L3, |
30 | TILE_OPC_PREFETCH, | 30 | TILEGX_OPC_PREFETCH_ADD_L3_FAULT, |
31 | TILE_OPC_RAISE, | 31 | TILEGX_OPC_PREFETCH_L1, |
32 | TILE_OPC_ADD, | 32 | TILEGX_OPC_PREFETCH_L1_FAULT, |
33 | TILE_OPC_ADD_SN, | 33 | TILEGX_OPC_PREFETCH_L2, |
34 | TILE_OPC_ADDB, | 34 | TILEGX_OPC_PREFETCH_L2_FAULT, |
35 | TILE_OPC_ADDB_SN, | 35 | TILEGX_OPC_PREFETCH_L3, |
36 | TILE_OPC_ADDBS_U, | 36 | TILEGX_OPC_PREFETCH_L3_FAULT, |
37 | TILE_OPC_ADDBS_U_SN, | 37 | TILEGX_OPC_RAISE, |
38 | TILE_OPC_ADDH, | 38 | TILEGX_OPC_ADD, |
39 | TILE_OPC_ADDH_SN, | 39 | TILEGX_OPC_ADDI, |
40 | TILE_OPC_ADDHS, | 40 | TILEGX_OPC_ADDLI, |
41 | TILE_OPC_ADDHS_SN, | 41 | TILEGX_OPC_ADDX, |
42 | TILE_OPC_ADDI, | 42 | TILEGX_OPC_ADDXI, |
43 | TILE_OPC_ADDI_SN, | 43 | TILEGX_OPC_ADDXLI, |
44 | TILE_OPC_ADDIB, | 44 | TILEGX_OPC_ADDXSC, |
45 | TILE_OPC_ADDIB_SN, | 45 | TILEGX_OPC_AND, |
46 | TILE_OPC_ADDIH, | 46 | TILEGX_OPC_ANDI, |
47 | TILE_OPC_ADDIH_SN, | 47 | TILEGX_OPC_BEQZ, |
48 | TILE_OPC_ADDLI, | 48 | TILEGX_OPC_BEQZT, |
49 | TILE_OPC_ADDLI_SN, | 49 | TILEGX_OPC_BFEXTS, |
50 | TILE_OPC_ADDLIS, | 50 | TILEGX_OPC_BFEXTU, |
51 | TILE_OPC_ADDS, | 51 | TILEGX_OPC_BFINS, |
52 | TILE_OPC_ADDS_SN, | 52 | TILEGX_OPC_BGEZ, |
53 | TILE_OPC_ADIFFB_U, | 53 | TILEGX_OPC_BGEZT, |
54 | TILE_OPC_ADIFFB_U_SN, | 54 | TILEGX_OPC_BGTZ, |
55 | TILE_OPC_ADIFFH, | 55 | TILEGX_OPC_BGTZT, |
56 | TILE_OPC_ADIFFH_SN, | 56 | TILEGX_OPC_BLBC, |
57 | TILE_OPC_AND, | 57 | TILEGX_OPC_BLBCT, |
58 | TILE_OPC_AND_SN, | 58 | TILEGX_OPC_BLBS, |
59 | TILE_OPC_ANDI, | 59 | TILEGX_OPC_BLBST, |
60 | TILE_OPC_ANDI_SN, | 60 | TILEGX_OPC_BLEZ, |
61 | TILE_OPC_AULI, | 61 | TILEGX_OPC_BLEZT, |
62 | TILE_OPC_AVGB_U, | 62 | TILEGX_OPC_BLTZ, |
63 | TILE_OPC_AVGB_U_SN, | 63 | TILEGX_OPC_BLTZT, |
64 | TILE_OPC_AVGH, | 64 | TILEGX_OPC_BNEZ, |
65 | TILE_OPC_AVGH_SN, | 65 | TILEGX_OPC_BNEZT, |
66 | TILE_OPC_BBNS, | 66 | TILEGX_OPC_CLZ, |
67 | TILE_OPC_BBNS_SN, | 67 | TILEGX_OPC_CMOVEQZ, |
68 | TILE_OPC_BBNST, | 68 | TILEGX_OPC_CMOVNEZ, |
69 | TILE_OPC_BBNST_SN, | 69 | TILEGX_OPC_CMPEQ, |
70 | TILE_OPC_BBS, | 70 | TILEGX_OPC_CMPEQI, |
71 | TILE_OPC_BBS_SN, | 71 | TILEGX_OPC_CMPEXCH, |
72 | TILE_OPC_BBST, | 72 | TILEGX_OPC_CMPEXCH4, |
73 | TILE_OPC_BBST_SN, | 73 | TILEGX_OPC_CMPLES, |
74 | TILE_OPC_BGEZ, | 74 | TILEGX_OPC_CMPLEU, |
75 | TILE_OPC_BGEZ_SN, | 75 | TILEGX_OPC_CMPLTS, |
76 | TILE_OPC_BGEZT, | 76 | TILEGX_OPC_CMPLTSI, |
77 | TILE_OPC_BGEZT_SN, | 77 | TILEGX_OPC_CMPLTU, |
78 | TILE_OPC_BGZ, | 78 | TILEGX_OPC_CMPLTUI, |
79 | TILE_OPC_BGZ_SN, | 79 | TILEGX_OPC_CMPNE, |
80 | TILE_OPC_BGZT, | 80 | TILEGX_OPC_CMUL, |
81 | TILE_OPC_BGZT_SN, | 81 | TILEGX_OPC_CMULA, |
82 | TILE_OPC_BITX, | 82 | TILEGX_OPC_CMULAF, |
83 | TILE_OPC_BITX_SN, | 83 | TILEGX_OPC_CMULF, |
84 | TILE_OPC_BLEZ, | 84 | TILEGX_OPC_CMULFR, |
85 | TILE_OPC_BLEZ_SN, | 85 | TILEGX_OPC_CMULH, |
86 | TILE_OPC_BLEZT, | 86 | TILEGX_OPC_CMULHR, |
87 | TILE_OPC_BLEZT_SN, | 87 | TILEGX_OPC_CRC32_32, |
88 | TILE_OPC_BLZ, | 88 | TILEGX_OPC_CRC32_8, |
89 | TILE_OPC_BLZ_SN, | 89 | TILEGX_OPC_CTZ, |
90 | TILE_OPC_BLZT, | 90 | TILEGX_OPC_DBLALIGN, |
91 | TILE_OPC_BLZT_SN, | 91 | TILEGX_OPC_DBLALIGN2, |
92 | TILE_OPC_BNZ, | 92 | TILEGX_OPC_DBLALIGN4, |
93 | TILE_OPC_BNZ_SN, | 93 | TILEGX_OPC_DBLALIGN6, |
94 | TILE_OPC_BNZT, | 94 | TILEGX_OPC_DRAIN, |
95 | TILE_OPC_BNZT_SN, | 95 | TILEGX_OPC_DTLBPR, |
96 | TILE_OPC_BYTEX, | 96 | TILEGX_OPC_EXCH, |
97 | TILE_OPC_BYTEX_SN, | 97 | TILEGX_OPC_EXCH4, |
98 | TILE_OPC_BZ, | 98 | TILEGX_OPC_FDOUBLE_ADD_FLAGS, |
99 | TILE_OPC_BZ_SN, | 99 | TILEGX_OPC_FDOUBLE_ADDSUB, |
100 | TILE_OPC_BZT, | 100 | TILEGX_OPC_FDOUBLE_MUL_FLAGS, |
101 | TILE_OPC_BZT_SN, | 101 | TILEGX_OPC_FDOUBLE_PACK1, |
102 | TILE_OPC_CLZ, | 102 | TILEGX_OPC_FDOUBLE_PACK2, |
103 | TILE_OPC_CLZ_SN, | 103 | TILEGX_OPC_FDOUBLE_SUB_FLAGS, |
104 | TILE_OPC_CRC32_32, | 104 | TILEGX_OPC_FDOUBLE_UNPACK_MAX, |
105 | TILE_OPC_CRC32_32_SN, | 105 | TILEGX_OPC_FDOUBLE_UNPACK_MIN, |
106 | TILE_OPC_CRC32_8, | 106 | TILEGX_OPC_FETCHADD, |
107 | TILE_OPC_CRC32_8_SN, | 107 | TILEGX_OPC_FETCHADD4, |
108 | TILE_OPC_CTZ, | 108 | TILEGX_OPC_FETCHADDGEZ, |
109 | TILE_OPC_CTZ_SN, | 109 | TILEGX_OPC_FETCHADDGEZ4, |
110 | TILE_OPC_DRAIN, | 110 | TILEGX_OPC_FETCHAND, |
111 | TILE_OPC_DTLBPR, | 111 | TILEGX_OPC_FETCHAND4, |
112 | TILE_OPC_DWORD_ALIGN, | 112 | TILEGX_OPC_FETCHOR, |
113 | TILE_OPC_DWORD_ALIGN_SN, | 113 | TILEGX_OPC_FETCHOR4, |
114 | TILE_OPC_FINV, | 114 | TILEGX_OPC_FINV, |
115 | TILE_OPC_FLUSH, | 115 | TILEGX_OPC_FLUSH, |
116 | TILE_OPC_FNOP, | 116 | TILEGX_OPC_FLUSHWB, |
117 | TILE_OPC_ICOH, | 117 | TILEGX_OPC_FNOP, |
118 | TILE_OPC_ILL, | 118 | TILEGX_OPC_FSINGLE_ADD1, |
119 | TILE_OPC_INTHB, | 119 | TILEGX_OPC_FSINGLE_ADDSUB2, |
120 | TILE_OPC_INTHB_SN, | 120 | TILEGX_OPC_FSINGLE_MUL1, |
121 | TILE_OPC_INTHH, | 121 | TILEGX_OPC_FSINGLE_MUL2, |
122 | TILE_OPC_INTHH_SN, | 122 | TILEGX_OPC_FSINGLE_PACK1, |
123 | TILE_OPC_INTLB, | 123 | TILEGX_OPC_FSINGLE_PACK2, |
124 | TILE_OPC_INTLB_SN, | 124 | TILEGX_OPC_FSINGLE_SUB1, |
125 | TILE_OPC_INTLH, | 125 | TILEGX_OPC_ICOH, |
126 | TILE_OPC_INTLH_SN, | 126 | TILEGX_OPC_ILL, |
127 | TILE_OPC_INV, | 127 | TILEGX_OPC_INV, |
128 | TILE_OPC_IRET, | 128 | TILEGX_OPC_IRET, |
129 | TILE_OPC_JALB, | 129 | TILEGX_OPC_J, |
130 | TILE_OPC_JALF, | 130 | TILEGX_OPC_JAL, |
131 | TILE_OPC_JALR, | 131 | TILEGX_OPC_JALR, |
132 | TILE_OPC_JALRP, | 132 | TILEGX_OPC_JALRP, |
133 | TILE_OPC_JB, | 133 | TILEGX_OPC_JR, |
134 | TILE_OPC_JF, | 134 | TILEGX_OPC_JRP, |
135 | TILE_OPC_JR, | 135 | TILEGX_OPC_LD, |
136 | TILE_OPC_JRP, | 136 | TILEGX_OPC_LD1S, |
137 | TILE_OPC_LB, | 137 | TILEGX_OPC_LD1S_ADD, |
138 | TILE_OPC_LB_SN, | 138 | TILEGX_OPC_LD1U, |
139 | TILE_OPC_LB_U, | 139 | TILEGX_OPC_LD1U_ADD, |
140 | TILE_OPC_LB_U_SN, | 140 | TILEGX_OPC_LD2S, |
141 | TILE_OPC_LBADD, | 141 | TILEGX_OPC_LD2S_ADD, |
142 | TILE_OPC_LBADD_SN, | 142 | TILEGX_OPC_LD2U, |
143 | TILE_OPC_LBADD_U, | 143 | TILEGX_OPC_LD2U_ADD, |
144 | TILE_OPC_LBADD_U_SN, | 144 | TILEGX_OPC_LD4S, |
145 | TILE_OPC_LH, | 145 | TILEGX_OPC_LD4S_ADD, |
146 | TILE_OPC_LH_SN, | 146 | TILEGX_OPC_LD4U, |
147 | TILE_OPC_LH_U, | 147 | TILEGX_OPC_LD4U_ADD, |
148 | TILE_OPC_LH_U_SN, | 148 | TILEGX_OPC_LD_ADD, |
149 | TILE_OPC_LHADD, | 149 | TILEGX_OPC_LDNA, |
150 | TILE_OPC_LHADD_SN, | 150 | TILEGX_OPC_LDNA_ADD, |
151 | TILE_OPC_LHADD_U, | 151 | TILEGX_OPC_LDNT, |
152 | TILE_OPC_LHADD_U_SN, | 152 | TILEGX_OPC_LDNT1S, |
153 | TILE_OPC_LNK, | 153 | TILEGX_OPC_LDNT1S_ADD, |
154 | TILE_OPC_LNK_SN, | 154 | TILEGX_OPC_LDNT1U, |
155 | TILE_OPC_LW, | 155 | TILEGX_OPC_LDNT1U_ADD, |
156 | TILE_OPC_LW_SN, | 156 | TILEGX_OPC_LDNT2S, |
157 | TILE_OPC_LW_NA, | 157 | TILEGX_OPC_LDNT2S_ADD, |
158 | TILE_OPC_LW_NA_SN, | 158 | TILEGX_OPC_LDNT2U, |
159 | TILE_OPC_LWADD, | 159 | TILEGX_OPC_LDNT2U_ADD, |
160 | TILE_OPC_LWADD_SN, | 160 | TILEGX_OPC_LDNT4S, |
161 | TILE_OPC_LWADD_NA, | 161 | TILEGX_OPC_LDNT4S_ADD, |
162 | TILE_OPC_LWADD_NA_SN, | 162 | TILEGX_OPC_LDNT4U, |
163 | TILE_OPC_MAXB_U, | 163 | TILEGX_OPC_LDNT4U_ADD, |
164 | TILE_OPC_MAXB_U_SN, | 164 | TILEGX_OPC_LDNT_ADD, |
165 | TILE_OPC_MAXH, | 165 | TILEGX_OPC_LNK, |
166 | TILE_OPC_MAXH_SN, | 166 | TILEGX_OPC_MF, |
167 | TILE_OPC_MAXIB_U, | 167 | TILEGX_OPC_MFSPR, |
168 | TILE_OPC_MAXIB_U_SN, | 168 | TILEGX_OPC_MM, |
169 | TILE_OPC_MAXIH, | 169 | TILEGX_OPC_MNZ, |
170 | TILE_OPC_MAXIH_SN, | 170 | TILEGX_OPC_MTSPR, |
171 | TILE_OPC_MF, | 171 | TILEGX_OPC_MUL_HS_HS, |
172 | TILE_OPC_MFSPR, | 172 | TILEGX_OPC_MUL_HS_HU, |
173 | TILE_OPC_MINB_U, | 173 | TILEGX_OPC_MUL_HS_LS, |
174 | TILE_OPC_MINB_U_SN, | 174 | TILEGX_OPC_MUL_HS_LU, |
175 | TILE_OPC_MINH, | 175 | TILEGX_OPC_MUL_HU_HU, |
176 | TILE_OPC_MINH_SN, | 176 | TILEGX_OPC_MUL_HU_LS, |
177 | TILE_OPC_MINIB_U, | 177 | TILEGX_OPC_MUL_HU_LU, |
178 | TILE_OPC_MINIB_U_SN, | 178 | TILEGX_OPC_MUL_LS_LS, |
179 | TILE_OPC_MINIH, | 179 | TILEGX_OPC_MUL_LS_LU, |
180 | TILE_OPC_MINIH_SN, | 180 | TILEGX_OPC_MUL_LU_LU, |
181 | TILE_OPC_MM, | 181 | TILEGX_OPC_MULA_HS_HS, |
182 | TILE_OPC_MNZ, | 182 | TILEGX_OPC_MULA_HS_HU, |
183 | TILE_OPC_MNZ_SN, | 183 | TILEGX_OPC_MULA_HS_LS, |
184 | TILE_OPC_MNZB, | 184 | TILEGX_OPC_MULA_HS_LU, |
185 | TILE_OPC_MNZB_SN, | 185 | TILEGX_OPC_MULA_HU_HU, |
186 | TILE_OPC_MNZH, | 186 | TILEGX_OPC_MULA_HU_LS, |
187 | TILE_OPC_MNZH_SN, | 187 | TILEGX_OPC_MULA_HU_LU, |
188 | TILE_OPC_MTSPR, | 188 | TILEGX_OPC_MULA_LS_LS, |
189 | TILE_OPC_MULHH_SS, | 189 | TILEGX_OPC_MULA_LS_LU, |
190 | TILE_OPC_MULHH_SS_SN, | 190 | TILEGX_OPC_MULA_LU_LU, |
191 | TILE_OPC_MULHH_SU, | 191 | TILEGX_OPC_MULAX, |
192 | TILE_OPC_MULHH_SU_SN, | 192 | TILEGX_OPC_MULX, |
193 | TILE_OPC_MULHH_UU, | 193 | TILEGX_OPC_MZ, |
194 | TILE_OPC_MULHH_UU_SN, | 194 | TILEGX_OPC_NAP, |
195 | TILE_OPC_MULHHA_SS, | 195 | TILEGX_OPC_NOP, |
196 | TILE_OPC_MULHHA_SS_SN, | 196 | TILEGX_OPC_NOR, |
197 | TILE_OPC_MULHHA_SU, | 197 | TILEGX_OPC_OR, |
198 | TILE_OPC_MULHHA_SU_SN, | 198 | TILEGX_OPC_ORI, |
199 | TILE_OPC_MULHHA_UU, | 199 | TILEGX_OPC_PCNT, |
200 | TILE_OPC_MULHHA_UU_SN, | 200 | TILEGX_OPC_REVBITS, |
201 | TILE_OPC_MULHHSA_UU, | 201 | TILEGX_OPC_REVBYTES, |
202 | TILE_OPC_MULHHSA_UU_SN, | 202 | TILEGX_OPC_ROTL, |
203 | TILE_OPC_MULHL_SS, | 203 | TILEGX_OPC_ROTLI, |
204 | TILE_OPC_MULHL_SS_SN, | 204 | TILEGX_OPC_SHL, |
205 | TILE_OPC_MULHL_SU, | 205 | TILEGX_OPC_SHL16INSLI, |
206 | TILE_OPC_MULHL_SU_SN, | 206 | TILEGX_OPC_SHL1ADD, |
207 | TILE_OPC_MULHL_US, | 207 | TILEGX_OPC_SHL1ADDX, |
208 | TILE_OPC_MULHL_US_SN, | 208 | TILEGX_OPC_SHL2ADD, |
209 | TILE_OPC_MULHL_UU, | 209 | TILEGX_OPC_SHL2ADDX, |
210 | TILE_OPC_MULHL_UU_SN, | 210 | TILEGX_OPC_SHL3ADD, |
211 | TILE_OPC_MULHLA_SS, | 211 | TILEGX_OPC_SHL3ADDX, |
212 | TILE_OPC_MULHLA_SS_SN, | 212 | TILEGX_OPC_SHLI, |
213 | TILE_OPC_MULHLA_SU, | 213 | TILEGX_OPC_SHLX, |
214 | TILE_OPC_MULHLA_SU_SN, | 214 | TILEGX_OPC_SHLXI, |
215 | TILE_OPC_MULHLA_US, | 215 | TILEGX_OPC_SHRS, |
216 | TILE_OPC_MULHLA_US_SN, | 216 | TILEGX_OPC_SHRSI, |
217 | TILE_OPC_MULHLA_UU, | 217 | TILEGX_OPC_SHRU, |
218 | TILE_OPC_MULHLA_UU_SN, | 218 | TILEGX_OPC_SHRUI, |
219 | TILE_OPC_MULHLSA_UU, | 219 | TILEGX_OPC_SHRUX, |
220 | TILE_OPC_MULHLSA_UU_SN, | 220 | TILEGX_OPC_SHRUXI, |
221 | TILE_OPC_MULLL_SS, | 221 | TILEGX_OPC_SHUFFLEBYTES, |
222 | TILE_OPC_MULLL_SS_SN, | 222 | TILEGX_OPC_ST, |
223 | TILE_OPC_MULLL_SU, | 223 | TILEGX_OPC_ST1, |
224 | TILE_OPC_MULLL_SU_SN, | 224 | TILEGX_OPC_ST1_ADD, |
225 | TILE_OPC_MULLL_UU, | 225 | TILEGX_OPC_ST2, |
226 | TILE_OPC_MULLL_UU_SN, | 226 | TILEGX_OPC_ST2_ADD, |
227 | TILE_OPC_MULLLA_SS, | 227 | TILEGX_OPC_ST4, |
228 | TILE_OPC_MULLLA_SS_SN, | 228 | TILEGX_OPC_ST4_ADD, |
229 | TILE_OPC_MULLLA_SU, | 229 | TILEGX_OPC_ST_ADD, |
230 | TILE_OPC_MULLLA_SU_SN, | 230 | TILEGX_OPC_STNT, |
231 | TILE_OPC_MULLLA_UU, | 231 | TILEGX_OPC_STNT1, |
232 | TILE_OPC_MULLLA_UU_SN, | 232 | TILEGX_OPC_STNT1_ADD, |
233 | TILE_OPC_MULLLSA_UU, | 233 | TILEGX_OPC_STNT2, |
234 | TILE_OPC_MULLLSA_UU_SN, | 234 | TILEGX_OPC_STNT2_ADD, |
235 | TILE_OPC_MVNZ, | 235 | TILEGX_OPC_STNT4, |
236 | TILE_OPC_MVNZ_SN, | 236 | TILEGX_OPC_STNT4_ADD, |
237 | TILE_OPC_MVZ, | 237 | TILEGX_OPC_STNT_ADD, |
238 | TILE_OPC_MVZ_SN, | 238 | TILEGX_OPC_SUB, |
239 | TILE_OPC_MZ, | 239 | TILEGX_OPC_SUBX, |
240 | TILE_OPC_MZ_SN, | 240 | TILEGX_OPC_SUBXSC, |
241 | TILE_OPC_MZB, | 241 | TILEGX_OPC_SWINT0, |
242 | TILE_OPC_MZB_SN, | 242 | TILEGX_OPC_SWINT1, |
243 | TILE_OPC_MZH, | 243 | TILEGX_OPC_SWINT2, |
244 | TILE_OPC_MZH_SN, | 244 | TILEGX_OPC_SWINT3, |
245 | TILE_OPC_NAP, | 245 | TILEGX_OPC_TBLIDXB0, |
246 | TILE_OPC_NOP, | 246 | TILEGX_OPC_TBLIDXB1, |
247 | TILE_OPC_NOR, | 247 | TILEGX_OPC_TBLIDXB2, |
248 | TILE_OPC_NOR_SN, | 248 | TILEGX_OPC_TBLIDXB3, |
249 | TILE_OPC_OR, | 249 | TILEGX_OPC_V1ADD, |
250 | TILE_OPC_OR_SN, | 250 | TILEGX_OPC_V1ADDI, |
251 | TILE_OPC_ORI, | 251 | TILEGX_OPC_V1ADDUC, |
252 | TILE_OPC_ORI_SN, | 252 | TILEGX_OPC_V1ADIFFU, |
253 | TILE_OPC_PACKBS_U, | 253 | TILEGX_OPC_V1AVGU, |
254 | TILE_OPC_PACKBS_U_SN, | 254 | TILEGX_OPC_V1CMPEQ, |
255 | TILE_OPC_PACKHB, | 255 | TILEGX_OPC_V1CMPEQI, |
256 | TILE_OPC_PACKHB_SN, | 256 | TILEGX_OPC_V1CMPLES, |
257 | TILE_OPC_PACKHS, | 257 | TILEGX_OPC_V1CMPLEU, |
258 | TILE_OPC_PACKHS_SN, | 258 | TILEGX_OPC_V1CMPLTS, |
259 | TILE_OPC_PACKLB, | 259 | TILEGX_OPC_V1CMPLTSI, |
260 | TILE_OPC_PACKLB_SN, | 260 | TILEGX_OPC_V1CMPLTU, |
261 | TILE_OPC_PCNT, | 261 | TILEGX_OPC_V1CMPLTUI, |
262 | TILE_OPC_PCNT_SN, | 262 | TILEGX_OPC_V1CMPNE, |
263 | TILE_OPC_RL, | 263 | TILEGX_OPC_V1DDOTPU, |
264 | TILE_OPC_RL_SN, | 264 | TILEGX_OPC_V1DDOTPUA, |
265 | TILE_OPC_RLI, | 265 | TILEGX_OPC_V1DDOTPUS, |
266 | TILE_OPC_RLI_SN, | 266 | TILEGX_OPC_V1DDOTPUSA, |
267 | TILE_OPC_S1A, | 267 | TILEGX_OPC_V1DOTP, |
268 | TILE_OPC_S1A_SN, | 268 | TILEGX_OPC_V1DOTPA, |
269 | TILE_OPC_S2A, | 269 | TILEGX_OPC_V1DOTPU, |
270 | TILE_OPC_S2A_SN, | 270 | TILEGX_OPC_V1DOTPUA, |
271 | TILE_OPC_S3A, | 271 | TILEGX_OPC_V1DOTPUS, |
272 | TILE_OPC_S3A_SN, | 272 | TILEGX_OPC_V1DOTPUSA, |
273 | TILE_OPC_SADAB_U, | 273 | TILEGX_OPC_V1INT_H, |
274 | TILE_OPC_SADAB_U_SN, | 274 | TILEGX_OPC_V1INT_L, |
275 | TILE_OPC_SADAH, | 275 | TILEGX_OPC_V1MAXU, |
276 | TILE_OPC_SADAH_SN, | 276 | TILEGX_OPC_V1MAXUI, |
277 | TILE_OPC_SADAH_U, | 277 | TILEGX_OPC_V1MINU, |
278 | TILE_OPC_SADAH_U_SN, | 278 | TILEGX_OPC_V1MINUI, |
279 | TILE_OPC_SADB_U, | 279 | TILEGX_OPC_V1MNZ, |
280 | TILE_OPC_SADB_U_SN, | 280 | TILEGX_OPC_V1MULTU, |
281 | TILE_OPC_SADH, | 281 | TILEGX_OPC_V1MULU, |
282 | TILE_OPC_SADH_SN, | 282 | TILEGX_OPC_V1MULUS, |
283 | TILE_OPC_SADH_U, | 283 | TILEGX_OPC_V1MZ, |
284 | TILE_OPC_SADH_U_SN, | 284 | TILEGX_OPC_V1SADAU, |
285 | TILE_OPC_SB, | 285 | TILEGX_OPC_V1SADU, |
286 | TILE_OPC_SBADD, | 286 | TILEGX_OPC_V1SHL, |
287 | TILE_OPC_SEQ, | 287 | TILEGX_OPC_V1SHLI, |
288 | TILE_OPC_SEQ_SN, | 288 | TILEGX_OPC_V1SHRS, |
289 | TILE_OPC_SEQB, | 289 | TILEGX_OPC_V1SHRSI, |
290 | TILE_OPC_SEQB_SN, | 290 | TILEGX_OPC_V1SHRU, |
291 | TILE_OPC_SEQH, | 291 | TILEGX_OPC_V1SHRUI, |
292 | TILE_OPC_SEQH_SN, | 292 | TILEGX_OPC_V1SUB, |
293 | TILE_OPC_SEQI, | 293 | TILEGX_OPC_V1SUBUC, |
294 | TILE_OPC_SEQI_SN, | 294 | TILEGX_OPC_V2ADD, |
295 | TILE_OPC_SEQIB, | 295 | TILEGX_OPC_V2ADDI, |
296 | TILE_OPC_SEQIB_SN, | 296 | TILEGX_OPC_V2ADDSC, |
297 | TILE_OPC_SEQIH, | 297 | TILEGX_OPC_V2ADIFFS, |
298 | TILE_OPC_SEQIH_SN, | 298 | TILEGX_OPC_V2AVGS, |
299 | TILE_OPC_SH, | 299 | TILEGX_OPC_V2CMPEQ, |
300 | TILE_OPC_SHADD, | 300 | TILEGX_OPC_V2CMPEQI, |
301 | TILE_OPC_SHL, | 301 | TILEGX_OPC_V2CMPLES, |
302 | TILE_OPC_SHL_SN, | 302 | TILEGX_OPC_V2CMPLEU, |
303 | TILE_OPC_SHLB, | 303 | TILEGX_OPC_V2CMPLTS, |
304 | TILE_OPC_SHLB_SN, | 304 | TILEGX_OPC_V2CMPLTSI, |
305 | TILE_OPC_SHLH, | 305 | TILEGX_OPC_V2CMPLTU, |
306 | TILE_OPC_SHLH_SN, | 306 | TILEGX_OPC_V2CMPLTUI, |
307 | TILE_OPC_SHLI, | 307 | TILEGX_OPC_V2CMPNE, |
308 | TILE_OPC_SHLI_SN, | 308 | TILEGX_OPC_V2DOTP, |
309 | TILE_OPC_SHLIB, | 309 | TILEGX_OPC_V2DOTPA, |
310 | TILE_OPC_SHLIB_SN, | 310 | TILEGX_OPC_V2INT_H, |
311 | TILE_OPC_SHLIH, | 311 | TILEGX_OPC_V2INT_L, |
312 | TILE_OPC_SHLIH_SN, | 312 | TILEGX_OPC_V2MAXS, |
313 | TILE_OPC_SHR, | 313 | TILEGX_OPC_V2MAXSI, |
314 | TILE_OPC_SHR_SN, | 314 | TILEGX_OPC_V2MINS, |
315 | TILE_OPC_SHRB, | 315 | TILEGX_OPC_V2MINSI, |
316 | TILE_OPC_SHRB_SN, | 316 | TILEGX_OPC_V2MNZ, |
317 | TILE_OPC_SHRH, | 317 | TILEGX_OPC_V2MULFSC, |
318 | TILE_OPC_SHRH_SN, | 318 | TILEGX_OPC_V2MULS, |
319 | TILE_OPC_SHRI, | 319 | TILEGX_OPC_V2MULTS, |
320 | TILE_OPC_SHRI_SN, | 320 | TILEGX_OPC_V2MZ, |
321 | TILE_OPC_SHRIB, | 321 | TILEGX_OPC_V2PACKH, |
322 | TILE_OPC_SHRIB_SN, | 322 | TILEGX_OPC_V2PACKL, |
323 | TILE_OPC_SHRIH, | 323 | TILEGX_OPC_V2PACKUC, |
324 | TILE_OPC_SHRIH_SN, | 324 | TILEGX_OPC_V2SADAS, |
325 | TILE_OPC_SLT, | 325 | TILEGX_OPC_V2SADAU, |
326 | TILE_OPC_SLT_SN, | 326 | TILEGX_OPC_V2SADS, |
327 | TILE_OPC_SLT_U, | 327 | TILEGX_OPC_V2SADU, |
328 | TILE_OPC_SLT_U_SN, | 328 | TILEGX_OPC_V2SHL, |
329 | TILE_OPC_SLTB, | 329 | TILEGX_OPC_V2SHLI, |
330 | TILE_OPC_SLTB_SN, | 330 | TILEGX_OPC_V2SHLSC, |
331 | TILE_OPC_SLTB_U, | 331 | TILEGX_OPC_V2SHRS, |
332 | TILE_OPC_SLTB_U_SN, | 332 | TILEGX_OPC_V2SHRSI, |
333 | TILE_OPC_SLTE, | 333 | TILEGX_OPC_V2SHRU, |
334 | TILE_OPC_SLTE_SN, | 334 | TILEGX_OPC_V2SHRUI, |
335 | TILE_OPC_SLTE_U, | 335 | TILEGX_OPC_V2SUB, |
336 | TILE_OPC_SLTE_U_SN, | 336 | TILEGX_OPC_V2SUBSC, |
337 | TILE_OPC_SLTEB, | 337 | TILEGX_OPC_V4ADD, |
338 | TILE_OPC_SLTEB_SN, | 338 | TILEGX_OPC_V4ADDSC, |
339 | TILE_OPC_SLTEB_U, | 339 | TILEGX_OPC_V4INT_H, |
340 | TILE_OPC_SLTEB_U_SN, | 340 | TILEGX_OPC_V4INT_L, |
341 | TILE_OPC_SLTEH, | 341 | TILEGX_OPC_V4PACKSC, |
342 | TILE_OPC_SLTEH_SN, | 342 | TILEGX_OPC_V4SHL, |
343 | TILE_OPC_SLTEH_U, | 343 | TILEGX_OPC_V4SHLSC, |
344 | TILE_OPC_SLTEH_U_SN, | 344 | TILEGX_OPC_V4SHRS, |
345 | TILE_OPC_SLTH, | 345 | TILEGX_OPC_V4SHRU, |
346 | TILE_OPC_SLTH_SN, | 346 | TILEGX_OPC_V4SUB, |
347 | TILE_OPC_SLTH_U, | 347 | TILEGX_OPC_V4SUBSC, |
348 | TILE_OPC_SLTH_U_SN, | 348 | TILEGX_OPC_WH64, |
349 | TILE_OPC_SLTI, | 349 | TILEGX_OPC_XOR, |
350 | TILE_OPC_SLTI_SN, | 350 | TILEGX_OPC_XORI, |
351 | TILE_OPC_SLTI_U, | 351 | TILEGX_OPC_NONE |
352 | TILE_OPC_SLTI_U_SN, | 352 | } tilegx_mnemonic; |
353 | TILE_OPC_SLTIB, | ||
354 | TILE_OPC_SLTIB_SN, | ||
355 | TILE_OPC_SLTIB_U, | ||
356 | TILE_OPC_SLTIB_U_SN, | ||
357 | TILE_OPC_SLTIH, | ||
358 | TILE_OPC_SLTIH_SN, | ||
359 | TILE_OPC_SLTIH_U, | ||
360 | TILE_OPC_SLTIH_U_SN, | ||
361 | TILE_OPC_SNE, | ||
362 | TILE_OPC_SNE_SN, | ||
363 | TILE_OPC_SNEB, | ||
364 | TILE_OPC_SNEB_SN, | ||
365 | TILE_OPC_SNEH, | ||
366 | TILE_OPC_SNEH_SN, | ||
367 | TILE_OPC_SRA, | ||
368 | TILE_OPC_SRA_SN, | ||
369 | TILE_OPC_SRAB, | ||
370 | TILE_OPC_SRAB_SN, | ||
371 | TILE_OPC_SRAH, | ||
372 | TILE_OPC_SRAH_SN, | ||
373 | TILE_OPC_SRAI, | ||
374 | TILE_OPC_SRAI_SN, | ||
375 | TILE_OPC_SRAIB, | ||
376 | TILE_OPC_SRAIB_SN, | ||
377 | TILE_OPC_SRAIH, | ||
378 | TILE_OPC_SRAIH_SN, | ||
379 | TILE_OPC_SUB, | ||
380 | TILE_OPC_SUB_SN, | ||
381 | TILE_OPC_SUBB, | ||
382 | TILE_OPC_SUBB_SN, | ||
383 | TILE_OPC_SUBBS_U, | ||
384 | TILE_OPC_SUBBS_U_SN, | ||
385 | TILE_OPC_SUBH, | ||
386 | TILE_OPC_SUBH_SN, | ||
387 | TILE_OPC_SUBHS, | ||
388 | TILE_OPC_SUBHS_SN, | ||
389 | TILE_OPC_SUBS, | ||
390 | TILE_OPC_SUBS_SN, | ||
391 | TILE_OPC_SW, | ||
392 | TILE_OPC_SWADD, | ||
393 | TILE_OPC_SWINT0, | ||
394 | TILE_OPC_SWINT1, | ||
395 | TILE_OPC_SWINT2, | ||
396 | TILE_OPC_SWINT3, | ||
397 | TILE_OPC_TBLIDXB0, | ||
398 | TILE_OPC_TBLIDXB0_SN, | ||
399 | TILE_OPC_TBLIDXB1, | ||
400 | TILE_OPC_TBLIDXB1_SN, | ||
401 | TILE_OPC_TBLIDXB2, | ||
402 | TILE_OPC_TBLIDXB2_SN, | ||
403 | TILE_OPC_TBLIDXB3, | ||
404 | TILE_OPC_TBLIDXB3_SN, | ||
405 | TILE_OPC_TNS, | ||
406 | TILE_OPC_TNS_SN, | ||
407 | TILE_OPC_WH64, | ||
408 | TILE_OPC_XOR, | ||
409 | TILE_OPC_XOR_SN, | ||
410 | TILE_OPC_XORI, | ||
411 | TILE_OPC_XORI_SN, | ||
412 | TILE_OPC_NONE | ||
413 | } tile_mnemonic; | ||
414 | 353 | ||
415 | /* 64-bit pattern for a { bpt ; nop } bundle. */ | 354 | /* 64-bit pattern for a { bpt ; nop } bundle. */ |
416 | #define TILE_BPT_BUNDLE 0x400b3cae70166000ULL | 355 | #define TILEGX_BPT_BUNDLE 0x286a44ae51485000ULL |
417 | 356 | ||
418 | 357 | ||
419 | #define TILE_ELF_MACHINE_CODE EM_TILEPRO | 358 | #define TILE_ELF_MACHINE_CODE EM_TILE64 |
420 | 359 | ||
421 | #define TILE_ELF_NAME "elf32-tilepro" | 360 | #define TILE_ELF_NAME "elf32-tile64" |
422 | 361 | ||
423 | 362 | ||
424 | static __inline unsigned int | 363 | static __inline unsigned int |
425 | get_BrOff_SN(tile_bundle_bits num) | 364 | get_BFEnd_X0(tilegx_bundle_bits num) |
426 | { | 365 | { |
427 | const unsigned int n = (unsigned int)num; | 366 | const unsigned int n = (unsigned int)num; |
428 | return (((n >> 0)) & 0x3ff); | 367 | return (((n >> 12)) & 0x3f); |
429 | } | 368 | } |
430 | 369 | ||
431 | static __inline unsigned int | 370 | static __inline unsigned int |
432 | get_BrOff_X1(tile_bundle_bits n) | 371 | get_BFOpcodeExtension_X0(tilegx_bundle_bits num) |
433 | { | 372 | { |
434 | return (((unsigned int)(n >> 43)) & 0x00007fff) | | 373 | const unsigned int n = (unsigned int)num; |
435 | (((unsigned int)(n >> 20)) & 0x00018000); | 374 | return (((n >> 24)) & 0xf); |
436 | } | 375 | } |
437 | 376 | ||
438 | static __inline unsigned int | 377 | static __inline unsigned int |
439 | get_BrType_X1(tile_bundle_bits n) | 378 | get_BFStart_X0(tilegx_bundle_bits num) |
440 | { | 379 | { |
441 | return (((unsigned int)(n >> 31)) & 0xf); | 380 | const unsigned int n = (unsigned int)num; |
381 | return (((n >> 18)) & 0x3f); | ||
442 | } | 382 | } |
443 | 383 | ||
444 | static __inline unsigned int | 384 | static __inline unsigned int |
445 | get_Dest_Imm8_X1(tile_bundle_bits n) | 385 | get_BrOff_X1(tilegx_bundle_bits n) |
446 | { | 386 | { |
447 | return (((unsigned int)(n >> 31)) & 0x0000003f) | | 387 | return (((unsigned int)(n >> 31)) & 0x0000003f) | |
448 | (((unsigned int)(n >> 43)) & 0x000000c0); | 388 | (((unsigned int)(n >> 37)) & 0x0001ffc0); |
449 | } | 389 | } |
450 | 390 | ||
451 | static __inline unsigned int | 391 | static __inline unsigned int |
452 | get_Dest_SN(tile_bundle_bits num) | 392 | get_BrType_X1(tilegx_bundle_bits n) |
453 | { | 393 | { |
454 | const unsigned int n = (unsigned int)num; | 394 | return (((unsigned int)(n >> 54)) & 0x1f); |
455 | return (((n >> 2)) & 0x3); | ||
456 | } | 395 | } |
457 | 396 | ||
458 | static __inline unsigned int | 397 | static __inline unsigned int |
459 | get_Dest_X0(tile_bundle_bits num) | 398 | get_Dest_Imm8_X1(tilegx_bundle_bits n) |
399 | { | ||
400 | return (((unsigned int)(n >> 31)) & 0x0000003f) | | ||
401 | (((unsigned int)(n >> 43)) & 0x000000c0); | ||
402 | } | ||
403 | |||
404 | static __inline unsigned int | ||
405 | get_Dest_X0(tilegx_bundle_bits num) | ||
460 | { | 406 | { |
461 | const unsigned int n = (unsigned int)num; | 407 | const unsigned int n = (unsigned int)num; |
462 | return (((n >> 0)) & 0x3f); | 408 | return (((n >> 0)) & 0x3f); |
463 | } | 409 | } |
464 | 410 | ||
465 | static __inline unsigned int | 411 | static __inline unsigned int |
466 | get_Dest_X1(tile_bundle_bits n) | 412 | get_Dest_X1(tilegx_bundle_bits n) |
467 | { | 413 | { |
468 | return (((unsigned int)(n >> 31)) & 0x3f); | 414 | return (((unsigned int)(n >> 31)) & 0x3f); |
469 | } | 415 | } |
470 | 416 | ||
471 | static __inline unsigned int | 417 | static __inline unsigned int |
472 | get_Dest_Y0(tile_bundle_bits num) | 418 | get_Dest_Y0(tilegx_bundle_bits num) |
473 | { | 419 | { |
474 | const unsigned int n = (unsigned int)num; | 420 | const unsigned int n = (unsigned int)num; |
475 | return (((n >> 0)) & 0x3f); | 421 | return (((n >> 0)) & 0x3f); |
476 | } | 422 | } |
477 | 423 | ||
478 | static __inline unsigned int | 424 | static __inline unsigned int |
479 | get_Dest_Y1(tile_bundle_bits n) | 425 | get_Dest_Y1(tilegx_bundle_bits n) |
480 | { | 426 | { |
481 | return (((unsigned int)(n >> 31)) & 0x3f); | 427 | return (((unsigned int)(n >> 31)) & 0x3f); |
482 | } | 428 | } |
483 | 429 | ||
484 | static __inline unsigned int | 430 | static __inline unsigned int |
485 | get_Imm16_X0(tile_bundle_bits num) | 431 | get_Imm16_X0(tilegx_bundle_bits num) |
486 | { | 432 | { |
487 | const unsigned int n = (unsigned int)num; | 433 | const unsigned int n = (unsigned int)num; |
488 | return (((n >> 12)) & 0xffff); | 434 | return (((n >> 12)) & 0xffff); |
489 | } | 435 | } |
490 | 436 | ||
491 | static __inline unsigned int | 437 | static __inline unsigned int |
492 | get_Imm16_X1(tile_bundle_bits n) | 438 | get_Imm16_X1(tilegx_bundle_bits n) |
493 | { | 439 | { |
494 | return (((unsigned int)(n >> 43)) & 0xffff); | 440 | return (((unsigned int)(n >> 43)) & 0xffff); |
495 | } | 441 | } |
496 | 442 | ||
497 | static __inline unsigned int | 443 | static __inline unsigned int |
498 | get_Imm8_SN(tile_bundle_bits num) | 444 | get_Imm8OpcodeExtension_X0(tilegx_bundle_bits num) |
499 | { | ||
500 | const unsigned int n = (unsigned int)num; | ||
501 | return (((n >> 0)) & 0xff); | ||
502 | } | ||
503 | |||
504 | static __inline unsigned int | ||
505 | get_Imm8_X0(tile_bundle_bits num) | ||
506 | { | 445 | { |
507 | const unsigned int n = (unsigned int)num; | 446 | const unsigned int n = (unsigned int)num; |
508 | return (((n >> 12)) & 0xff); | 447 | return (((n >> 20)) & 0xff); |
509 | } | 448 | } |
510 | 449 | ||
511 | static __inline unsigned int | 450 | static __inline unsigned int |
512 | get_Imm8_X1(tile_bundle_bits n) | 451 | get_Imm8OpcodeExtension_X1(tilegx_bundle_bits n) |
513 | { | 452 | { |
514 | return (((unsigned int)(n >> 43)) & 0xff); | 453 | return (((unsigned int)(n >> 51)) & 0xff); |
515 | } | 454 | } |
516 | 455 | ||
517 | static __inline unsigned int | 456 | static __inline unsigned int |
518 | get_Imm8_Y0(tile_bundle_bits num) | 457 | get_Imm8_X0(tilegx_bundle_bits num) |
519 | { | 458 | { |
520 | const unsigned int n = (unsigned int)num; | 459 | const unsigned int n = (unsigned int)num; |
521 | return (((n >> 12)) & 0xff); | 460 | return (((n >> 12)) & 0xff); |
522 | } | 461 | } |
523 | 462 | ||
524 | static __inline unsigned int | 463 | static __inline unsigned int |
525 | get_Imm8_Y1(tile_bundle_bits n) | 464 | get_Imm8_X1(tilegx_bundle_bits n) |
526 | { | 465 | { |
527 | return (((unsigned int)(n >> 43)) & 0xff); | 466 | return (((unsigned int)(n >> 43)) & 0xff); |
528 | } | 467 | } |
529 | 468 | ||
530 | static __inline unsigned int | 469 | static __inline unsigned int |
531 | get_ImmOpcodeExtension_X0(tile_bundle_bits num) | 470 | get_Imm8_Y0(tilegx_bundle_bits num) |
532 | { | ||
533 | const unsigned int n = (unsigned int)num; | ||
534 | return (((n >> 20)) & 0x7f); | ||
535 | } | ||
536 | |||
537 | static __inline unsigned int | ||
538 | get_ImmOpcodeExtension_X1(tile_bundle_bits n) | ||
539 | { | ||
540 | return (((unsigned int)(n >> 51)) & 0x7f); | ||
541 | } | ||
542 | |||
543 | static __inline unsigned int | ||
544 | get_ImmRROpcodeExtension_SN(tile_bundle_bits num) | ||
545 | { | 471 | { |
546 | const unsigned int n = (unsigned int)num; | 472 | const unsigned int n = (unsigned int)num; |
547 | return (((n >> 8)) & 0x3); | 473 | return (((n >> 12)) & 0xff); |
548 | } | ||
549 | |||
550 | static __inline unsigned int | ||
551 | get_JOffLong_X1(tile_bundle_bits n) | ||
552 | { | ||
553 | return (((unsigned int)(n >> 43)) & 0x00007fff) | | ||
554 | (((unsigned int)(n >> 20)) & 0x00018000) | | ||
555 | (((unsigned int)(n >> 14)) & 0x001e0000) | | ||
556 | (((unsigned int)(n >> 16)) & 0x07e00000) | | ||
557 | (((unsigned int)(n >> 31)) & 0x18000000); | ||
558 | } | ||
559 | |||
560 | static __inline unsigned int | ||
561 | get_JOff_X1(tile_bundle_bits n) | ||
562 | { | ||
563 | return (((unsigned int)(n >> 43)) & 0x00007fff) | | ||
564 | (((unsigned int)(n >> 20)) & 0x00018000) | | ||
565 | (((unsigned int)(n >> 14)) & 0x001e0000) | | ||
566 | (((unsigned int)(n >> 16)) & 0x07e00000) | | ||
567 | (((unsigned int)(n >> 31)) & 0x08000000); | ||
568 | } | ||
569 | |||
570 | static __inline unsigned int | ||
571 | get_MF_Imm15_X1(tile_bundle_bits n) | ||
572 | { | ||
573 | return (((unsigned int)(n >> 37)) & 0x00003fff) | | ||
574 | (((unsigned int)(n >> 44)) & 0x00004000); | ||
575 | } | 474 | } |
576 | 475 | ||
577 | static __inline unsigned int | 476 | static __inline unsigned int |
578 | get_MMEnd_X0(tile_bundle_bits num) | 477 | get_Imm8_Y1(tilegx_bundle_bits n) |
579 | { | 478 | { |
580 | const unsigned int n = (unsigned int)num; | 479 | return (((unsigned int)(n >> 43)) & 0xff); |
581 | return (((n >> 18)) & 0x1f); | ||
582 | } | 480 | } |
583 | 481 | ||
584 | static __inline unsigned int | 482 | static __inline unsigned int |
585 | get_MMEnd_X1(tile_bundle_bits n) | 483 | get_JumpOff_X1(tilegx_bundle_bits n) |
586 | { | 484 | { |
587 | return (((unsigned int)(n >> 49)) & 0x1f); | 485 | return (((unsigned int)(n >> 31)) & 0x7ffffff); |
588 | } | 486 | } |
589 | 487 | ||
590 | static __inline unsigned int | 488 | static __inline unsigned int |
591 | get_MMStart_X0(tile_bundle_bits num) | 489 | get_JumpOpcodeExtension_X1(tilegx_bundle_bits n) |
592 | { | 490 | { |
593 | const unsigned int n = (unsigned int)num; | 491 | return (((unsigned int)(n >> 58)) & 0x1); |
594 | return (((n >> 23)) & 0x1f); | ||
595 | } | 492 | } |
596 | 493 | ||
597 | static __inline unsigned int | 494 | static __inline unsigned int |
598 | get_MMStart_X1(tile_bundle_bits n) | 495 | get_MF_Imm14_X1(tilegx_bundle_bits n) |
599 | { | 496 | { |
600 | return (((unsigned int)(n >> 54)) & 0x1f); | 497 | return (((unsigned int)(n >> 37)) & 0x3fff); |
601 | } | 498 | } |
602 | 499 | ||
603 | static __inline unsigned int | 500 | static __inline unsigned int |
604 | get_MT_Imm15_X1(tile_bundle_bits n) | 501 | get_MT_Imm14_X1(tilegx_bundle_bits n) |
605 | { | 502 | { |
606 | return (((unsigned int)(n >> 31)) & 0x0000003f) | | 503 | return (((unsigned int)(n >> 31)) & 0x0000003f) | |
607 | (((unsigned int)(n >> 37)) & 0x00003fc0) | | 504 | (((unsigned int)(n >> 37)) & 0x00003fc0); |
608 | (((unsigned int)(n >> 44)) & 0x00004000); | ||
609 | } | ||
610 | |||
611 | static __inline unsigned int | ||
612 | get_Mode(tile_bundle_bits n) | ||
613 | { | ||
614 | return (((unsigned int)(n >> 63)) & 0x1); | ||
615 | } | ||
616 | |||
617 | static __inline unsigned int | ||
618 | get_NoRegOpcodeExtension_SN(tile_bundle_bits num) | ||
619 | { | ||
620 | const unsigned int n = (unsigned int)num; | ||
621 | return (((n >> 0)) & 0xf); | ||
622 | } | 505 | } |
623 | 506 | ||
624 | static __inline unsigned int | 507 | static __inline unsigned int |
625 | get_Opcode_SN(tile_bundle_bits num) | 508 | get_Mode(tilegx_bundle_bits n) |
626 | { | 509 | { |
627 | const unsigned int n = (unsigned int)num; | 510 | return (((unsigned int)(n >> 62)) & 0x3); |
628 | return (((n >> 10)) & 0x3f); | ||
629 | } | 511 | } |
630 | 512 | ||
631 | static __inline unsigned int | 513 | static __inline unsigned int |
632 | get_Opcode_X0(tile_bundle_bits num) | 514 | get_Opcode_X0(tilegx_bundle_bits num) |
633 | { | 515 | { |
634 | const unsigned int n = (unsigned int)num; | 516 | const unsigned int n = (unsigned int)num; |
635 | return (((n >> 28)) & 0x7); | 517 | return (((n >> 28)) & 0x7); |
636 | } | 518 | } |
637 | 519 | ||
638 | static __inline unsigned int | 520 | static __inline unsigned int |
639 | get_Opcode_X1(tile_bundle_bits n) | 521 | get_Opcode_X1(tilegx_bundle_bits n) |
640 | { | 522 | { |
641 | return (((unsigned int)(n >> 59)) & 0xf); | 523 | return (((unsigned int)(n >> 59)) & 0x7); |
642 | } | 524 | } |
643 | 525 | ||
644 | static __inline unsigned int | 526 | static __inline unsigned int |
645 | get_Opcode_Y0(tile_bundle_bits num) | 527 | get_Opcode_Y0(tilegx_bundle_bits num) |
646 | { | 528 | { |
647 | const unsigned int n = (unsigned int)num; | 529 | const unsigned int n = (unsigned int)num; |
648 | return (((n >> 27)) & 0xf); | 530 | return (((n >> 27)) & 0xf); |
649 | } | 531 | } |
650 | 532 | ||
651 | static __inline unsigned int | 533 | static __inline unsigned int |
652 | get_Opcode_Y1(tile_bundle_bits n) | 534 | get_Opcode_Y1(tilegx_bundle_bits n) |
653 | { | 535 | { |
654 | return (((unsigned int)(n >> 59)) & 0xf); | 536 | return (((unsigned int)(n >> 58)) & 0xf); |
655 | } | 537 | } |
656 | 538 | ||
657 | static __inline unsigned int | 539 | static __inline unsigned int |
658 | get_Opcode_Y2(tile_bundle_bits n) | 540 | get_Opcode_Y2(tilegx_bundle_bits n) |
659 | { | 541 | { |
660 | return (((unsigned int)(n >> 56)) & 0x7); | 542 | return (((n >> 26)) & 0x00000001) | |
661 | } | 543 | (((unsigned int)(n >> 56)) & 0x00000002); |
662 | |||
663 | static __inline unsigned int | ||
664 | get_RROpcodeExtension_SN(tile_bundle_bits num) | ||
665 | { | ||
666 | const unsigned int n = (unsigned int)num; | ||
667 | return (((n >> 4)) & 0xf); | ||
668 | } | 544 | } |
669 | 545 | ||
670 | static __inline unsigned int | 546 | static __inline unsigned int |
671 | get_RRROpcodeExtension_X0(tile_bundle_bits num) | 547 | get_RRROpcodeExtension_X0(tilegx_bundle_bits num) |
672 | { | 548 | { |
673 | const unsigned int n = (unsigned int)num; | 549 | const unsigned int n = (unsigned int)num; |
674 | return (((n >> 18)) & 0x1ff); | 550 | return (((n >> 18)) & 0x3ff); |
675 | } | 551 | } |
676 | 552 | ||
677 | static __inline unsigned int | 553 | static __inline unsigned int |
678 | get_RRROpcodeExtension_X1(tile_bundle_bits n) | 554 | get_RRROpcodeExtension_X1(tilegx_bundle_bits n) |
679 | { | 555 | { |
680 | return (((unsigned int)(n >> 49)) & 0x1ff); | 556 | return (((unsigned int)(n >> 49)) & 0x3ff); |
681 | } | 557 | } |
682 | 558 | ||
683 | static __inline unsigned int | 559 | static __inline unsigned int |
684 | get_RRROpcodeExtension_Y0(tile_bundle_bits num) | 560 | get_RRROpcodeExtension_Y0(tilegx_bundle_bits num) |
685 | { | 561 | { |
686 | const unsigned int n = (unsigned int)num; | 562 | const unsigned int n = (unsigned int)num; |
687 | return (((n >> 18)) & 0x3); | 563 | return (((n >> 18)) & 0x3); |
688 | } | 564 | } |
689 | 565 | ||
690 | static __inline unsigned int | 566 | static __inline unsigned int |
691 | get_RRROpcodeExtension_Y1(tile_bundle_bits n) | 567 | get_RRROpcodeExtension_Y1(tilegx_bundle_bits n) |
692 | { | 568 | { |
693 | return (((unsigned int)(n >> 49)) & 0x3); | 569 | return (((unsigned int)(n >> 49)) & 0x3); |
694 | } | 570 | } |
695 | 571 | ||
696 | static __inline unsigned int | 572 | static __inline unsigned int |
697 | get_RouteOpcodeExtension_SN(tile_bundle_bits num) | 573 | get_ShAmt_X0(tilegx_bundle_bits num) |
698 | { | ||
699 | const unsigned int n = (unsigned int)num; | ||
700 | return (((n >> 0)) & 0x3ff); | ||
701 | } | ||
702 | |||
703 | static __inline unsigned int | ||
704 | get_S_X0(tile_bundle_bits num) | ||
705 | { | 574 | { |
706 | const unsigned int n = (unsigned int)num; | 575 | const unsigned int n = (unsigned int)num; |
707 | return (((n >> 27)) & 0x1); | 576 | return (((n >> 12)) & 0x3f); |
708 | } | 577 | } |
709 | 578 | ||
710 | static __inline unsigned int | 579 | static __inline unsigned int |
711 | get_S_X1(tile_bundle_bits n) | 580 | get_ShAmt_X1(tilegx_bundle_bits n) |
712 | { | 581 | { |
713 | return (((unsigned int)(n >> 58)) & 0x1); | 582 | return (((unsigned int)(n >> 43)) & 0x3f); |
714 | } | 583 | } |
715 | 584 | ||
716 | static __inline unsigned int | 585 | static __inline unsigned int |
717 | get_ShAmt_X0(tile_bundle_bits num) | 586 | get_ShAmt_Y0(tilegx_bundle_bits num) |
718 | { | 587 | { |
719 | const unsigned int n = (unsigned int)num; | 588 | const unsigned int n = (unsigned int)num; |
720 | return (((n >> 12)) & 0x1f); | 589 | return (((n >> 12)) & 0x3f); |
721 | } | 590 | } |
722 | 591 | ||
723 | static __inline unsigned int | 592 | static __inline unsigned int |
724 | get_ShAmt_X1(tile_bundle_bits n) | 593 | get_ShAmt_Y1(tilegx_bundle_bits n) |
725 | { | 594 | { |
726 | return (((unsigned int)(n >> 43)) & 0x1f); | 595 | return (((unsigned int)(n >> 43)) & 0x3f); |
727 | } | 596 | } |
728 | 597 | ||
729 | static __inline unsigned int | 598 | static __inline unsigned int |
730 | get_ShAmt_Y0(tile_bundle_bits num) | 599 | get_ShiftOpcodeExtension_X0(tilegx_bundle_bits num) |
731 | { | 600 | { |
732 | const unsigned int n = (unsigned int)num; | 601 | const unsigned int n = (unsigned int)num; |
733 | return (((n >> 12)) & 0x1f); | 602 | return (((n >> 18)) & 0x3ff); |
734 | } | 603 | } |
735 | 604 | ||
736 | static __inline unsigned int | 605 | static __inline unsigned int |
737 | get_ShAmt_Y1(tile_bundle_bits n) | 606 | get_ShiftOpcodeExtension_X1(tilegx_bundle_bits n) |
738 | { | 607 | { |
739 | return (((unsigned int)(n >> 43)) & 0x1f); | 608 | return (((unsigned int)(n >> 49)) & 0x3ff); |
740 | } | 609 | } |
741 | 610 | ||
742 | static __inline unsigned int | 611 | static __inline unsigned int |
743 | get_SrcA_X0(tile_bundle_bits num) | 612 | get_ShiftOpcodeExtension_Y0(tilegx_bundle_bits num) |
744 | { | 613 | { |
745 | const unsigned int n = (unsigned int)num; | 614 | const unsigned int n = (unsigned int)num; |
746 | return (((n >> 6)) & 0x3f); | 615 | return (((n >> 18)) & 0x3); |
747 | } | 616 | } |
748 | 617 | ||
749 | static __inline unsigned int | 618 | static __inline unsigned int |
750 | get_SrcA_X1(tile_bundle_bits n) | 619 | get_ShiftOpcodeExtension_Y1(tilegx_bundle_bits n) |
751 | { | 620 | { |
752 | return (((unsigned int)(n >> 37)) & 0x3f); | 621 | return (((unsigned int)(n >> 49)) & 0x3); |
753 | } | 622 | } |
754 | 623 | ||
755 | static __inline unsigned int | 624 | static __inline unsigned int |
756 | get_SrcA_Y0(tile_bundle_bits num) | 625 | get_SrcA_X0(tilegx_bundle_bits num) |
757 | { | 626 | { |
758 | const unsigned int n = (unsigned int)num; | 627 | const unsigned int n = (unsigned int)num; |
759 | return (((n >> 6)) & 0x3f); | 628 | return (((n >> 6)) & 0x3f); |
760 | } | 629 | } |
761 | 630 | ||
762 | static __inline unsigned int | 631 | static __inline unsigned int |
763 | get_SrcA_Y1(tile_bundle_bits n) | 632 | get_SrcA_X1(tilegx_bundle_bits n) |
764 | { | 633 | { |
765 | return (((unsigned int)(n >> 37)) & 0x3f); | 634 | return (((unsigned int)(n >> 37)) & 0x3f); |
766 | } | 635 | } |
767 | 636 | ||
768 | static __inline unsigned int | 637 | static __inline unsigned int |
769 | get_SrcA_Y2(tile_bundle_bits n) | 638 | get_SrcA_Y0(tilegx_bundle_bits num) |
770 | { | 639 | { |
771 | return (((n >> 26)) & 0x00000001) | | 640 | const unsigned int n = (unsigned int)num; |
772 | (((unsigned int)(n >> 50)) & 0x0000003e); | 641 | return (((n >> 6)) & 0x3f); |
773 | } | 642 | } |
774 | 643 | ||
775 | static __inline unsigned int | 644 | static __inline unsigned int |
776 | get_SrcBDest_Y2(tile_bundle_bits num) | 645 | get_SrcA_Y1(tilegx_bundle_bits n) |
777 | { | 646 | { |
778 | const unsigned int n = (unsigned int)num; | 647 | return (((unsigned int)(n >> 37)) & 0x3f); |
779 | return (((n >> 20)) & 0x3f); | ||
780 | } | 648 | } |
781 | 649 | ||
782 | static __inline unsigned int | 650 | static __inline unsigned int |
783 | get_SrcB_X0(tile_bundle_bits num) | 651 | get_SrcA_Y2(tilegx_bundle_bits num) |
784 | { | 652 | { |
785 | const unsigned int n = (unsigned int)num; | 653 | const unsigned int n = (unsigned int)num; |
786 | return (((n >> 12)) & 0x3f); | 654 | return (((n >> 20)) & 0x3f); |
787 | } | 655 | } |
788 | 656 | ||
789 | static __inline unsigned int | 657 | static __inline unsigned int |
790 | get_SrcB_X1(tile_bundle_bits n) | 658 | get_SrcBDest_Y2(tilegx_bundle_bits n) |
791 | { | 659 | { |
792 | return (((unsigned int)(n >> 43)) & 0x3f); | 660 | return (((unsigned int)(n >> 51)) & 0x3f); |
793 | } | 661 | } |
794 | 662 | ||
795 | static __inline unsigned int | 663 | static __inline unsigned int |
796 | get_SrcB_Y0(tile_bundle_bits num) | 664 | get_SrcB_X0(tilegx_bundle_bits num) |
797 | { | 665 | { |
798 | const unsigned int n = (unsigned int)num; | 666 | const unsigned int n = (unsigned int)num; |
799 | return (((n >> 12)) & 0x3f); | 667 | return (((n >> 12)) & 0x3f); |
800 | } | 668 | } |
801 | 669 | ||
802 | static __inline unsigned int | 670 | static __inline unsigned int |
803 | get_SrcB_Y1(tile_bundle_bits n) | 671 | get_SrcB_X1(tilegx_bundle_bits n) |
804 | { | 672 | { |
805 | return (((unsigned int)(n >> 43)) & 0x3f); | 673 | return (((unsigned int)(n >> 43)) & 0x3f); |
806 | } | 674 | } |
807 | 675 | ||
808 | static __inline unsigned int | 676 | static __inline unsigned int |
809 | get_Src_SN(tile_bundle_bits num) | 677 | get_SrcB_Y0(tilegx_bundle_bits num) |
810 | { | ||
811 | const unsigned int n = (unsigned int)num; | ||
812 | return (((n >> 0)) & 0x3); | ||
813 | } | ||
814 | |||
815 | static __inline unsigned int | ||
816 | get_UnOpcodeExtension_X0(tile_bundle_bits num) | ||
817 | { | ||
818 | const unsigned int n = (unsigned int)num; | ||
819 | return (((n >> 12)) & 0x1f); | ||
820 | } | ||
821 | |||
822 | static __inline unsigned int | ||
823 | get_UnOpcodeExtension_X1(tile_bundle_bits n) | ||
824 | { | ||
825 | return (((unsigned int)(n >> 43)) & 0x1f); | ||
826 | } | ||
827 | |||
828 | static __inline unsigned int | ||
829 | get_UnOpcodeExtension_Y0(tile_bundle_bits num) | ||
830 | { | 678 | { |
831 | const unsigned int n = (unsigned int)num; | 679 | const unsigned int n = (unsigned int)num; |
832 | return (((n >> 12)) & 0x1f); | 680 | return (((n >> 12)) & 0x3f); |
833 | } | 681 | } |
834 | 682 | ||
835 | static __inline unsigned int | 683 | static __inline unsigned int |
836 | get_UnOpcodeExtension_Y1(tile_bundle_bits n) | 684 | get_SrcB_Y1(tilegx_bundle_bits n) |
837 | { | 685 | { |
838 | return (((unsigned int)(n >> 43)) & 0x1f); | 686 | return (((unsigned int)(n >> 43)) & 0x3f); |
839 | } | 687 | } |
840 | 688 | ||
841 | static __inline unsigned int | 689 | static __inline unsigned int |
842 | get_UnShOpcodeExtension_X0(tile_bundle_bits num) | 690 | get_UnaryOpcodeExtension_X0(tilegx_bundle_bits num) |
843 | { | 691 | { |
844 | const unsigned int n = (unsigned int)num; | 692 | const unsigned int n = (unsigned int)num; |
845 | return (((n >> 17)) & 0x3ff); | 693 | return (((n >> 12)) & 0x3f); |
846 | } | 694 | } |
847 | 695 | ||
848 | static __inline unsigned int | 696 | static __inline unsigned int |
849 | get_UnShOpcodeExtension_X1(tile_bundle_bits n) | 697 | get_UnaryOpcodeExtension_X1(tilegx_bundle_bits n) |
850 | { | 698 | { |
851 | return (((unsigned int)(n >> 48)) & 0x3ff); | 699 | return (((unsigned int)(n >> 43)) & 0x3f); |
852 | } | 700 | } |
853 | 701 | ||
854 | static __inline unsigned int | 702 | static __inline unsigned int |
855 | get_UnShOpcodeExtension_Y0(tile_bundle_bits num) | 703 | get_UnaryOpcodeExtension_Y0(tilegx_bundle_bits num) |
856 | { | 704 | { |
857 | const unsigned int n = (unsigned int)num; | 705 | const unsigned int n = (unsigned int)num; |
858 | return (((n >> 17)) & 0x7); | 706 | return (((n >> 12)) & 0x3f); |
859 | } | 707 | } |
860 | 708 | ||
861 | static __inline unsigned int | 709 | static __inline unsigned int |
862 | get_UnShOpcodeExtension_Y1(tile_bundle_bits n) | 710 | get_UnaryOpcodeExtension_Y1(tilegx_bundle_bits n) |
863 | { | 711 | { |
864 | return (((unsigned int)(n >> 48)) & 0x7); | 712 | return (((unsigned int)(n >> 43)) & 0x3f); |
865 | } | 713 | } |
866 | 714 | ||
867 | 715 | ||
@@ -874,546 +722,441 @@ sign_extend(int n, int num_bits) | |||
874 | 722 | ||
875 | 723 | ||
876 | 724 | ||
877 | static __inline tile_bundle_bits | 725 | static __inline tilegx_bundle_bits |
878 | create_BrOff_SN(int num) | 726 | create_BFEnd_X0(int num) |
879 | { | 727 | { |
880 | const unsigned int n = (unsigned int)num; | 728 | const unsigned int n = (unsigned int)num; |
881 | return ((n & 0x3ff) << 0); | 729 | return ((n & 0x3f) << 12); |
882 | } | 730 | } |
883 | 731 | ||
884 | static __inline tile_bundle_bits | 732 | static __inline tilegx_bundle_bits |
885 | create_BrOff_X1(int num) | 733 | create_BFOpcodeExtension_X0(int num) |
886 | { | 734 | { |
887 | const unsigned int n = (unsigned int)num; | 735 | const unsigned int n = (unsigned int)num; |
888 | return (((tile_bundle_bits)(n & 0x00007fff)) << 43) | | 736 | return ((n & 0xf) << 24); |
889 | (((tile_bundle_bits)(n & 0x00018000)) << 20); | ||
890 | } | 737 | } |
891 | 738 | ||
892 | static __inline tile_bundle_bits | 739 | static __inline tilegx_bundle_bits |
893 | create_BrType_X1(int num) | 740 | create_BFStart_X0(int num) |
894 | { | 741 | { |
895 | const unsigned int n = (unsigned int)num; | 742 | const unsigned int n = (unsigned int)num; |
896 | return (((tile_bundle_bits)(n & 0xf)) << 31); | 743 | return ((n & 0x3f) << 18); |
897 | } | 744 | } |
898 | 745 | ||
899 | static __inline tile_bundle_bits | 746 | static __inline tilegx_bundle_bits |
900 | create_Dest_Imm8_X1(int num) | 747 | create_BrOff_X1(int num) |
901 | { | 748 | { |
902 | const unsigned int n = (unsigned int)num; | 749 | const unsigned int n = (unsigned int)num; |
903 | return (((tile_bundle_bits)(n & 0x0000003f)) << 31) | | 750 | return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) | |
904 | (((tile_bundle_bits)(n & 0x000000c0)) << 43); | 751 | (((tilegx_bundle_bits)(n & 0x0001ffc0)) << 37); |
905 | } | 752 | } |
906 | 753 | ||
907 | static __inline tile_bundle_bits | 754 | static __inline tilegx_bundle_bits |
908 | create_Dest_SN(int num) | 755 | create_BrType_X1(int num) |
909 | { | 756 | { |
910 | const unsigned int n = (unsigned int)num; | 757 | const unsigned int n = (unsigned int)num; |
911 | return ((n & 0x3) << 2); | 758 | return (((tilegx_bundle_bits)(n & 0x1f)) << 54); |
912 | } | 759 | } |
913 | 760 | ||
914 | static __inline tile_bundle_bits | 761 | static __inline tilegx_bundle_bits |
762 | create_Dest_Imm8_X1(int num) | ||
763 | { | ||
764 | const unsigned int n = (unsigned int)num; | ||
765 | return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) | | ||
766 | (((tilegx_bundle_bits)(n & 0x000000c0)) << 43); | ||
767 | } | ||
768 | |||
769 | static __inline tilegx_bundle_bits | ||
915 | create_Dest_X0(int num) | 770 | create_Dest_X0(int num) |
916 | { | 771 | { |
917 | const unsigned int n = (unsigned int)num; | 772 | const unsigned int n = (unsigned int)num; |
918 | return ((n & 0x3f) << 0); | 773 | return ((n & 0x3f) << 0); |
919 | } | 774 | } |
920 | 775 | ||
921 | static __inline tile_bundle_bits | 776 | static __inline tilegx_bundle_bits |
922 | create_Dest_X1(int num) | 777 | create_Dest_X1(int num) |
923 | { | 778 | { |
924 | const unsigned int n = (unsigned int)num; | 779 | const unsigned int n = (unsigned int)num; |
925 | return (((tile_bundle_bits)(n & 0x3f)) << 31); | 780 | return (((tilegx_bundle_bits)(n & 0x3f)) << 31); |
926 | } | 781 | } |
927 | 782 | ||
928 | static __inline tile_bundle_bits | 783 | static __inline tilegx_bundle_bits |
929 | create_Dest_Y0(int num) | 784 | create_Dest_Y0(int num) |
930 | { | 785 | { |
931 | const unsigned int n = (unsigned int)num; | 786 | const unsigned int n = (unsigned int)num; |
932 | return ((n & 0x3f) << 0); | 787 | return ((n & 0x3f) << 0); |
933 | } | 788 | } |
934 | 789 | ||
935 | static __inline tile_bundle_bits | 790 | static __inline tilegx_bundle_bits |
936 | create_Dest_Y1(int num) | 791 | create_Dest_Y1(int num) |
937 | { | 792 | { |
938 | const unsigned int n = (unsigned int)num; | 793 | const unsigned int n = (unsigned int)num; |
939 | return (((tile_bundle_bits)(n & 0x3f)) << 31); | 794 | return (((tilegx_bundle_bits)(n & 0x3f)) << 31); |
940 | } | 795 | } |
941 | 796 | ||
942 | static __inline tile_bundle_bits | 797 | static __inline tilegx_bundle_bits |
943 | create_Imm16_X0(int num) | 798 | create_Imm16_X0(int num) |
944 | { | 799 | { |
945 | const unsigned int n = (unsigned int)num; | 800 | const unsigned int n = (unsigned int)num; |
946 | return ((n & 0xffff) << 12); | 801 | return ((n & 0xffff) << 12); |
947 | } | 802 | } |
948 | 803 | ||
949 | static __inline tile_bundle_bits | 804 | static __inline tilegx_bundle_bits |
950 | create_Imm16_X1(int num) | 805 | create_Imm16_X1(int num) |
951 | { | 806 | { |
952 | const unsigned int n = (unsigned int)num; | 807 | const unsigned int n = (unsigned int)num; |
953 | return (((tile_bundle_bits)(n & 0xffff)) << 43); | 808 | return (((tilegx_bundle_bits)(n & 0xffff)) << 43); |
809 | } | ||
810 | |||
811 | static __inline tilegx_bundle_bits | ||
812 | create_Imm8OpcodeExtension_X0(int num) | ||
813 | { | ||
814 | const unsigned int n = (unsigned int)num; | ||
815 | return ((n & 0xff) << 20); | ||
954 | } | 816 | } |
955 | 817 | ||
956 | static __inline tile_bundle_bits | 818 | static __inline tilegx_bundle_bits |
957 | create_Imm8_SN(int num) | 819 | create_Imm8OpcodeExtension_X1(int num) |
958 | { | 820 | { |
959 | const unsigned int n = (unsigned int)num; | 821 | const unsigned int n = (unsigned int)num; |
960 | return ((n & 0xff) << 0); | 822 | return (((tilegx_bundle_bits)(n & 0xff)) << 51); |
961 | } | 823 | } |
962 | 824 | ||
963 | static __inline tile_bundle_bits | 825 | static __inline tilegx_bundle_bits |
964 | create_Imm8_X0(int num) | 826 | create_Imm8_X0(int num) |
965 | { | 827 | { |
966 | const unsigned int n = (unsigned int)num; | 828 | const unsigned int n = (unsigned int)num; |
967 | return ((n & 0xff) << 12); | 829 | return ((n & 0xff) << 12); |
968 | } | 830 | } |
969 | 831 | ||
970 | static __inline tile_bundle_bits | 832 | static __inline tilegx_bundle_bits |
971 | create_Imm8_X1(int num) | 833 | create_Imm8_X1(int num) |
972 | { | 834 | { |
973 | const unsigned int n = (unsigned int)num; | 835 | const unsigned int n = (unsigned int)num; |
974 | return (((tile_bundle_bits)(n & 0xff)) << 43); | 836 | return (((tilegx_bundle_bits)(n & 0xff)) << 43); |
975 | } | 837 | } |
976 | 838 | ||
977 | static __inline tile_bundle_bits | 839 | static __inline tilegx_bundle_bits |
978 | create_Imm8_Y0(int num) | 840 | create_Imm8_Y0(int num) |
979 | { | 841 | { |
980 | const unsigned int n = (unsigned int)num; | 842 | const unsigned int n = (unsigned int)num; |
981 | return ((n & 0xff) << 12); | 843 | return ((n & 0xff) << 12); |
982 | } | 844 | } |
983 | 845 | ||
984 | static __inline tile_bundle_bits | 846 | static __inline tilegx_bundle_bits |
985 | create_Imm8_Y1(int num) | 847 | create_Imm8_Y1(int num) |
986 | { | 848 | { |
987 | const unsigned int n = (unsigned int)num; | 849 | const unsigned int n = (unsigned int)num; |
988 | return (((tile_bundle_bits)(n & 0xff)) << 43); | 850 | return (((tilegx_bundle_bits)(n & 0xff)) << 43); |
989 | } | ||
990 | |||
991 | static __inline tile_bundle_bits | ||
992 | create_ImmOpcodeExtension_X0(int num) | ||
993 | { | ||
994 | const unsigned int n = (unsigned int)num; | ||
995 | return ((n & 0x7f) << 20); | ||
996 | } | ||
997 | |||
998 | static __inline tile_bundle_bits | ||
999 | create_ImmOpcodeExtension_X1(int num) | ||
1000 | { | ||
1001 | const unsigned int n = (unsigned int)num; | ||
1002 | return (((tile_bundle_bits)(n & 0x7f)) << 51); | ||
1003 | } | ||
1004 | |||
1005 | static __inline tile_bundle_bits | ||
1006 | create_ImmRROpcodeExtension_SN(int num) | ||
1007 | { | ||
1008 | const unsigned int n = (unsigned int)num; | ||
1009 | return ((n & 0x3) << 8); | ||
1010 | } | ||
1011 | |||
1012 | static __inline tile_bundle_bits | ||
1013 | create_JOffLong_X1(int num) | ||
1014 | { | ||
1015 | const unsigned int n = (unsigned int)num; | ||
1016 | return (((tile_bundle_bits)(n & 0x00007fff)) << 43) | | ||
1017 | (((tile_bundle_bits)(n & 0x00018000)) << 20) | | ||
1018 | (((tile_bundle_bits)(n & 0x001e0000)) << 14) | | ||
1019 | (((tile_bundle_bits)(n & 0x07e00000)) << 16) | | ||
1020 | (((tile_bundle_bits)(n & 0x18000000)) << 31); | ||
1021 | } | ||
1022 | |||
1023 | static __inline tile_bundle_bits | ||
1024 | create_JOff_X1(int num) | ||
1025 | { | ||
1026 | const unsigned int n = (unsigned int)num; | ||
1027 | return (((tile_bundle_bits)(n & 0x00007fff)) << 43) | | ||
1028 | (((tile_bundle_bits)(n & 0x00018000)) << 20) | | ||
1029 | (((tile_bundle_bits)(n & 0x001e0000)) << 14) | | ||
1030 | (((tile_bundle_bits)(n & 0x07e00000)) << 16) | | ||
1031 | (((tile_bundle_bits)(n & 0x08000000)) << 31); | ||
1032 | } | ||
1033 | |||
1034 | static __inline tile_bundle_bits | ||
1035 | create_MF_Imm15_X1(int num) | ||
1036 | { | ||
1037 | const unsigned int n = (unsigned int)num; | ||
1038 | return (((tile_bundle_bits)(n & 0x00003fff)) << 37) | | ||
1039 | (((tile_bundle_bits)(n & 0x00004000)) << 44); | ||
1040 | } | 851 | } |
1041 | 852 | ||
1042 | static __inline tile_bundle_bits | 853 | static __inline tilegx_bundle_bits |
1043 | create_MMEnd_X0(int num) | 854 | create_JumpOff_X1(int num) |
1044 | { | 855 | { |
1045 | const unsigned int n = (unsigned int)num; | 856 | const unsigned int n = (unsigned int)num; |
1046 | return ((n & 0x1f) << 18); | 857 | return (((tilegx_bundle_bits)(n & 0x7ffffff)) << 31); |
1047 | } | 858 | } |
1048 | 859 | ||
1049 | static __inline tile_bundle_bits | 860 | static __inline tilegx_bundle_bits |
1050 | create_MMEnd_X1(int num) | 861 | create_JumpOpcodeExtension_X1(int num) |
1051 | { | 862 | { |
1052 | const unsigned int n = (unsigned int)num; | 863 | const unsigned int n = (unsigned int)num; |
1053 | return (((tile_bundle_bits)(n & 0x1f)) << 49); | 864 | return (((tilegx_bundle_bits)(n & 0x1)) << 58); |
1054 | } | 865 | } |
1055 | 866 | ||
1056 | static __inline tile_bundle_bits | 867 | static __inline tilegx_bundle_bits |
1057 | create_MMStart_X0(int num) | 868 | create_MF_Imm14_X1(int num) |
1058 | { | 869 | { |
1059 | const unsigned int n = (unsigned int)num; | 870 | const unsigned int n = (unsigned int)num; |
1060 | return ((n & 0x1f) << 23); | 871 | return (((tilegx_bundle_bits)(n & 0x3fff)) << 37); |
1061 | } | 872 | } |
1062 | 873 | ||
1063 | static __inline tile_bundle_bits | 874 | static __inline tilegx_bundle_bits |
1064 | create_MMStart_X1(int num) | 875 | create_MT_Imm14_X1(int num) |
1065 | { | 876 | { |
1066 | const unsigned int n = (unsigned int)num; | 877 | const unsigned int n = (unsigned int)num; |
1067 | return (((tile_bundle_bits)(n & 0x1f)) << 54); | 878 | return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) | |
879 | (((tilegx_bundle_bits)(n & 0x00003fc0)) << 37); | ||
1068 | } | 880 | } |
1069 | 881 | ||
1070 | static __inline tile_bundle_bits | 882 | static __inline tilegx_bundle_bits |
1071 | create_MT_Imm15_X1(int num) | ||
1072 | { | ||
1073 | const unsigned int n = (unsigned int)num; | ||
1074 | return (((tile_bundle_bits)(n & 0x0000003f)) << 31) | | ||
1075 | (((tile_bundle_bits)(n & 0x00003fc0)) << 37) | | ||
1076 | (((tile_bundle_bits)(n & 0x00004000)) << 44); | ||
1077 | } | ||
1078 | |||
1079 | static __inline tile_bundle_bits | ||
1080 | create_Mode(int num) | 883 | create_Mode(int num) |
1081 | { | 884 | { |
1082 | const unsigned int n = (unsigned int)num; | 885 | const unsigned int n = (unsigned int)num; |
1083 | return (((tile_bundle_bits)(n & 0x1)) << 63); | 886 | return (((tilegx_bundle_bits)(n & 0x3)) << 62); |
1084 | } | ||
1085 | |||
1086 | static __inline tile_bundle_bits | ||
1087 | create_NoRegOpcodeExtension_SN(int num) | ||
1088 | { | ||
1089 | const unsigned int n = (unsigned int)num; | ||
1090 | return ((n & 0xf) << 0); | ||
1091 | } | ||
1092 | |||
1093 | static __inline tile_bundle_bits | ||
1094 | create_Opcode_SN(int num) | ||
1095 | { | ||
1096 | const unsigned int n = (unsigned int)num; | ||
1097 | return ((n & 0x3f) << 10); | ||
1098 | } | 887 | } |
1099 | 888 | ||
1100 | static __inline tile_bundle_bits | 889 | static __inline tilegx_bundle_bits |
1101 | create_Opcode_X0(int num) | 890 | create_Opcode_X0(int num) |
1102 | { | 891 | { |
1103 | const unsigned int n = (unsigned int)num; | 892 | const unsigned int n = (unsigned int)num; |
1104 | return ((n & 0x7) << 28); | 893 | return ((n & 0x7) << 28); |
1105 | } | 894 | } |
1106 | 895 | ||
1107 | static __inline tile_bundle_bits | 896 | static __inline tilegx_bundle_bits |
1108 | create_Opcode_X1(int num) | 897 | create_Opcode_X1(int num) |
1109 | { | 898 | { |
1110 | const unsigned int n = (unsigned int)num; | 899 | const unsigned int n = (unsigned int)num; |
1111 | return (((tile_bundle_bits)(n & 0xf)) << 59); | 900 | return (((tilegx_bundle_bits)(n & 0x7)) << 59); |
1112 | } | 901 | } |
1113 | 902 | ||
1114 | static __inline tile_bundle_bits | 903 | static __inline tilegx_bundle_bits |
1115 | create_Opcode_Y0(int num) | 904 | create_Opcode_Y0(int num) |
1116 | { | 905 | { |
1117 | const unsigned int n = (unsigned int)num; | 906 | const unsigned int n = (unsigned int)num; |
1118 | return ((n & 0xf) << 27); | 907 | return ((n & 0xf) << 27); |
1119 | } | 908 | } |
1120 | 909 | ||
1121 | static __inline tile_bundle_bits | 910 | static __inline tilegx_bundle_bits |
1122 | create_Opcode_Y1(int num) | 911 | create_Opcode_Y1(int num) |
1123 | { | 912 | { |
1124 | const unsigned int n = (unsigned int)num; | 913 | const unsigned int n = (unsigned int)num; |
1125 | return (((tile_bundle_bits)(n & 0xf)) << 59); | 914 | return (((tilegx_bundle_bits)(n & 0xf)) << 58); |
1126 | } | 915 | } |
1127 | 916 | ||
1128 | static __inline tile_bundle_bits | 917 | static __inline tilegx_bundle_bits |
1129 | create_Opcode_Y2(int num) | 918 | create_Opcode_Y2(int num) |
1130 | { | 919 | { |
1131 | const unsigned int n = (unsigned int)num; | 920 | const unsigned int n = (unsigned int)num; |
1132 | return (((tile_bundle_bits)(n & 0x7)) << 56); | 921 | return ((n & 0x00000001) << 26) | |
1133 | } | 922 | (((tilegx_bundle_bits)(n & 0x00000002)) << 56); |
1134 | |||
1135 | static __inline tile_bundle_bits | ||
1136 | create_RROpcodeExtension_SN(int num) | ||
1137 | { | ||
1138 | const unsigned int n = (unsigned int)num; | ||
1139 | return ((n & 0xf) << 4); | ||
1140 | } | 923 | } |
1141 | 924 | ||
1142 | static __inline tile_bundle_bits | 925 | static __inline tilegx_bundle_bits |
1143 | create_RRROpcodeExtension_X0(int num) | 926 | create_RRROpcodeExtension_X0(int num) |
1144 | { | 927 | { |
1145 | const unsigned int n = (unsigned int)num; | 928 | const unsigned int n = (unsigned int)num; |
1146 | return ((n & 0x1ff) << 18); | 929 | return ((n & 0x3ff) << 18); |
1147 | } | 930 | } |
1148 | 931 | ||
1149 | static __inline tile_bundle_bits | 932 | static __inline tilegx_bundle_bits |
1150 | create_RRROpcodeExtension_X1(int num) | 933 | create_RRROpcodeExtension_X1(int num) |
1151 | { | 934 | { |
1152 | const unsigned int n = (unsigned int)num; | 935 | const unsigned int n = (unsigned int)num; |
1153 | return (((tile_bundle_bits)(n & 0x1ff)) << 49); | 936 | return (((tilegx_bundle_bits)(n & 0x3ff)) << 49); |
1154 | } | 937 | } |
1155 | 938 | ||
1156 | static __inline tile_bundle_bits | 939 | static __inline tilegx_bundle_bits |
1157 | create_RRROpcodeExtension_Y0(int num) | 940 | create_RRROpcodeExtension_Y0(int num) |
1158 | { | 941 | { |
1159 | const unsigned int n = (unsigned int)num; | 942 | const unsigned int n = (unsigned int)num; |
1160 | return ((n & 0x3) << 18); | 943 | return ((n & 0x3) << 18); |
1161 | } | 944 | } |
1162 | 945 | ||
1163 | static __inline tile_bundle_bits | 946 | static __inline tilegx_bundle_bits |
1164 | create_RRROpcodeExtension_Y1(int num) | 947 | create_RRROpcodeExtension_Y1(int num) |
1165 | { | 948 | { |
1166 | const unsigned int n = (unsigned int)num; | 949 | const unsigned int n = (unsigned int)num; |
1167 | return (((tile_bundle_bits)(n & 0x3)) << 49); | 950 | return (((tilegx_bundle_bits)(n & 0x3)) << 49); |
1168 | } | 951 | } |
1169 | 952 | ||
1170 | static __inline tile_bundle_bits | 953 | static __inline tilegx_bundle_bits |
1171 | create_RouteOpcodeExtension_SN(int num) | 954 | create_ShAmt_X0(int num) |
1172 | { | 955 | { |
1173 | const unsigned int n = (unsigned int)num; | 956 | const unsigned int n = (unsigned int)num; |
1174 | return ((n & 0x3ff) << 0); | 957 | return ((n & 0x3f) << 12); |
1175 | } | 958 | } |
1176 | 959 | ||
1177 | static __inline tile_bundle_bits | 960 | static __inline tilegx_bundle_bits |
1178 | create_S_X0(int num) | 961 | create_ShAmt_X1(int num) |
1179 | { | 962 | { |
1180 | const unsigned int n = (unsigned int)num; | 963 | const unsigned int n = (unsigned int)num; |
1181 | return ((n & 0x1) << 27); | 964 | return (((tilegx_bundle_bits)(n & 0x3f)) << 43); |
1182 | } | 965 | } |
1183 | 966 | ||
1184 | static __inline tile_bundle_bits | 967 | static __inline tilegx_bundle_bits |
1185 | create_S_X1(int num) | 968 | create_ShAmt_Y0(int num) |
1186 | { | 969 | { |
1187 | const unsigned int n = (unsigned int)num; | 970 | const unsigned int n = (unsigned int)num; |
1188 | return (((tile_bundle_bits)(n & 0x1)) << 58); | 971 | return ((n & 0x3f) << 12); |
1189 | } | 972 | } |
1190 | 973 | ||
1191 | static __inline tile_bundle_bits | 974 | static __inline tilegx_bundle_bits |
1192 | create_ShAmt_X0(int num) | 975 | create_ShAmt_Y1(int num) |
1193 | { | 976 | { |
1194 | const unsigned int n = (unsigned int)num; | 977 | const unsigned int n = (unsigned int)num; |
1195 | return ((n & 0x1f) << 12); | 978 | return (((tilegx_bundle_bits)(n & 0x3f)) << 43); |
1196 | } | 979 | } |
1197 | 980 | ||
1198 | static __inline tile_bundle_bits | 981 | static __inline tilegx_bundle_bits |
1199 | create_ShAmt_X1(int num) | 982 | create_ShiftOpcodeExtension_X0(int num) |
1200 | { | 983 | { |
1201 | const unsigned int n = (unsigned int)num; | 984 | const unsigned int n = (unsigned int)num; |
1202 | return (((tile_bundle_bits)(n & 0x1f)) << 43); | 985 | return ((n & 0x3ff) << 18); |
1203 | } | 986 | } |
1204 | 987 | ||
1205 | static __inline tile_bundle_bits | 988 | static __inline tilegx_bundle_bits |
1206 | create_ShAmt_Y0(int num) | 989 | create_ShiftOpcodeExtension_X1(int num) |
1207 | { | 990 | { |
1208 | const unsigned int n = (unsigned int)num; | 991 | const unsigned int n = (unsigned int)num; |
1209 | return ((n & 0x1f) << 12); | 992 | return (((tilegx_bundle_bits)(n & 0x3ff)) << 49); |
1210 | } | 993 | } |
1211 | 994 | ||
1212 | static __inline tile_bundle_bits | 995 | static __inline tilegx_bundle_bits |
1213 | create_ShAmt_Y1(int num) | 996 | create_ShiftOpcodeExtension_Y0(int num) |
997 | { | ||
998 | const unsigned int n = (unsigned int)num; | ||
999 | return ((n & 0x3) << 18); | ||
1000 | } | ||
1001 | |||
1002 | static __inline tilegx_bundle_bits | ||
1003 | create_ShiftOpcodeExtension_Y1(int num) | ||
1214 | { | 1004 | { |
1215 | const unsigned int n = (unsigned int)num; | 1005 | const unsigned int n = (unsigned int)num; |
1216 | return (((tile_bundle_bits)(n & 0x1f)) << 43); | 1006 | return (((tilegx_bundle_bits)(n & 0x3)) << 49); |
1217 | } | 1007 | } |
1218 | 1008 | ||
1219 | static __inline tile_bundle_bits | 1009 | static __inline tilegx_bundle_bits |
1220 | create_SrcA_X0(int num) | 1010 | create_SrcA_X0(int num) |
1221 | { | 1011 | { |
1222 | const unsigned int n = (unsigned int)num; | 1012 | const unsigned int n = (unsigned int)num; |
1223 | return ((n & 0x3f) << 6); | 1013 | return ((n & 0x3f) << 6); |
1224 | } | 1014 | } |
1225 | 1015 | ||
1226 | static __inline tile_bundle_bits | 1016 | static __inline tilegx_bundle_bits |
1227 | create_SrcA_X1(int num) | 1017 | create_SrcA_X1(int num) |
1228 | { | 1018 | { |
1229 | const unsigned int n = (unsigned int)num; | 1019 | const unsigned int n = (unsigned int)num; |
1230 | return (((tile_bundle_bits)(n & 0x3f)) << 37); | 1020 | return (((tilegx_bundle_bits)(n & 0x3f)) << 37); |
1231 | } | 1021 | } |
1232 | 1022 | ||
1233 | static __inline tile_bundle_bits | 1023 | static __inline tilegx_bundle_bits |
1234 | create_SrcA_Y0(int num) | 1024 | create_SrcA_Y0(int num) |
1235 | { | 1025 | { |
1236 | const unsigned int n = (unsigned int)num; | 1026 | const unsigned int n = (unsigned int)num; |
1237 | return ((n & 0x3f) << 6); | 1027 | return ((n & 0x3f) << 6); |
1238 | } | 1028 | } |
1239 | 1029 | ||
1240 | static __inline tile_bundle_bits | 1030 | static __inline tilegx_bundle_bits |
1241 | create_SrcA_Y1(int num) | 1031 | create_SrcA_Y1(int num) |
1242 | { | 1032 | { |
1243 | const unsigned int n = (unsigned int)num; | 1033 | const unsigned int n = (unsigned int)num; |
1244 | return (((tile_bundle_bits)(n & 0x3f)) << 37); | 1034 | return (((tilegx_bundle_bits)(n & 0x3f)) << 37); |
1245 | } | 1035 | } |
1246 | 1036 | ||
1247 | static __inline tile_bundle_bits | 1037 | static __inline tilegx_bundle_bits |
1248 | create_SrcA_Y2(int num) | 1038 | create_SrcA_Y2(int num) |
1249 | { | 1039 | { |
1250 | const unsigned int n = (unsigned int)num; | 1040 | const unsigned int n = (unsigned int)num; |
1251 | return ((n & 0x00000001) << 26) | | 1041 | return ((n & 0x3f) << 20); |
1252 | (((tile_bundle_bits)(n & 0x0000003e)) << 50); | ||
1253 | } | 1042 | } |
1254 | 1043 | ||
1255 | static __inline tile_bundle_bits | 1044 | static __inline tilegx_bundle_bits |
1256 | create_SrcBDest_Y2(int num) | 1045 | create_SrcBDest_Y2(int num) |
1257 | { | 1046 | { |
1258 | const unsigned int n = (unsigned int)num; | 1047 | const unsigned int n = (unsigned int)num; |
1259 | return ((n & 0x3f) << 20); | 1048 | return (((tilegx_bundle_bits)(n & 0x3f)) << 51); |
1260 | } | 1049 | } |
1261 | 1050 | ||
1262 | static __inline tile_bundle_bits | 1051 | static __inline tilegx_bundle_bits |
1263 | create_SrcB_X0(int num) | 1052 | create_SrcB_X0(int num) |
1264 | { | 1053 | { |
1265 | const unsigned int n = (unsigned int)num; | 1054 | const unsigned int n = (unsigned int)num; |
1266 | return ((n & 0x3f) << 12); | 1055 | return ((n & 0x3f) << 12); |
1267 | } | 1056 | } |
1268 | 1057 | ||
1269 | static __inline tile_bundle_bits | 1058 | static __inline tilegx_bundle_bits |
1270 | create_SrcB_X1(int num) | 1059 | create_SrcB_X1(int num) |
1271 | { | 1060 | { |
1272 | const unsigned int n = (unsigned int)num; | 1061 | const unsigned int n = (unsigned int)num; |
1273 | return (((tile_bundle_bits)(n & 0x3f)) << 43); | 1062 | return (((tilegx_bundle_bits)(n & 0x3f)) << 43); |
1274 | } | 1063 | } |
1275 | 1064 | ||
1276 | static __inline tile_bundle_bits | 1065 | static __inline tilegx_bundle_bits |
1277 | create_SrcB_Y0(int num) | 1066 | create_SrcB_Y0(int num) |
1278 | { | 1067 | { |
1279 | const unsigned int n = (unsigned int)num; | 1068 | const unsigned int n = (unsigned int)num; |
1280 | return ((n & 0x3f) << 12); | 1069 | return ((n & 0x3f) << 12); |
1281 | } | 1070 | } |
1282 | 1071 | ||
1283 | static __inline tile_bundle_bits | 1072 | static __inline tilegx_bundle_bits |
1284 | create_SrcB_Y1(int num) | 1073 | create_SrcB_Y1(int num) |
1285 | { | 1074 | { |
1286 | const unsigned int n = (unsigned int)num; | 1075 | const unsigned int n = (unsigned int)num; |
1287 | return (((tile_bundle_bits)(n & 0x3f)) << 43); | 1076 | return (((tilegx_bundle_bits)(n & 0x3f)) << 43); |
1288 | } | ||
1289 | |||
1290 | static __inline tile_bundle_bits | ||
1291 | create_Src_SN(int num) | ||
1292 | { | ||
1293 | const unsigned int n = (unsigned int)num; | ||
1294 | return ((n & 0x3) << 0); | ||
1295 | } | ||
1296 | |||
1297 | static __inline tile_bundle_bits | ||
1298 | create_UnOpcodeExtension_X0(int num) | ||
1299 | { | ||
1300 | const unsigned int n = (unsigned int)num; | ||
1301 | return ((n & 0x1f) << 12); | ||
1302 | } | ||
1303 | |||
1304 | static __inline tile_bundle_bits | ||
1305 | create_UnOpcodeExtension_X1(int num) | ||
1306 | { | ||
1307 | const unsigned int n = (unsigned int)num; | ||
1308 | return (((tile_bundle_bits)(n & 0x1f)) << 43); | ||
1309 | } | ||
1310 | |||
1311 | static __inline tile_bundle_bits | ||
1312 | create_UnOpcodeExtension_Y0(int num) | ||
1313 | { | ||
1314 | const unsigned int n = (unsigned int)num; | ||
1315 | return ((n & 0x1f) << 12); | ||
1316 | } | 1077 | } |
1317 | 1078 | ||
1318 | static __inline tile_bundle_bits | 1079 | static __inline tilegx_bundle_bits |
1319 | create_UnOpcodeExtension_Y1(int num) | 1080 | create_UnaryOpcodeExtension_X0(int num) |
1320 | { | 1081 | { |
1321 | const unsigned int n = (unsigned int)num; | 1082 | const unsigned int n = (unsigned int)num; |
1322 | return (((tile_bundle_bits)(n & 0x1f)) << 43); | 1083 | return ((n & 0x3f) << 12); |
1323 | } | ||
1324 | |||
1325 | static __inline tile_bundle_bits | ||
1326 | create_UnShOpcodeExtension_X0(int num) | ||
1327 | { | ||
1328 | const unsigned int n = (unsigned int)num; | ||
1329 | return ((n & 0x3ff) << 17); | ||
1330 | } | 1084 | } |
1331 | 1085 | ||
1332 | static __inline tile_bundle_bits | 1086 | static __inline tilegx_bundle_bits |
1333 | create_UnShOpcodeExtension_X1(int num) | 1087 | create_UnaryOpcodeExtension_X1(int num) |
1334 | { | 1088 | { |
1335 | const unsigned int n = (unsigned int)num; | 1089 | const unsigned int n = (unsigned int)num; |
1336 | return (((tile_bundle_bits)(n & 0x3ff)) << 48); | 1090 | return (((tilegx_bundle_bits)(n & 0x3f)) << 43); |
1337 | } | 1091 | } |
1338 | 1092 | ||
1339 | static __inline tile_bundle_bits | 1093 | static __inline tilegx_bundle_bits |
1340 | create_UnShOpcodeExtension_Y0(int num) | 1094 | create_UnaryOpcodeExtension_Y0(int num) |
1341 | { | 1095 | { |
1342 | const unsigned int n = (unsigned int)num; | 1096 | const unsigned int n = (unsigned int)num; |
1343 | return ((n & 0x7) << 17); | 1097 | return ((n & 0x3f) << 12); |
1344 | } | 1098 | } |
1345 | 1099 | ||
1346 | static __inline tile_bundle_bits | 1100 | static __inline tilegx_bundle_bits |
1347 | create_UnShOpcodeExtension_Y1(int num) | 1101 | create_UnaryOpcodeExtension_Y1(int num) |
1348 | { | 1102 | { |
1349 | const unsigned int n = (unsigned int)num; | 1103 | const unsigned int n = (unsigned int)num; |
1350 | return (((tile_bundle_bits)(n & 0x7)) << 48); | 1104 | return (((tilegx_bundle_bits)(n & 0x3f)) << 43); |
1351 | } | 1105 | } |
1352 | 1106 | ||
1353 | 1107 | ||
1354 | |||
1355 | typedef enum | 1108 | typedef enum |
1356 | { | 1109 | { |
1357 | TILE_PIPELINE_X0, | 1110 | TILEGX_PIPELINE_X0, |
1358 | TILE_PIPELINE_X1, | 1111 | TILEGX_PIPELINE_X1, |
1359 | TILE_PIPELINE_Y0, | 1112 | TILEGX_PIPELINE_Y0, |
1360 | TILE_PIPELINE_Y1, | 1113 | TILEGX_PIPELINE_Y1, |
1361 | TILE_PIPELINE_Y2, | 1114 | TILEGX_PIPELINE_Y2, |
1362 | } tile_pipeline; | 1115 | } tilegx_pipeline; |
1363 | 1116 | ||
1364 | #define tile_is_x_pipeline(p) ((int)(p) <= (int)TILE_PIPELINE_X1) | 1117 | #define tilegx_is_x_pipeline(p) ((int)(p) <= (int)TILEGX_PIPELINE_X1) |
1365 | 1118 | ||
1366 | typedef enum | 1119 | typedef enum |
1367 | { | 1120 | { |
1368 | TILE_OP_TYPE_REGISTER, | 1121 | TILEGX_OP_TYPE_REGISTER, |
1369 | TILE_OP_TYPE_IMMEDIATE, | 1122 | TILEGX_OP_TYPE_IMMEDIATE, |
1370 | TILE_OP_TYPE_ADDRESS, | 1123 | TILEGX_OP_TYPE_ADDRESS, |
1371 | TILE_OP_TYPE_SPR | 1124 | TILEGX_OP_TYPE_SPR |
1372 | } tile_operand_type; | 1125 | } tilegx_operand_type; |
1373 | 1126 | ||
1374 | /* This is the bit that determines if a bundle is in the Y encoding. */ | 1127 | /* These are the bits that determine if a bundle is in the X encoding. */ |
1375 | #define TILE_BUNDLE_Y_ENCODING_MASK ((tile_bundle_bits)1 << 63) | 1128 | #define TILEGX_BUNDLE_MODE_MASK ((tilegx_bundle_bits)3 << 62) |
1376 | 1129 | ||
1377 | enum | 1130 | enum |
1378 | { | 1131 | { |
1379 | /* Maximum number of instructions in a bundle (2 for X, 3 for Y). */ | 1132 | /* Maximum number of instructions in a bundle (2 for X, 3 for Y). */ |
1380 | TILE_MAX_INSTRUCTIONS_PER_BUNDLE = 3, | 1133 | TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE = 3, |
1381 | 1134 | ||
1382 | /* How many different pipeline encodings are there? X0, X1, Y0, Y1, Y2. */ | 1135 | /* How many different pipeline encodings are there? X0, X1, Y0, Y1, Y2. */ |
1383 | TILE_NUM_PIPELINE_ENCODINGS = 5, | 1136 | TILEGX_NUM_PIPELINE_ENCODINGS = 5, |
1384 | 1137 | ||
1385 | /* Log base 2 of TILE_BUNDLE_SIZE_IN_BYTES. */ | 1138 | /* Log base 2 of TILEGX_BUNDLE_SIZE_IN_BYTES. */ |
1386 | TILE_LOG2_BUNDLE_SIZE_IN_BYTES = 3, | 1139 | TILEGX_LOG2_BUNDLE_SIZE_IN_BYTES = 3, |
1387 | 1140 | ||
1388 | /* Instructions take this many bytes. */ | 1141 | /* Instructions take this many bytes. */ |
1389 | TILE_BUNDLE_SIZE_IN_BYTES = 1 << TILE_LOG2_BUNDLE_SIZE_IN_BYTES, | 1142 | TILEGX_BUNDLE_SIZE_IN_BYTES = 1 << TILEGX_LOG2_BUNDLE_SIZE_IN_BYTES, |
1390 | 1143 | ||
1391 | /* Log base 2 of TILE_BUNDLE_ALIGNMENT_IN_BYTES. */ | 1144 | /* Log base 2 of TILEGX_BUNDLE_ALIGNMENT_IN_BYTES. */ |
1392 | TILE_LOG2_BUNDLE_ALIGNMENT_IN_BYTES = 3, | 1145 | TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES = 3, |
1393 | 1146 | ||
1394 | /* Bundles should be aligned modulo this number of bytes. */ | 1147 | /* Bundles should be aligned modulo this number of bytes. */ |
1395 | TILE_BUNDLE_ALIGNMENT_IN_BYTES = | 1148 | TILEGX_BUNDLE_ALIGNMENT_IN_BYTES = |
1396 | (1 << TILE_LOG2_BUNDLE_ALIGNMENT_IN_BYTES), | 1149 | (1 << TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES), |
1397 | |||
1398 | /* Log base 2 of TILE_SN_INSTRUCTION_SIZE_IN_BYTES. */ | ||
1399 | TILE_LOG2_SN_INSTRUCTION_SIZE_IN_BYTES = 1, | ||
1400 | |||
1401 | /* Static network instructions take this many bytes. */ | ||
1402 | TILE_SN_INSTRUCTION_SIZE_IN_BYTES = | ||
1403 | (1 << TILE_LOG2_SN_INSTRUCTION_SIZE_IN_BYTES), | ||
1404 | 1150 | ||
1405 | /* Number of registers (some are magic, such as network I/O). */ | 1151 | /* Number of registers (some are magic, such as network I/O). */ |
1406 | TILE_NUM_REGISTERS = 64, | 1152 | TILEGX_NUM_REGISTERS = 64, |
1407 | |||
1408 | /* Number of static network registers. */ | ||
1409 | TILE_NUM_SN_REGISTERS = 4 | ||
1410 | }; | 1153 | }; |
1411 | 1154 | ||
1412 | 1155 | ||
1413 | struct tile_operand | 1156 | struct tilegx_operand |
1414 | { | 1157 | { |
1415 | /* Is this operand a register, immediate or address? */ | 1158 | /* Is this operand a register, immediate or address? */ |
1416 | tile_operand_type type; | 1159 | tilegx_operand_type type; |
1417 | 1160 | ||
1418 | /* The default relocation type for this operand. */ | 1161 | /* The default relocation type for this operand. */ |
1419 | signed int default_reloc : 16; | 1162 | signed int default_reloc : 16; |
@@ -1437,27 +1180,27 @@ struct tile_operand | |||
1437 | unsigned int rightshift : 2; | 1180 | unsigned int rightshift : 2; |
1438 | 1181 | ||
1439 | /* Return the bits for this operand to be ORed into an existing bundle. */ | 1182 | /* Return the bits for this operand to be ORed into an existing bundle. */ |
1440 | tile_bundle_bits (*insert) (int op); | 1183 | tilegx_bundle_bits (*insert) (int op); |
1441 | 1184 | ||
1442 | /* Extract this operand and return it. */ | 1185 | /* Extract this operand and return it. */ |
1443 | unsigned int (*extract) (tile_bundle_bits bundle); | 1186 | unsigned int (*extract) (tilegx_bundle_bits bundle); |
1444 | }; | 1187 | }; |
1445 | 1188 | ||
1446 | 1189 | ||
1447 | extern const struct tile_operand tile_operands[]; | 1190 | extern const struct tilegx_operand tilegx_operands[]; |
1448 | 1191 | ||
1449 | /* One finite-state machine per pipe for rapid instruction decoding. */ | 1192 | /* One finite-state machine per pipe for rapid instruction decoding. */ |
1450 | extern const unsigned short * const | 1193 | extern const unsigned short * const |
1451 | tile_bundle_decoder_fsms[TILE_NUM_PIPELINE_ENCODINGS]; | 1194 | tilegx_bundle_decoder_fsms[TILEGX_NUM_PIPELINE_ENCODINGS]; |
1452 | 1195 | ||
1453 | 1196 | ||
1454 | struct tile_opcode | 1197 | struct tilegx_opcode |
1455 | { | 1198 | { |
1456 | /* The opcode mnemonic, e.g. "add" */ | 1199 | /* The opcode mnemonic, e.g. "add" */ |
1457 | const char *name; | 1200 | const char *name; |
1458 | 1201 | ||
1459 | /* The enum value for this mnemonic. */ | 1202 | /* The enum value for this mnemonic. */ |
1460 | tile_mnemonic mnemonic; | 1203 | tilegx_mnemonic mnemonic; |
1461 | 1204 | ||
1462 | /* A bit mask of which of the five pipes this instruction | 1205 | /* A bit mask of which of the five pipes this instruction |
1463 | is compatible with: | 1206 | is compatible with: |
@@ -1478,36 +1221,28 @@ struct tile_opcode | |||
1478 | unsigned char can_bundle; | 1221 | unsigned char can_bundle; |
1479 | 1222 | ||
1480 | /* The description of the operands. Each of these is an | 1223 | /* The description of the operands. Each of these is an |
1481 | * index into the tile_operands[] table. */ | 1224 | * index into the tilegx_operands[] table. */ |
1482 | unsigned char operands[TILE_NUM_PIPELINE_ENCODINGS][TILE_MAX_OPERANDS]; | 1225 | unsigned char operands[TILEGX_NUM_PIPELINE_ENCODINGS][TILEGX_MAX_OPERANDS]; |
1483 | 1226 | ||
1484 | }; | 1227 | }; |
1485 | 1228 | ||
1486 | extern const struct tile_opcode tile_opcodes[]; | 1229 | extern const struct tilegx_opcode tilegx_opcodes[]; |
1487 | |||
1488 | 1230 | ||
1489 | /* Used for non-textual disassembly into structs. */ | 1231 | /* Used for non-textual disassembly into structs. */ |
1490 | struct tile_decoded_instruction | 1232 | struct tilegx_decoded_instruction |
1491 | { | 1233 | { |
1492 | const struct tile_opcode *opcode; | 1234 | const struct tilegx_opcode *opcode; |
1493 | const struct tile_operand *operands[TILE_MAX_OPERANDS]; | 1235 | const struct tilegx_operand *operands[TILEGX_MAX_OPERANDS]; |
1494 | int operand_values[TILE_MAX_OPERANDS]; | 1236 | long long operand_values[TILEGX_MAX_OPERANDS]; |
1495 | }; | 1237 | }; |
1496 | 1238 | ||
1497 | 1239 | ||
1498 | /* Disassemble a bundle into a struct for machine processing. */ | 1240 | /* Disassemble a bundle into a struct for machine processing. */ |
1499 | extern int parse_insn_tile(tile_bundle_bits bits, | 1241 | extern int parse_insn_tilegx(tilegx_bundle_bits bits, |
1500 | unsigned int pc, | 1242 | unsigned long long pc, |
1501 | struct tile_decoded_instruction | 1243 | struct tilegx_decoded_instruction |
1502 | decoded[TILE_MAX_INSTRUCTIONS_PER_BUNDLE]); | 1244 | decoded[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE]); |
1503 | |||
1504 | |||
1505 | /* Given a set of bundle bits and a specific pipe, returns which | ||
1506 | * instruction the bundle contains in that pipe. | ||
1507 | */ | ||
1508 | extern const struct tile_opcode * | ||
1509 | find_opcode(tile_bundle_bits bits, tile_pipeline pipe); | ||
1510 | 1245 | ||
1511 | 1246 | ||
1512 | 1247 | ||
1513 | #endif /* opcode_tile_h */ | 1248 | #endif /* opcode_tilegx_h */ |