7 files changed, 13 insertions, 119 deletions

diff --git a/arch/sparc/kernel/leon_pci.c b/arch/sparc/kernel/leon_pci.c
index 19f56058742b..21dcda75a520 100644
--- a/arch/sparc/kernel/leon_pci.c
+++ b/arch/sparc/kernel/leon_pci.c
@@ -91,14 +91,6 @@ void __devinit pcibios_fixup_bus(struct pci_bus *pbus)
         }
 }
 
-/*
- * Other archs parse arguments here.
- */
-char * __devinit pcibios_setup(char *str)
-{
-        return str;
-}
-
 resource_size_t pcibios_align_resource(void *data, const struct resource *res,
                                 resource_size_t size, resource_size_t align)
 {
diff --git a/arch/sparc/kernel/of_device_64.c b/arch/sparc/kernel/of_device_64.c
index 7a3be6f6737a..7bbdc26d9512 100644
--- a/arch/sparc/kernel/of_device_64.c
+++ b/arch/sparc/kernel/of_device_64.c
@@ -580,7 +580,7 @@ static unsigned int __init build_one_device_irq(struct platform_device *op,
                                 printk("%s: Apply [%s:%x] imap --> [%s:%x]\n",
                                        op->dev.of_node->full_name,
                                        pp->full_name, this_orig_irq,
-                                       (iret ? iret->full_name : "NULL"), irq);
+                                       of_node_full_name(iret), irq);
 
                         if (!iret)
                                 break;
diff --git a/arch/sparc/kernel/pci.c b/arch/sparc/kernel/pci.c
index fdaf21811670..065b88c4f868 100644
--- a/arch/sparc/kernel/pci.c
+++ b/arch/sparc/kernel/pci.c
@@ -375,93 +375,6 @@ static void __devinit apb_calc_first_last(u8 map, u32 *first_p, u32 *last_p)
         *last_p = last;
 }
 
-/* For PCI bus devices which lack a 'ranges' property we interrogate
- * the config space values to set the resources, just like the generic
- * Linux PCI probing code does.
- */
-static void __devinit pci_cfg_fake_ranges(struct pci_dev *dev,
-                                          struct pci_bus *bus,
-                                          struct pci_pbm_info *pbm)
-{
-        struct pci_bus_region region;
-        struct resource *res, res2;
-        u8 io_base_lo, io_limit_lo;
-        u16 mem_base_lo, mem_limit_lo;
-        unsigned long base, limit;
-
-        pci_read_config_byte(dev, PCI_IO_BASE, &io_base_lo);
-        pci_read_config_byte(dev, PCI_IO_LIMIT, &io_limit_lo);
-        base = (io_base_lo & PCI_IO_RANGE_MASK) << 8;
-        limit = (io_limit_lo & PCI_IO_RANGE_MASK) << 8;
-
-        if ((io_base_lo & PCI_IO_RANGE_TYPE_MASK) == PCI_IO_RANGE_TYPE_32) {
-                u16 io_base_hi, io_limit_hi;
-
-                pci_read_config_word(dev, PCI_IO_BASE_UPPER16, &io_base_hi);
-                pci_read_config_word(dev, PCI_IO_LIMIT_UPPER16, &io_limit_hi);
-                base |= (io_base_hi << 16);
-                limit |= (io_limit_hi << 16);
-        }
-
-        res = bus->resource[0];
-        if (base <= limit) {
-                res->flags = (io_base_lo & PCI_IO_RANGE_TYPE_MASK) | IORESOURCE_IO;
-                res2.flags = res->flags;
-                region.start = base;
-                region.end = limit + 0xfff;
-                pcibios_bus_to_resource(dev, &res2, &region);
-                if (!res->start)
-                        res->start = res2.start;
-                if (!res->end)
-                        res->end = res2.end;
-        }
-
-        pci_read_config_word(dev, PCI_MEMORY_BASE, &mem_base_lo);
-        pci_read_config_word(dev, PCI_MEMORY_LIMIT, &mem_limit_lo);
-        base = (mem_base_lo & PCI_MEMORY_RANGE_MASK) << 16;
-        limit = (mem_limit_lo & PCI_MEMORY_RANGE_MASK) << 16;
-
-        res = bus->resource[1];
-        if (base <= limit) {
-                res->flags = ((mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) |
-                              IORESOURCE_MEM);
-                region.start = base;
-                region.end = limit + 0xfffff;
-                pcibios_bus_to_resource(dev, res, &region);
-        }
-
-        pci_read_config_word(dev, PCI_PREF_MEMORY_BASE, &mem_base_lo);
-        pci_read_config_word(dev, PCI_PREF_MEMORY_LIMIT, &mem_limit_lo);
-        base = (mem_base_lo & PCI_PREF_RANGE_MASK) << 16;
-        limit = (mem_limit_lo & PCI_PREF_RANGE_MASK) << 16;
-
-        if ((mem_base_lo & PCI_PREF_RANGE_TYPE_MASK) == PCI_PREF_RANGE_TYPE_64) {
-                u32 mem_base_hi, mem_limit_hi;
-
-                pci_read_config_dword(dev, PCI_PREF_BASE_UPPER32, &mem_base_hi);
-                pci_read_config_dword(dev, PCI_PREF_LIMIT_UPPER32, &mem_limit_hi);
-
-                /*
-                 * Some bridges set the base > limit by default, and some
-                 * (broken) BIOSes do not initialize them.  If we find
-                 * this, just assume they are not being used.
-                 */
-                if (mem_base_hi <= mem_limit_hi) {
-                        base |= ((long) mem_base_hi) << 32;
-                        limit |= ((long) mem_limit_hi) << 32;
-                }
-        }
-
-        res = bus->resource[2];
-        if (base <= limit) {
-                res->flags = ((mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) |
-                              IORESOURCE_MEM | IORESOURCE_PREFETCH);
-                region.start = base;
-                region.end = limit + 0xfffff;
-                pcibios_bus_to_resource(dev, res, &region);
-        }
-}
-
 /* Cook up fake bus resources for SUNW,simba PCI bridges which lack
  * a proper 'ranges' property.
  */
@@ -535,7 +448,7 @@ static void __devinit of_scan_pci_bridge(struct pci_pbm_info *pbm,
         }
 
         bus->primary = dev->bus->number;
-        bus->subordinate = busrange[1];
+        pci_bus_insert_busn_res(bus, busrange[0], busrange[1]);
         bus->bridge_ctl = 0;
 
         /* parse ranges property, or cook one up by hand for Simba */
@@ -550,7 +463,7 @@ static void __devinit of_scan_pci_bridge(struct pci_pbm_info *pbm,
                 apb_fake_ranges(dev, bus, pbm);
                 goto after_ranges;
         } else if (ranges == NULL) {
-                pci_cfg_fake_ranges(dev, bus, pbm);
+                pci_read_bridge_bases(bus);
                 goto after_ranges;
         }
         i = 1;
@@ -685,6 +598,10 @@ struct pci_bus * __devinit pci_scan_one_pbm(struct pci_pbm_info *pbm,
                                 pbm->io_space.start);
         pci_add_resource_offset(&resources, &pbm->mem_space,
                                 pbm->mem_space.start);
+        pbm->busn.start = pbm->pci_first_busno;
+        pbm->busn.end   = pbm->pci_last_busno;
+        pbm->busn.flags = IORESOURCE_BUS;
+        pci_add_resource(&resources, &pbm->busn);
         bus = pci_create_root_bus(parent, pbm->pci_first_busno, pbm->pci_ops,
                                   pbm, &resources);
         if (!bus) {
@@ -693,8 +610,6 @@ struct pci_bus * __devinit pci_scan_one_pbm(struct pci_pbm_info *pbm,
                 pci_free_resource_list(&resources);
                 return NULL;
         }
-        bus->secondary = pbm->pci_first_busno;
-        bus->subordinate = pbm->pci_last_busno;
 
         pci_of_scan_bus(pbm, node, bus);
         pci_bus_add_devices(bus);
@@ -747,11 +662,6 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
         return 0;
 }
 
-char * __devinit pcibios_setup(char *str)
-{
-        return str;
-}
-
 /* Platform support for /proc/bus/pci/X/Y mmap()s. */
 
 /* If the user uses a host-bridge as the PCI device, he may use
diff --git a/arch/sparc/kernel/pci_impl.h b/arch/sparc/kernel/pci_impl.h
index 6beb60df31d0..918a2031c8bb 100644
--- a/arch/sparc/kernel/pci_impl.h
+++ b/arch/sparc/kernel/pci_impl.h
@@ -97,6 +97,7 @@ struct pci_pbm_info {
         /* PBM I/O and Memory space resources. */
         struct resource                 io_space;
         struct resource                 mem_space;
+        struct resource                 busn;
 
         /* Base of PCI Config space, can be per-PBM or shared. */
         unsigned long                   config_space;
diff --git a/arch/sparc/kernel/pcic.c b/arch/sparc/kernel/pcic.c
index 46ba84998f16..521fdf1b20e5 100644
--- a/arch/sparc/kernel/pcic.c
+++ b/arch/sparc/kernel/pcic.c
@@ -767,14 +767,6 @@ static void watchdog_reset() {
 }
 #endif
 
-/*
- * Other archs parse arguments here.
- */
-char * __devinit pcibios_setup(char *str)
-{
-        return str;
-}
-
 resource_size_t pcibios_align_resource(void *data, const struct resource *res,
                                 resource_size_t size, resource_size_t align)
 {
diff --git a/arch/sparc/kernel/smp_64.c b/arch/sparc/kernel/smp_64.c
index f591598d92f6..781bcb10b8bd 100644
--- a/arch/sparc/kernel/smp_64.c
+++ b/arch/sparc/kernel/smp_64.c
@@ -103,8 +103,6 @@ void __cpuinit smp_callin(void)
         if (cheetah_pcache_forced_on)
                 cheetah_enable_pcache();
 
-        local_irq_enable();
-
         callin_flag = 1;
         __asm__ __volatile__("membar #Sync\n\t"
                              "flush  %%g6" : : : "memory");
@@ -124,9 +122,8 @@ void __cpuinit smp_callin(void)
         while (!cpumask_test_cpu(cpuid, &smp_commenced_mask))
                 rmb();
 
-        ipi_call_lock_irq();
         set_cpu_online(cpuid, true);
-        ipi_call_unlock_irq();
+        local_irq_enable();
 
         /* idle thread is expected to have preempt disabled */
         preempt_disable();
@@ -1308,9 +1305,7 @@ int __cpu_disable(void)
         mdelay(1);
         local_irq_disable();
 
-        ipi_call_lock();
         set_cpu_online(cpu, false);
-        ipi_call_unlock();
 
         cpu_map_rebuild();
 
diff --git a/arch/sparc/net/bpf_jit_comp.c b/arch/sparc/net/bpf_jit_comp.c
index 1a69244e785b..e9073e9501b3 100644
--- a/arch/sparc/net/bpf_jit_comp.c
+++ b/arch/sparc/net/bpf_jit_comp.c
@@ -96,6 +96,7 @@ static void bpf_flush_icache(void *start_, void *end_)
 #define AND             F3(2, 0x01)
 #define ANDCC           F3(2, 0x11)
 #define OR              F3(2, 0x02)
+#define XOR             F3(2, 0x03)
 #define SUB             F3(2, 0x04)
 #define SUBCC           F3(2, 0x14)
 #define MUL             F3(2, 0x0a)     /* umul */
@@ -462,6 +463,9 @@ void bpf_jit_compile(struct sk_filter *fp)
                         case BPF_S_ALU_OR_K:    /* A |= K */
                                 emit_alu_K(OR, K);
                                 break;
+                        case BPF_S_ANC_ALU_XOR_X: /* A ^= X; */
+                                emit_alu_X(XOR);
+                                break;
                         case BPF_S_ALU_LSH_X:   /* A <<= X */
                                 emit_alu_X(SLL);
                                 break;