diff options
Diffstat (limited to 'arch/sparc64')
-rw-r--r-- | arch/sparc64/kernel/entry.h | 27 | ||||
-rw-r--r-- | arch/sparc64/kernel/irq.c | 21 |
2 files changed, 29 insertions, 19 deletions
diff --git a/arch/sparc64/kernel/entry.h b/arch/sparc64/kernel/entry.h index a5084d6821ba..e66d94c7caff 100644 --- a/arch/sparc64/kernel/entry.h +++ b/arch/sparc64/kernel/entry.h | |||
@@ -153,4 +153,31 @@ struct cheetah_err_info { | |||
153 | */ | 153 | */ |
154 | extern struct cheetah_err_info *cheetah_error_log; | 154 | extern struct cheetah_err_info *cheetah_error_log; |
155 | 155 | ||
156 | /* UPA nodes send interrupt packet to UltraSparc with first data reg | ||
157 | * value low 5 (7 on Starfire) bits holding the IRQ identifier being | ||
158 | * delivered. We must translate this into a non-vector IRQ so we can | ||
159 | * set the softint on this cpu. | ||
160 | * | ||
161 | * To make processing these packets efficient and race free we use | ||
162 | * an array of irq buckets below. The interrupt vector handler in | ||
163 | * entry.S feeds incoming packets into per-cpu pil-indexed lists. | ||
164 | * | ||
165 | * If you make changes to ino_bucket, please update hand coded assembler | ||
166 | * of the vectored interrupt trap handler(s) in entry.S and sun4v_ivec.S | ||
167 | */ | ||
168 | struct ino_bucket { | ||
169 | /*0x00*/unsigned long __irq_chain_pa; | ||
170 | |||
171 | /* Virtual interrupt number assigned to this INO. */ | ||
172 | /*0x08*/unsigned int __virt_irq; | ||
173 | /*0x0c*/unsigned int __pad; | ||
174 | }; | ||
175 | |||
176 | extern struct ino_bucket *ivector_table; | ||
177 | extern unsigned long ivector_table_pa; | ||
178 | |||
179 | extern void handler_irq(int irq, struct pt_regs *regs); | ||
180 | extern void init_irqwork_curcpu(void); | ||
181 | extern void __cpuinit sun4v_register_mondo_queues(int this_cpu); | ||
182 | |||
156 | #endif /* _ENTRY_H */ | 183 | #endif /* _ENTRY_H */ |
diff --git a/arch/sparc64/kernel/irq.c b/arch/sparc64/kernel/irq.c index 5ec06c8c7fea..eb88bd6e674e 100644 --- a/arch/sparc64/kernel/irq.c +++ b/arch/sparc64/kernel/irq.c | |||
@@ -44,27 +44,10 @@ | |||
44 | #include <asm/hypervisor.h> | 44 | #include <asm/hypervisor.h> |
45 | #include <asm/cacheflush.h> | 45 | #include <asm/cacheflush.h> |
46 | 46 | ||
47 | /* UPA nodes send interrupt packet to UltraSparc with first data reg | 47 | #include "entry.h" |
48 | * value low 5 (7 on Starfire) bits holding the IRQ identifier being | ||
49 | * delivered. We must translate this into a non-vector IRQ so we can | ||
50 | * set the softint on this cpu. | ||
51 | * | ||
52 | * To make processing these packets efficient and race free we use | ||
53 | * an array of irq buckets below. The interrupt vector handler in | ||
54 | * entry.S feeds incoming packets into per-cpu pil-indexed lists. | ||
55 | * | ||
56 | * If you make changes to ino_bucket, please update hand coded assembler | ||
57 | * of the vectored interrupt trap handler(s) in entry.S and sun4v_ivec.S | ||
58 | */ | ||
59 | struct ino_bucket { | ||
60 | /*0x00*/unsigned long __irq_chain_pa; | ||
61 | |||
62 | /* Virtual interrupt number assigned to this INO. */ | ||
63 | /*0x08*/unsigned int __virt_irq; | ||
64 | /*0x0c*/unsigned int __pad; | ||
65 | }; | ||
66 | 48 | ||
67 | #define NUM_IVECS (IMAP_INR + 1) | 49 | #define NUM_IVECS (IMAP_INR + 1) |
50 | |||
68 | struct ino_bucket *ivector_table; | 51 | struct ino_bucket *ivector_table; |
69 | unsigned long ivector_table_pa; | 52 | unsigned long ivector_table_pa; |
70 | 53 | ||