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-rw-r--r--arch/sparc64/Kconfig23
-rw-r--r--arch/sparc64/kernel/Makefile9
-rw-r--r--arch/sparc64/kernel/auxio.c2
-rw-r--r--arch/sparc64/kernel/central.c617
-rw-r--r--arch/sparc64/kernel/chmc.c817
-rw-r--r--arch/sparc64/kernel/cpu.c208
-rw-r--r--arch/sparc64/kernel/ds.c4
-rw-r--r--arch/sparc64/kernel/ebus.c299
-rw-r--r--arch/sparc64/kernel/entry.h7
-rw-r--r--arch/sparc64/kernel/head.S1
-rw-r--r--arch/sparc64/kernel/hvapi.c3
-rw-r--r--arch/sparc64/kernel/hvcalls.S354
-rw-r--r--arch/sparc64/kernel/irq.c1
-rw-r--r--arch/sparc64/kernel/of_device.c59
-rw-r--r--arch/sparc64/kernel/pci.c152
-rw-r--r--arch/sparc64/kernel/pci_fire.c91
-rw-r--r--arch/sparc64/kernel/pci_impl.h4
-rw-r--r--arch/sparc64/kernel/pci_psycho.c117
-rw-r--r--arch/sparc64/kernel/pci_sabre.c138
-rw-r--r--arch/sparc64/kernel/pci_schizo.c155
-rw-r--r--arch/sparc64/kernel/pci_sun4v.c153
-rw-r--r--arch/sparc64/kernel/pci_sun4v_asm.S99
-rw-r--r--arch/sparc64/kernel/power.c55
-rw-r--r--arch/sparc64/kernel/process.c33
-rw-r--r--arch/sparc64/kernel/prom.c6
-rw-r--r--arch/sparc64/kernel/ptrace.c38
-rw-r--r--arch/sparc64/kernel/reboot.c52
-rw-r--r--arch/sparc64/kernel/sbus.c166
-rw-r--r--arch/sparc64/kernel/sparc64_ksyms.c23
-rw-r--r--arch/sparc64/kernel/sstate.c67
-rw-r--r--arch/sparc64/kernel/starfire.c5
-rw-r--r--arch/sparc64/kernel/sys_sparc32.c8
-rw-r--r--arch/sparc64/kernel/syscalls.S20
-rw-r--r--arch/sparc64/kernel/systbls.S2
-rw-r--r--arch/sparc64/kernel/time.c1166
-rw-r--r--arch/sparc64/kernel/traps.c63
-rw-r--r--arch/sparc64/mm/init.c48
37 files changed, 2091 insertions, 2974 deletions
diff --git a/arch/sparc64/Kconfig b/arch/sparc64/Kconfig
index 36b4b7ab9cfb..5446e2a499b1 100644
--- a/arch/sparc64/Kconfig
+++ b/arch/sparc64/Kconfig
@@ -18,6 +18,13 @@ config SPARC64
18 select HAVE_ARCH_KGDB 18 select HAVE_ARCH_KGDB
19 select USE_GENERIC_SMP_HELPERS if SMP 19 select USE_GENERIC_SMP_HELPERS if SMP
20 select HAVE_ARCH_TRACEHOOK 20 select HAVE_ARCH_TRACEHOOK
21 select ARCH_WANT_OPTIONAL_GPIOLIB
22 select RTC_CLASS
23 select RTC_DRV_M48T59
24 select RTC_DRV_CMOS
25 select RTC_DRV_BQ4802
26 select RTC_DRV_SUN4V
27 select RTC_DRV_STARFIRE
21 28
22config GENERIC_TIME 29config GENERIC_TIME
23 bool 30 bool
@@ -31,6 +38,11 @@ config GENERIC_CLOCKEVENTS
31 bool 38 bool
32 default y 39 default y
33 40
41config GENERIC_GPIO
42 bool
43 help
44 Generic GPIO API support
45
34config 64BIT 46config 64BIT
35 def_bool y 47 def_bool y
36 48
@@ -185,6 +197,17 @@ config US2E_FREQ
185 197
186 If in doubt, say N. 198 If in doubt, say N.
187 199
200config US3_MC
201 tristate "UltraSPARC-III Memory Controller driver"
202 default y
203 help
204 This adds a driver for the UltraSPARC-III memory controller.
205 Loading this driver allows exact mnemonic strings to be
206 printed in the event of a memory error, so that the faulty DIMM
207 on the motherboard can be matched to the error.
208
209 If in doubt, say Y, as this information can be very useful.
210
188# Global things across all Sun machines. 211# Global things across all Sun machines.
189config GENERIC_LOCKBREAK 212config GENERIC_LOCKBREAK
190 bool 213 bool
diff --git a/arch/sparc64/kernel/Makefile b/arch/sparc64/kernel/Makefile
index 418b5782096e..fb02807167eb 100644
--- a/arch/sparc64/kernel/Makefile
+++ b/arch/sparc64/kernel/Makefile
@@ -7,16 +7,16 @@ EXTRA_CFLAGS := -Werror
7 7
8extra-y := head.o init_task.o vmlinux.lds 8extra-y := head.o init_task.o vmlinux.lds
9 9
10obj-y := process.o setup.o cpu.o idprom.o \ 10obj-y := process.o setup.o cpu.o idprom.o reboot.o \
11 traps.o auxio.o una_asm.o sysfs.o iommu.o \ 11 traps.o auxio.o una_asm.o sysfs.o iommu.o \
12 irq.o ptrace.o time.o sys_sparc.o signal.o \ 12 irq.o ptrace.o time.o sys_sparc.o signal.o \
13 unaligned.o central.o pci.o starfire.o \ 13 unaligned.o central.o starfire.o \
14 power.o sbus.o sparc64_ksyms.o chmc.o \ 14 power.o sbus.o sparc64_ksyms.o ebus.o \
15 visemul.o prom.o of_device.o hvapi.o sstate.o mdesc.o 15 visemul.o prom.o of_device.o hvapi.o sstate.o mdesc.o
16 16
17obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o 17obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o
18obj-$(CONFIG_STACKTRACE) += stacktrace.o 18obj-$(CONFIG_STACKTRACE) += stacktrace.o
19obj-$(CONFIG_PCI) += ebus.o pci_common.o \ 19obj-$(CONFIG_PCI) += pci.o pci_common.o \
20 pci_psycho.o pci_sabre.o pci_schizo.o \ 20 pci_psycho.o pci_sabre.o pci_schizo.o \
21 pci_sun4v.o pci_sun4v_asm.o pci_fire.o 21 pci_sun4v.o pci_sun4v_asm.o pci_fire.o
22obj-$(CONFIG_PCI_MSI) += pci_msi.o 22obj-$(CONFIG_PCI_MSI) += pci_msi.o
@@ -25,6 +25,7 @@ obj-$(CONFIG_COMPAT) += sys32.o sys_sparc32.o signal32.o
25obj-$(CONFIG_MODULES) += module.o 25obj-$(CONFIG_MODULES) += module.o
26obj-$(CONFIG_US3_FREQ) += us3_cpufreq.o 26obj-$(CONFIG_US3_FREQ) += us3_cpufreq.o
27obj-$(CONFIG_US2E_FREQ) += us2e_cpufreq.o 27obj-$(CONFIG_US2E_FREQ) += us2e_cpufreq.o
28obj-$(CONFIG_US3_MC) += chmc.o
28obj-$(CONFIG_KPROBES) += kprobes.o 29obj-$(CONFIG_KPROBES) += kprobes.o
29obj-$(CONFIG_SUN_LDOMS) += ldc.o vio.o viohs.o ds.o 30obj-$(CONFIG_SUN_LDOMS) += ldc.o vio.o viohs.o ds.o
30obj-$(CONFIG_AUDIT) += audit.o 31obj-$(CONFIG_AUDIT) += audit.o
diff --git a/arch/sparc64/kernel/auxio.c b/arch/sparc64/kernel/auxio.c
index dd5c7bf87619..858beda86524 100644
--- a/arch/sparc64/kernel/auxio.c
+++ b/arch/sparc64/kernel/auxio.c
@@ -109,7 +109,7 @@ void auxio_set_lte(int on)
109 } 109 }
110} 110}
111 111
112static struct of_device_id auxio_match[] = { 112static struct of_device_id __initdata auxio_match[] = {
113 { 113 {
114 .name = "auxio", 114 .name = "auxio",
115 }, 115 },
diff --git a/arch/sparc64/kernel/central.c b/arch/sparc64/kernel/central.c
index f2e87d0d7e1d..05f1c916db06 100644
--- a/arch/sparc64/kernel/central.c
+++ b/arch/sparc64/kernel/central.c
@@ -1,461 +1,268 @@
1/* central.c: Central FHC driver for Sunfire/Starfire/Wildfire. 1/* central.c: Central FHC driver for Sunfire/Starfire/Wildfire.
2 * 2 *
3 * Copyright (C) 1997, 1999 David S. Miller (davem@davemloft.net) 3 * Copyright (C) 1997, 1999, 2008 David S. Miller (davem@davemloft.net)
4 */ 4 */
5 5
6#include <linux/kernel.h> 6#include <linux/kernel.h>
7#include <linux/types.h> 7#include <linux/types.h>
8#include <linux/string.h> 8#include <linux/string.h>
9#include <linux/timer.h>
10#include <linux/sched.h>
11#include <linux/delay.h>
12#include <linux/init.h> 9#include <linux/init.h>
13#include <linux/bootmem.h> 10#include <linux/of_device.h>
11#include <linux/platform_device.h>
14 12
15#include <asm/page.h>
16#include <asm/fhc.h> 13#include <asm/fhc.h>
17#include <asm/starfire.h> 14#include <asm/upa.h>
18 15
19static struct linux_central *central_bus = NULL; 16struct clock_board {
20static struct linux_fhc *fhc_list = NULL; 17 void __iomem *clock_freq_regs;
18 void __iomem *clock_regs;
19 void __iomem *clock_ver_reg;
20 int num_slots;
21 struct resource leds_resource;
22 struct platform_device leds_pdev;
23};
24
25struct fhc {
26 void __iomem *pregs;
27 bool central;
28 bool jtag_master;
29 int board_num;
30 struct resource leds_resource;
31 struct platform_device leds_pdev;
32};
33
34static int __devinit clock_board_calc_nslots(struct clock_board *p)
35{
36 u8 reg = upa_readb(p->clock_regs + CLOCK_STAT1) & 0xc0;
21 37
22#define IS_CENTRAL_FHC(__fhc) ((__fhc) == central_bus->child) 38 switch (reg) {
39 case 0x40:
40 return 16;
23 41
24static void central_probe_failure(int line) 42 case 0xc0:
25{ 43 return 8;
26 prom_printf("CENTRAL: Critical device probe failure at central.c:%d\n",
27 line);
28 prom_halt();
29}
30 44
31static void central_ranges_init(struct linux_central *central) 45 case 0x80:
32{ 46 reg = 0;
33 struct device_node *dp = central->prom_node; 47 if (p->clock_ver_reg)
34 const void *pval; 48 reg = upa_readb(p->clock_ver_reg);
35 int len; 49 if (reg) {
36 50 if (reg & 0x80)
37 central->num_central_ranges = 0; 51 return 4;
38 pval = of_get_property(dp, "ranges", &len); 52 else
39 if (pval) { 53 return 5;
40 memcpy(central->central_ranges, pval, len); 54 }
41 central->num_central_ranges = 55 /* Fallthrough */
42 (len / sizeof(struct linux_prom_ranges)); 56 default:
57 return 4;
43 } 58 }
44} 59}
45 60
46static void fhc_ranges_init(struct linux_fhc *fhc) 61static int __devinit clock_board_probe(struct of_device *op,
62 const struct of_device_id *match)
47{ 63{
48 struct device_node *dp = fhc->prom_node; 64 struct clock_board *p = kzalloc(sizeof(*p), GFP_KERNEL);
49 const void *pval; 65 int err = -ENOMEM;
50 int len;
51
52 fhc->num_fhc_ranges = 0;
53 pval = of_get_property(dp, "ranges", &len);
54 if (pval) {
55 memcpy(fhc->fhc_ranges, pval, len);
56 fhc->num_fhc_ranges =
57 (len / sizeof(struct linux_prom_ranges));
58 }
59}
60 66
61/* Range application routines are exported to various drivers, 67 if (!p) {
62 * so do not __init this. 68 printk(KERN_ERR "clock_board: Cannot allocate struct clock_board\n");
63 */ 69 goto out;
64static void adjust_regs(struct linux_prom_registers *regp, int nregs,
65 struct linux_prom_ranges *rangep, int nranges)
66{
67 int regc, rngc;
68
69 for (regc = 0; regc < nregs; regc++) {
70 for (rngc = 0; rngc < nranges; rngc++)
71 if (regp[regc].which_io == rangep[rngc].ot_child_space)
72 break; /* Fount it */
73 if (rngc == nranges) /* oops */
74 central_probe_failure(__LINE__);
75 regp[regc].which_io = rangep[rngc].ot_parent_space;
76 regp[regc].phys_addr -= rangep[rngc].ot_child_base;
77 regp[regc].phys_addr += rangep[rngc].ot_parent_base;
78 } 70 }
79}
80 71
81/* Apply probed fhc ranges to registers passed, if no ranges return. */ 72 p->clock_freq_regs = of_ioremap(&op->resource[0], 0,
82static void apply_fhc_ranges(struct linux_fhc *fhc, 73 resource_size(&op->resource[0]),
83 struct linux_prom_registers *regs, 74 "clock_board_freq");
84 int nregs) 75 if (!p->clock_freq_regs) {
85{ 76 printk(KERN_ERR "clock_board: Cannot map clock_freq_regs\n");
86 if (fhc->num_fhc_ranges) 77 goto out_free;
87 adjust_regs(regs, nregs, fhc->fhc_ranges, 78 }
88 fhc->num_fhc_ranges);
89}
90 79
91/* Apply probed central ranges to registers passed, if no ranges return. */ 80 p->clock_regs = of_ioremap(&op->resource[1], 0,
92static void apply_central_ranges(struct linux_central *central, 81 resource_size(&op->resource[1]),
93 struct linux_prom_registers *regs, int nregs) 82 "clock_board_regs");
94{ 83 if (!p->clock_regs) {
95 if (central->num_central_ranges) 84 printk(KERN_ERR "clock_board: Cannot map clock_regs\n");
96 adjust_regs(regs, nregs, central->central_ranges, 85 goto out_unmap_clock_freq_regs;
97 central->num_central_ranges); 86 }
98}
99 87
100static void * __init central_alloc_bootmem(unsigned long size) 88 if (op->resource[2].flags) {
101{ 89 p->clock_ver_reg = of_ioremap(&op->resource[2], 0,
102 void *ret; 90 resource_size(&op->resource[2]),
91 "clock_ver_reg");
92 if (!p->clock_ver_reg) {
93 printk(KERN_ERR "clock_board: Cannot map clock_ver_reg\n");
94 goto out_unmap_clock_regs;
95 }
96 }
103 97
104 ret = __alloc_bootmem(size, SMP_CACHE_BYTES, 0UL); 98 p->num_slots = clock_board_calc_nslots(p);
105 if (ret != NULL)
106 memset(ret, 0, size);
107 99
108 return ret; 100 p->leds_resource.start = (unsigned long)
109} 101 (p->clock_regs + CLOCK_CTRL);
102 p->leds_resource.end = p->leds_resource.end;
103 p->leds_resource.name = "leds";
110 104
111static unsigned long prom_reg_to_paddr(struct linux_prom_registers *r) 105 p->leds_pdev.name = "sunfire-clockboard-leds";
112{ 106 p->leds_pdev.resource = &p->leds_resource;
113 unsigned long ret = ((unsigned long) r->which_io) << 32; 107 p->leds_pdev.num_resources = 1;
108 p->leds_pdev.dev.parent = &op->dev;
114 109
115 return ret | (unsigned long) r->phys_addr; 110 err = platform_device_register(&p->leds_pdev);
116} 111 if (err) {
117 112 printk(KERN_ERR "clock_board: Could not register LEDS "
118static void __init probe_other_fhcs(void) 113 "platform device\n");
119{ 114 goto out_unmap_clock_ver_reg;
120 struct device_node *dp;
121 const struct linux_prom64_registers *fpregs;
122
123 for_each_node_by_name(dp, "fhc") {
124 struct linux_fhc *fhc;
125 int board;
126 u32 tmp;
127
128 if (dp->parent &&
129 dp->parent->parent != NULL)
130 continue;
131
132 fhc = (struct linux_fhc *)
133 central_alloc_bootmem(sizeof(struct linux_fhc));
134 if (fhc == NULL)
135 central_probe_failure(__LINE__);
136
137 /* Link it into the FHC chain. */
138 fhc->next = fhc_list;
139 fhc_list = fhc;
140
141 /* Toplevel FHCs have no parent. */
142 fhc->parent = NULL;
143
144 fhc->prom_node = dp;
145 fhc_ranges_init(fhc);
146
147 /* Non-central FHC's have 64-bit OBP format registers. */
148 fpregs = of_get_property(dp, "reg", NULL);
149 if (!fpregs)
150 central_probe_failure(__LINE__);
151
152 /* Only central FHC needs special ranges applied. */
153 fhc->fhc_regs.pregs = fpregs[0].phys_addr;
154 fhc->fhc_regs.ireg = fpregs[1].phys_addr;
155 fhc->fhc_regs.ffregs = fpregs[2].phys_addr;
156 fhc->fhc_regs.sregs = fpregs[3].phys_addr;
157 fhc->fhc_regs.uregs = fpregs[4].phys_addr;
158 fhc->fhc_regs.tregs = fpregs[5].phys_addr;
159
160 board = of_getintprop_default(dp, "board#", -1);
161 fhc->board = board;
162
163 tmp = upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_JCTRL);
164 if ((tmp & FHC_JTAG_CTRL_MENAB) != 0)
165 fhc->jtag_master = 1;
166 else
167 fhc->jtag_master = 0;
168
169 tmp = upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_ID);
170 printk("FHC(board %d): Version[%x] PartID[%x] Manuf[%x] %s\n",
171 board,
172 (tmp & FHC_ID_VERS) >> 28,
173 (tmp & FHC_ID_PARTID) >> 12,
174 (tmp & FHC_ID_MANUF) >> 1,
175 (fhc->jtag_master ? "(JTAG Master)" : ""));
176
177 /* This bit must be set in all non-central FHC's in
178 * the system. When it is clear, this identifies
179 * the central board.
180 */
181 tmp = upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
182 tmp |= FHC_CONTROL_IXIST;
183 upa_writel(tmp, fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
184 } 115 }
185}
186 116
187static void probe_clock_board(struct linux_central *central, 117 printk(KERN_INFO "clock_board: Detected %d slot Enterprise system.\n",
188 struct linux_fhc *fhc, 118 p->num_slots);
189 struct device_node *fp)
190{
191 struct device_node *dp;
192 struct linux_prom_registers cregs[3];
193 const struct linux_prom_registers *pr;
194 int nslots, tmp, nregs;
195
196 dp = fp->child;
197 while (dp) {
198 if (!strcmp(dp->name, "clock-board"))
199 break;
200 dp = dp->sibling;
201 }
202 if (!dp)
203 central_probe_failure(__LINE__);
204 119
205 pr = of_get_property(dp, "reg", &nregs); 120 err = 0;
206 if (!pr) 121out:
207 central_probe_failure(__LINE__); 122 return err;
208 123
209 memcpy(cregs, pr, nregs); 124out_unmap_clock_ver_reg:
210 nregs /= sizeof(struct linux_prom_registers); 125 if (p->clock_ver_reg)
126 of_iounmap(&op->resource[2], p->clock_ver_reg,
127 resource_size(&op->resource[2]));
211 128
212 apply_fhc_ranges(fhc, &cregs[0], nregs); 129out_unmap_clock_regs:
213 apply_central_ranges(central, &cregs[0], nregs); 130 of_iounmap(&op->resource[1], p->clock_regs,
214 central->cfreg = prom_reg_to_paddr(&cregs[0]); 131 resource_size(&op->resource[1]));
215 central->clkregs = prom_reg_to_paddr(&cregs[1]);
216 132
217 if (nregs == 2) 133out_unmap_clock_freq_regs:
218 central->clkver = 0UL; 134 of_iounmap(&op->resource[0], p->clock_freq_regs,
219 else 135 resource_size(&op->resource[0]));
220 central->clkver = prom_reg_to_paddr(&cregs[2]);
221 136
222 tmp = upa_readb(central->clkregs + CLOCK_STAT1); 137out_free:
223 tmp &= 0xc0; 138 kfree(p);
224 switch(tmp) { 139 goto out;
225 case 0x40:
226 nslots = 16;
227 break;
228 case 0xc0:
229 nslots = 8;
230 break;
231 case 0x80:
232 if (central->clkver != 0UL &&
233 upa_readb(central->clkver) != 0) {
234 if ((upa_readb(central->clkver) & 0x80) != 0)
235 nslots = 4;
236 else
237 nslots = 5;
238 break;
239 }
240 default:
241 nslots = 4;
242 break;
243 };
244 central->slots = nslots;
245 printk("CENTRAL: Detected %d slot Enterprise system. cfreg[%02x] cver[%02x]\n",
246 central->slots, upa_readb(central->cfreg),
247 (central->clkver ? upa_readb(central->clkver) : 0x00));
248} 140}
249 141
250static void ZAP(unsigned long iclr, unsigned long imap) 142static struct of_device_id __initdata clock_board_match[] = {
143 {
144 .name = "clock-board",
145 },
146 {},
147};
148
149static struct of_platform_driver clock_board_driver = {
150 .match_table = clock_board_match,
151 .probe = clock_board_probe,
152 .driver = {
153 .name = "clock_board",
154 },
155};
156
157static int __devinit fhc_probe(struct of_device *op,
158 const struct of_device_id *match)
251{ 159{
252 u32 imap_tmp; 160 struct fhc *p = kzalloc(sizeof(*p), GFP_KERNEL);
253 161 int err = -ENOMEM;
254 upa_writel(0, iclr); 162 u32 reg;
255 upa_readl(iclr);
256 imap_tmp = upa_readl(imap);
257 imap_tmp &= ~(0x80000000);
258 upa_writel(imap_tmp, imap);
259 upa_readl(imap);
260}
261 163
262static void init_all_fhc_hw(void) 164 if (!p) {
263{ 165 printk(KERN_ERR "fhc: Cannot allocate struct fhc\n");
264 struct linux_fhc *fhc; 166 goto out;
265
266 for (fhc = fhc_list; fhc != NULL; fhc = fhc->next) {
267 u32 tmp;
268
269 /* Clear all of the interrupt mapping registers
270 * just in case OBP left them in a foul state.
271 */
272 ZAP(fhc->fhc_regs.ffregs + FHC_FFREGS_ICLR,
273 fhc->fhc_regs.ffregs + FHC_FFREGS_IMAP);
274 ZAP(fhc->fhc_regs.sregs + FHC_SREGS_ICLR,
275 fhc->fhc_regs.sregs + FHC_SREGS_IMAP);
276 ZAP(fhc->fhc_regs.uregs + FHC_UREGS_ICLR,
277 fhc->fhc_regs.uregs + FHC_UREGS_IMAP);
278 ZAP(fhc->fhc_regs.tregs + FHC_TREGS_ICLR,
279 fhc->fhc_regs.tregs + FHC_TREGS_IMAP);
280
281 /* Setup FHC control register. */
282 tmp = upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
283
284 /* All non-central boards have this bit set. */
285 if (! IS_CENTRAL_FHC(fhc))
286 tmp |= FHC_CONTROL_IXIST;
287
288 /* For all FHCs, clear the firmware synchronization
289 * line and both low power mode enables.
290 */
291 tmp &= ~(FHC_CONTROL_AOFF | FHC_CONTROL_BOFF |
292 FHC_CONTROL_SLINE);
293
294 upa_writel(tmp, fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
295 upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
296 } 167 }
297 168
298} 169 if (!strcmp(op->node->parent->name, "central"))
170 p->central = true;
299 171
300void __init central_probe(void) 172 p->pregs = of_ioremap(&op->resource[0], 0,
301{ 173 resource_size(&op->resource[0]),
302 struct linux_prom_registers fpregs[6]; 174 "fhc_pregs");
303 const struct linux_prom_registers *pr; 175 if (!p->pregs) {
304 struct linux_fhc *fhc; 176 printk(KERN_ERR "fhc: Cannot map pregs\n");
305 struct device_node *dp, *fp; 177 goto out_free;
306 int err;
307
308 dp = of_find_node_by_name(NULL, "central");
309 if (!dp) {
310 if (this_is_starfire)
311 starfire_cpu_setup();
312 return;
313 } 178 }
314 179
315 /* Ok we got one, grab some memory for software state. */ 180 if (p->central) {
316 central_bus = (struct linux_central *) 181 reg = upa_readl(p->pregs + FHC_PREGS_BSR);
317 central_alloc_bootmem(sizeof(struct linux_central)); 182 p->board_num = ((reg >> 16) & 1) | ((reg >> 12) & 0x0e);
318 if (central_bus == NULL) 183 } else {
319 central_probe_failure(__LINE__); 184 p->board_num = of_getintprop_default(op->node, "board#", -1);
320 185 if (p->board_num == -1) {
321 fhc = (struct linux_fhc *) 186 printk(KERN_ERR "fhc: No board# property\n");
322 central_alloc_bootmem(sizeof(struct linux_fhc)); 187 goto out_unmap_pregs;
323 if (fhc == NULL) 188 }
324 central_probe_failure(__LINE__); 189 if (upa_readl(p->pregs + FHC_PREGS_JCTRL) & FHC_JTAG_CTRL_MENAB)
325 190 p->jtag_master = true;
326 /* First init central. */
327 central_bus->child = fhc;
328 central_bus->prom_node = dp;
329 central_ranges_init(central_bus);
330
331 /* And then central's FHC. */
332 fhc->next = fhc_list;
333 fhc_list = fhc;
334
335 fhc->parent = central_bus;
336 fp = dp->child;
337 while (fp) {
338 if (!strcmp(fp->name, "fhc"))
339 break;
340 fp = fp->sibling;
341 } 191 }
342 if (!fp)
343 central_probe_failure(__LINE__);
344
345 fhc->prom_node = fp;
346 fhc_ranges_init(fhc);
347
348 /* Now, map in FHC register set. */
349 pr = of_get_property(fp, "reg", NULL);
350 if (!pr)
351 central_probe_failure(__LINE__);
352 memcpy(fpregs, pr, sizeof(fpregs));
353
354 apply_central_ranges(central_bus, &fpregs[0], 6);
355
356 fhc->fhc_regs.pregs = prom_reg_to_paddr(&fpregs[0]);
357 fhc->fhc_regs.ireg = prom_reg_to_paddr(&fpregs[1]);
358 fhc->fhc_regs.ffregs = prom_reg_to_paddr(&fpregs[2]);
359 fhc->fhc_regs.sregs = prom_reg_to_paddr(&fpregs[3]);
360 fhc->fhc_regs.uregs = prom_reg_to_paddr(&fpregs[4]);
361 fhc->fhc_regs.tregs = prom_reg_to_paddr(&fpregs[5]);
362
363 /* Obtain board number from board status register, Central's
364 * FHC lacks "board#" property.
365 */
366 err = upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_BSR);
367 fhc->board = (((err >> 16) & 0x01) |
368 ((err >> 12) & 0x0e));
369
370 fhc->jtag_master = 0;
371
372 /* Attach the clock board registers for CENTRAL. */
373 probe_clock_board(central_bus, fhc, fp);
374
375 err = upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_ID);
376 printk("FHC(board %d): Version[%x] PartID[%x] Manuf[%x] (CENTRAL)\n",
377 fhc->board,
378 ((err & FHC_ID_VERS) >> 28),
379 ((err & FHC_ID_PARTID) >> 12),
380 ((err & FHC_ID_MANUF) >> 1));
381
382 probe_other_fhcs();
383
384 init_all_fhc_hw();
385}
386 192
387static inline void fhc_ledblink(struct linux_fhc *fhc, int on) 193 if (!p->central) {
388{ 194 p->leds_resource.start = (unsigned long)
389 u32 tmp; 195 (p->pregs + FHC_PREGS_CTRL);
196 p->leds_resource.end = p->leds_resource.end;
197 p->leds_resource.name = "leds";
198
199 p->leds_pdev.name = "sunfire-fhc-leds";
200 p->leds_pdev.resource = &p->leds_resource;
201 p->leds_pdev.num_resources = 1;
202 p->leds_pdev.dev.parent = &op->dev;
203
204 err = platform_device_register(&p->leds_pdev);
205 if (err) {
206 printk(KERN_ERR "fhc: Could not register LEDS "
207 "platform device\n");
208 goto out_unmap_pregs;
209 }
210 }
211 reg = upa_readl(p->pregs + FHC_PREGS_CTRL);
390 212
391 tmp = upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_CTRL); 213 if (!p->central)
214 reg |= FHC_CONTROL_IXIST;
392 215
393 /* NOTE: reverse logic on this bit */ 216 reg &= ~(FHC_CONTROL_AOFF |
394 if (on) 217 FHC_CONTROL_BOFF |
395 tmp &= ~(FHC_CONTROL_RLED); 218 FHC_CONTROL_SLINE);
396 else
397 tmp |= FHC_CONTROL_RLED;
398 tmp &= ~(FHC_CONTROL_AOFF | FHC_CONTROL_BOFF | FHC_CONTROL_SLINE);
399 219
400 upa_writel(tmp, fhc->fhc_regs.pregs + FHC_PREGS_CTRL); 220 upa_writel(reg, p->pregs + FHC_PREGS_CTRL);
401 upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_CTRL); 221 upa_readl(p->pregs + FHC_PREGS_CTRL);
402}
403 222
404static inline void central_ledblink(struct linux_central *central, int on) 223 reg = upa_readl(p->pregs + FHC_PREGS_ID);
405{ 224 printk(KERN_INFO "fhc: Board #%d, Version[%x] PartID[%x] Manuf[%x] %s\n",
406 u8 tmp; 225 p->board_num,
407 226 (reg & FHC_ID_VERS) >> 28,
408 tmp = upa_readb(central->clkregs + CLOCK_CTRL); 227 (reg & FHC_ID_PARTID) >> 12,
228 (reg & FHC_ID_MANUF) >> 1,
229 (p->jtag_master ?
230 "(JTAG Master)" :
231 (p->central ? "(Central)" : "")));
409 232
410 /* NOTE: reverse logic on this bit */ 233 err = 0;
411 if (on)
412 tmp &= ~(CLOCK_CTRL_RLED);
413 else
414 tmp |= CLOCK_CTRL_RLED;
415 234
416 upa_writeb(tmp, central->clkregs + CLOCK_CTRL); 235out:
417 upa_readb(central->clkregs + CLOCK_CTRL); 236 return err;
418}
419 237
420static struct timer_list sftimer; 238out_unmap_pregs:
421static int led_state; 239 of_iounmap(&op->resource[0], p->pregs, resource_size(&op->resource[0]));
422 240
423static void sunfire_timer(unsigned long __ignored) 241out_free:
424{ 242 kfree(p);
425 struct linux_fhc *fhc; 243 goto out;
426
427 central_ledblink(central_bus, led_state);
428 for (fhc = fhc_list; fhc != NULL; fhc = fhc->next)
429 if (! IS_CENTRAL_FHC(fhc))
430 fhc_ledblink(fhc, led_state);
431 led_state = ! led_state;
432 sftimer.expires = jiffies + (HZ >> 1);
433 add_timer(&sftimer);
434} 244}
435 245
436/* After PCI/SBUS busses have been probed, this is called to perform 246static struct of_device_id __initdata fhc_match[] = {
437 * final initialization of all FireHose Controllers in the system. 247 {
438 */ 248 .name = "fhc",
439void firetruck_init(void) 249 },
250 {},
251};
252
253static struct of_platform_driver fhc_driver = {
254 .match_table = fhc_match,
255 .probe = fhc_probe,
256 .driver = {
257 .name = "fhc",
258 },
259};
260
261static int __init sunfire_init(void)
440{ 262{
441 struct linux_central *central = central_bus; 263 (void) of_register_driver(&fhc_driver, &of_platform_bus_type);
442 u8 ctrl; 264 (void) of_register_driver(&clock_board_driver, &of_platform_bus_type);
443 265 return 0;
444 /* No central bus, nothing to do. */
445 if (central == NULL)
446 return;
447
448 /* OBP leaves it on, turn it off so clock board timer LED
449 * is in sync with FHC ones.
450 */
451 ctrl = upa_readb(central->clkregs + CLOCK_CTRL);
452 ctrl &= ~(CLOCK_CTRL_RLED);
453 upa_writeb(ctrl, central->clkregs + CLOCK_CTRL);
454
455 led_state = 0;
456 init_timer(&sftimer);
457 sftimer.data = 0;
458 sftimer.function = &sunfire_timer;
459 sftimer.expires = jiffies + (HZ >> 1);
460 add_timer(&sftimer);
461} 266}
267
268subsys_initcall(sunfire_init);
diff --git a/arch/sparc64/kernel/chmc.c b/arch/sparc64/kernel/chmc.c
index 6d4f02e8a4cf..2ed401087cab 100644
--- a/arch/sparc64/kernel/chmc.c
+++ b/arch/sparc64/kernel/chmc.c
@@ -1,6 +1,6 @@
1/* memctrlr.c: Driver for UltraSPARC-III memory controller. 1/* chmc.c: Driver for UltraSPARC-III memory controller.
2 * 2 *
3 * Copyright (C) 2001, 2007 David S. Miller (davem@davemloft.net) 3 * Copyright (C) 2001, 2007, 2008 David S. Miller (davem@davemloft.net)
4 */ 4 */
5 5
6#include <linux/module.h> 6#include <linux/module.h>
@@ -13,45 +13,64 @@
13#include <linux/smp.h> 13#include <linux/smp.h>
14#include <linux/errno.h> 14#include <linux/errno.h>
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/of.h>
17#include <linux/of_device.h>
16#include <asm/spitfire.h> 18#include <asm/spitfire.h>
17#include <asm/chmctrl.h> 19#include <asm/chmctrl.h>
18#include <asm/cpudata.h> 20#include <asm/cpudata.h>
19#include <asm/oplib.h> 21#include <asm/oplib.h>
20#include <asm/prom.h> 22#include <asm/prom.h>
23#include <asm/head.h>
21#include <asm/io.h> 24#include <asm/io.h>
25#include <asm/memctrl.h>
26
27#define DRV_MODULE_NAME "chmc"
28#define PFX DRV_MODULE_NAME ": "
29#define DRV_MODULE_VERSION "0.2"
30
31MODULE_AUTHOR("David S. Miller (davem@davemloft.net)");
32MODULE_DESCRIPTION("UltraSPARC-III memory controller driver");
33MODULE_LICENSE("GPL");
34MODULE_VERSION(DRV_MODULE_VERSION);
35
36static int mc_type;
37#define MC_TYPE_SAFARI 1
38#define MC_TYPE_JBUS 2
39
40static dimm_printer_t us3mc_dimm_printer;
22 41
23#define CHMCTRL_NDGRPS 2 42#define CHMCTRL_NDGRPS 2
24#define CHMCTRL_NDIMMS 4 43#define CHMCTRL_NDIMMS 4
25 44
26#define DIMMS_PER_MC (CHMCTRL_NDGRPS * CHMCTRL_NDIMMS) 45#define CHMC_DIMMS_PER_MC (CHMCTRL_NDGRPS * CHMCTRL_NDIMMS)
27 46
28/* OBP memory-layout property format. */ 47/* OBP memory-layout property format. */
29struct obp_map { 48struct chmc_obp_map {
30 unsigned char dimm_map[144]; 49 unsigned char dimm_map[144];
31 unsigned char pin_map[576]; 50 unsigned char pin_map[576];
32}; 51};
33 52
34#define DIMM_LABEL_SZ 8 53#define DIMM_LABEL_SZ 8
35 54
36struct obp_mem_layout { 55struct chmc_obp_mem_layout {
37 /* One max 8-byte string label per DIMM. Usually 56 /* One max 8-byte string label per DIMM. Usually
38 * this matches the label on the motherboard where 57 * this matches the label on the motherboard where
39 * that DIMM resides. 58 * that DIMM resides.
40 */ 59 */
41 char dimm_labels[DIMMS_PER_MC][DIMM_LABEL_SZ]; 60 char dimm_labels[CHMC_DIMMS_PER_MC][DIMM_LABEL_SZ];
42 61
43 /* If symmetric use map[0], else it is 62 /* If symmetric use map[0], else it is
44 * asymmetric and map[1] should be used. 63 * asymmetric and map[1] should be used.
45 */ 64 */
46 char symmetric; 65 char symmetric;
47 66
48 struct obp_map map[2]; 67 struct chmc_obp_map map[2];
49}; 68};
50 69
51#define CHMCTRL_NBANKS 4 70#define CHMCTRL_NBANKS 4
52 71
53struct bank_info { 72struct chmc_bank_info {
54 struct mctrl_info *mp; 73 struct chmc *p;
55 int bank_id; 74 int bank_id;
56 75
57 u64 raw_reg; 76 u64 raw_reg;
@@ -65,28 +84,406 @@ struct bank_info {
65 unsigned long size; 84 unsigned long size;
66}; 85};
67 86
68struct mctrl_info { 87struct chmc {
69 struct list_head list; 88 struct list_head list;
70 int portid; 89 int portid;
90
91 struct chmc_obp_mem_layout layout_prop;
92 int layout_size;
93
94 void __iomem *regs;
71 95
72 struct obp_mem_layout layout_prop; 96 u64 timing_control1;
73 int layout_size; 97 u64 timing_control2;
98 u64 timing_control3;
99 u64 timing_control4;
100 u64 memaddr_control;
74 101
75 void __iomem *regs; 102 struct chmc_bank_info logical_banks[CHMCTRL_NBANKS];
103};
104
105#define JBUSMC_REGS_SIZE 8
106
107#define JB_MC_REG1_DIMM2_BANK3 0x8000000000000000
108#define JB_MC_REG1_DIMM1_BANK1 0x4000000000000000
109#define JB_MC_REG1_DIMM2_BANK2 0x2000000000000000
110#define JB_MC_REG1_DIMM1_BANK0 0x1000000000000000
111#define JB_MC_REG1_XOR 0x0000010000000000
112#define JB_MC_REG1_ADDR_GEN_2 0x000000e000000000
113#define JB_MC_REG1_ADDR_GEN_2_SHIFT 37
114#define JB_MC_REG1_ADDR_GEN_1 0x0000001c00000000
115#define JB_MC_REG1_ADDR_GEN_1_SHIFT 34
116#define JB_MC_REG1_INTERLEAVE 0x0000000001800000
117#define JB_MC_REG1_INTERLEAVE_SHIFT 23
118#define JB_MC_REG1_DIMM2_PTYPE 0x0000000000200000
119#define JB_MC_REG1_DIMM2_PTYPE_SHIFT 21
120#define JB_MC_REG1_DIMM1_PTYPE 0x0000000000100000
121#define JB_MC_REG1_DIMM1_PTYPE_SHIFT 20
122
123#define PART_TYPE_X8 0
124#define PART_TYPE_X4 1
125
126#define INTERLEAVE_NONE 0
127#define INTERLEAVE_SAME 1
128#define INTERLEAVE_INTERNAL 2
129#define INTERLEAVE_BOTH 3
130
131#define ADDR_GEN_128MB 0
132#define ADDR_GEN_256MB 1
133#define ADDR_GEN_512MB 2
134#define ADDR_GEN_1GB 3
135
136#define JB_NUM_DIMM_GROUPS 2
137#define JB_NUM_DIMMS_PER_GROUP 2
138#define JB_NUM_DIMMS (JB_NUM_DIMM_GROUPS * JB_NUM_DIMMS_PER_GROUP)
139
140struct jbusmc_obp_map {
141 unsigned char dimm_map[18];
142 unsigned char pin_map[144];
143};
144
145struct jbusmc_obp_mem_layout {
146 /* One max 8-byte string label per DIMM. Usually
147 * this matches the label on the motherboard where
148 * that DIMM resides.
149 */
150 char dimm_labels[JB_NUM_DIMMS][DIMM_LABEL_SZ];
151
152 /* If symmetric use map[0], else it is
153 * asymmetric and map[1] should be used.
154 */
155 char symmetric;
156
157 struct jbusmc_obp_map map;
158
159 char _pad;
160};
76 161
77 u64 timing_control1; 162struct jbusmc_dimm_group {
78 u64 timing_control2; 163 struct jbusmc *controller;
79 u64 timing_control3; 164 int index;
80 u64 timing_control4; 165 u64 base_addr;
81 u64 memaddr_control; 166 u64 size;
167};
82 168
83 struct bank_info logical_banks[CHMCTRL_NBANKS]; 169struct jbusmc {
170 void __iomem *regs;
171 u64 mc_reg_1;
172 u32 portid;
173 struct jbusmc_obp_mem_layout layout;
174 int layout_len;
175 int num_dimm_groups;
176 struct jbusmc_dimm_group dimm_groups[JB_NUM_DIMM_GROUPS];
177 struct list_head list;
84}; 178};
85 179
180static DEFINE_SPINLOCK(mctrl_list_lock);
86static LIST_HEAD(mctrl_list); 181static LIST_HEAD(mctrl_list);
87 182
183static void mc_list_add(struct list_head *list)
184{
185 spin_lock(&mctrl_list_lock);
186 list_add(list, &mctrl_list);
187 spin_unlock(&mctrl_list_lock);
188}
189
190static void mc_list_del(struct list_head *list)
191{
192 spin_lock(&mctrl_list_lock);
193 list_del_init(list);
194 spin_unlock(&mctrl_list_lock);
195}
196
197#define SYNDROME_MIN -1
198#define SYNDROME_MAX 144
199
200/* Covert syndrome code into the way the bits are positioned
201 * on the bus.
202 */
203static int syndrome_to_qword_code(int syndrome_code)
204{
205 if (syndrome_code < 128)
206 syndrome_code += 16;
207 else if (syndrome_code < 128 + 9)
208 syndrome_code -= (128 - 7);
209 else if (syndrome_code < (128 + 9 + 3))
210 syndrome_code -= (128 + 9 - 4);
211 else
212 syndrome_code -= (128 + 9 + 3);
213 return syndrome_code;
214}
215
216/* All this magic has to do with how a cache line comes over the wire
217 * on Safari and JBUS. A 64-bit line comes over in 1 or more quadword
218 * cycles, each of which transmit ECC/MTAG info as well as the actual
219 * data.
220 */
221#define L2_LINE_SIZE 64
222#define L2_LINE_ADDR_MSK (L2_LINE_SIZE - 1)
223#define QW_PER_LINE 4
224#define QW_BYTES (L2_LINE_SIZE / QW_PER_LINE)
225#define QW_BITS 144
226#define SAFARI_LAST_BIT (576 - 1)
227#define JBUS_LAST_BIT (144 - 1)
228
229static void get_pin_and_dimm_str(int syndrome_code, unsigned long paddr,
230 int *pin_p, char **dimm_str_p, void *_prop,
231 int base_dimm_offset)
232{
233 int qword_code = syndrome_to_qword_code(syndrome_code);
234 int cache_line_offset;
235 int offset_inverse;
236 int dimm_map_index;
237 int map_val;
238
239 if (mc_type == MC_TYPE_JBUS) {
240 struct jbusmc_obp_mem_layout *p = _prop;
241
242 /* JBUS */
243 cache_line_offset = qword_code;
244 offset_inverse = (JBUS_LAST_BIT - cache_line_offset);
245 dimm_map_index = offset_inverse / 8;
246 map_val = p->map.dimm_map[dimm_map_index];
247 map_val = ((map_val >> ((7 - (offset_inverse & 7)))) & 1);
248 *dimm_str_p = p->dimm_labels[base_dimm_offset + map_val];
249 *pin_p = p->map.pin_map[cache_line_offset];
250 } else {
251 struct chmc_obp_mem_layout *p = _prop;
252 struct chmc_obp_map *mp;
253 int qword;
254
255 /* Safari */
256 if (p->symmetric)
257 mp = &p->map[0];
258 else
259 mp = &p->map[1];
260
261 qword = (paddr & L2_LINE_ADDR_MSK) / QW_BYTES;
262 cache_line_offset = ((3 - qword) * QW_BITS) + qword_code;
263 offset_inverse = (SAFARI_LAST_BIT - cache_line_offset);
264 dimm_map_index = offset_inverse >> 2;
265 map_val = mp->dimm_map[dimm_map_index];
266 map_val = ((map_val >> ((3 - (offset_inverse & 3)) << 1)) & 0x3);
267 *dimm_str_p = p->dimm_labels[base_dimm_offset + map_val];
268 *pin_p = mp->pin_map[cache_line_offset];
269 }
270}
271
272static struct jbusmc_dimm_group *jbusmc_find_dimm_group(unsigned long phys_addr)
273{
274 struct jbusmc *p;
275
276 list_for_each_entry(p, &mctrl_list, list) {
277 int i;
278
279 for (i = 0; i < p->num_dimm_groups; i++) {
280 struct jbusmc_dimm_group *dp = &p->dimm_groups[i];
281
282 if (phys_addr < dp->base_addr ||
283 (dp->base_addr + dp->size) <= phys_addr)
284 continue;
285
286 return dp;
287 }
288 }
289 return NULL;
290}
291
292static int jbusmc_print_dimm(int syndrome_code,
293 unsigned long phys_addr,
294 char *buf, int buflen)
295{
296 struct jbusmc_obp_mem_layout *prop;
297 struct jbusmc_dimm_group *dp;
298 struct jbusmc *p;
299 int first_dimm;
300
301 dp = jbusmc_find_dimm_group(phys_addr);
302 if (dp == NULL ||
303 syndrome_code < SYNDROME_MIN ||
304 syndrome_code > SYNDROME_MAX) {
305 buf[0] = '?';
306 buf[1] = '?';
307 buf[2] = '?';
308 buf[3] = '\0';
309 }
310 p = dp->controller;
311 prop = &p->layout;
312
313 first_dimm = dp->index * JB_NUM_DIMMS_PER_GROUP;
314
315 if (syndrome_code != SYNDROME_MIN) {
316 char *dimm_str;
317 int pin;
318
319 get_pin_and_dimm_str(syndrome_code, phys_addr, &pin,
320 &dimm_str, prop, first_dimm);
321 sprintf(buf, "%s, pin %3d", dimm_str, pin);
322 } else {
323 int dimm;
324
325 /* Multi-bit error, we just dump out all the
326 * dimm labels associated with this dimm group.
327 */
328 for (dimm = 0; dimm < JB_NUM_DIMMS_PER_GROUP; dimm++) {
329 sprintf(buf, "%s ",
330 prop->dimm_labels[first_dimm + dimm]);
331 buf += strlen(buf);
332 }
333 }
334
335 return 0;
336}
337
338static u64 __devinit jbusmc_dimm_group_size(u64 base,
339 const struct linux_prom64_registers *mem_regs,
340 int num_mem_regs)
341{
342 u64 max = base + (8UL * 1024 * 1024 * 1024);
343 u64 max_seen = base;
344 int i;
345
346 for (i = 0; i < num_mem_regs; i++) {
347 const struct linux_prom64_registers *ent;
348 u64 this_base;
349 u64 this_end;
350
351 ent = &mem_regs[i];
352 this_base = ent->phys_addr;
353 this_end = this_base + ent->reg_size;
354 if (base < this_base || base >= this_end)
355 continue;
356 if (this_end > max)
357 this_end = max;
358 if (this_end > max_seen)
359 max_seen = this_end;
360 }
361
362 return max_seen - base;
363}
364
365static void __devinit jbusmc_construct_one_dimm_group(struct jbusmc *p,
366 unsigned long index,
367 const struct linux_prom64_registers *mem_regs,
368 int num_mem_regs)
369{
370 struct jbusmc_dimm_group *dp = &p->dimm_groups[index];
371
372 dp->controller = p;
373 dp->index = index;
374
375 dp->base_addr = (p->portid * (64UL * 1024 * 1024 * 1024));
376 dp->base_addr += (index * (8UL * 1024 * 1024 * 1024));
377 dp->size = jbusmc_dimm_group_size(dp->base_addr, mem_regs, num_mem_regs);
378}
379
380static void __devinit jbusmc_construct_dimm_groups(struct jbusmc *p,
381 const struct linux_prom64_registers *mem_regs,
382 int num_mem_regs)
383{
384 if (p->mc_reg_1 & JB_MC_REG1_DIMM1_BANK0) {
385 jbusmc_construct_one_dimm_group(p, 0, mem_regs, num_mem_regs);
386 p->num_dimm_groups++;
387 }
388 if (p->mc_reg_1 & JB_MC_REG1_DIMM2_BANK2) {
389 jbusmc_construct_one_dimm_group(p, 1, mem_regs, num_mem_regs);
390 p->num_dimm_groups++;
391 }
392}
393
394static int __devinit jbusmc_probe(struct of_device *op,
395 const struct of_device_id *match)
396{
397 const struct linux_prom64_registers *mem_regs;
398 struct device_node *mem_node;
399 int err, len, num_mem_regs;
400 struct jbusmc *p;
401 const u32 *prop;
402 const void *ml;
403
404 err = -ENODEV;
405 mem_node = of_find_node_by_path("/memory");
406 if (!mem_node) {
407 printk(KERN_ERR PFX "Cannot find /memory node.\n");
408 goto out;
409 }
410 mem_regs = of_get_property(mem_node, "reg", &len);
411 if (!mem_regs) {
412 printk(KERN_ERR PFX "Cannot get reg property of /memory node.\n");
413 goto out;
414 }
415 num_mem_regs = len / sizeof(*mem_regs);
416
417 err = -ENOMEM;
418 p = kzalloc(sizeof(*p), GFP_KERNEL);
419 if (!p) {
420 printk(KERN_ERR PFX "Cannot allocate struct jbusmc.\n");
421 goto out;
422 }
423
424 INIT_LIST_HEAD(&p->list);
425
426 err = -ENODEV;
427 prop = of_get_property(op->node, "portid", &len);
428 if (!prop || len != 4) {
429 printk(KERN_ERR PFX "Cannot find portid.\n");
430 goto out_free;
431 }
432
433 p->portid = *prop;
434
435 prop = of_get_property(op->node, "memory-control-register-1", &len);
436 if (!prop || len != 8) {
437 printk(KERN_ERR PFX "Cannot get memory control register 1.\n");
438 goto out_free;
439 }
440
441 p->mc_reg_1 = ((u64)prop[0] << 32) | (u64) prop[1];
442
443 err = -ENOMEM;
444 p->regs = of_ioremap(&op->resource[0], 0, JBUSMC_REGS_SIZE, "jbusmc");
445 if (!p->regs) {
446 printk(KERN_ERR PFX "Cannot map jbusmc regs.\n");
447 goto out_free;
448 }
449
450 err = -ENODEV;
451 ml = of_get_property(op->node, "memory-layout", &p->layout_len);
452 if (!ml) {
453 printk(KERN_ERR PFX "Cannot get memory layout property.\n");
454 goto out_iounmap;
455 }
456 if (p->layout_len > sizeof(p->layout)) {
457 printk(KERN_ERR PFX "Unexpected memory-layout size %d\n",
458 p->layout_len);
459 goto out_iounmap;
460 }
461 memcpy(&p->layout, ml, p->layout_len);
462
463 jbusmc_construct_dimm_groups(p, mem_regs, num_mem_regs);
464
465 mc_list_add(&p->list);
466
467 printk(KERN_INFO PFX "UltraSPARC-IIIi memory controller at %s\n",
468 op->node->full_name);
469
470 dev_set_drvdata(&op->dev, p);
471
472 err = 0;
473
474out:
475 return err;
476
477out_iounmap:
478 of_iounmap(&op->resource[0], p->regs, JBUSMC_REGS_SIZE);
479
480out_free:
481 kfree(p);
482 goto out;
483}
484
88/* Does BANK decode PHYS_ADDR? */ 485/* Does BANK decode PHYS_ADDR? */
89static int bank_match(struct bank_info *bp, unsigned long phys_addr) 486static int chmc_bank_match(struct chmc_bank_info *bp, unsigned long phys_addr)
90{ 487{
91 unsigned long upper_bits = (phys_addr & PA_UPPER_BITS) >> PA_UPPER_BITS_SHIFT; 488 unsigned long upper_bits = (phys_addr & PA_UPPER_BITS) >> PA_UPPER_BITS_SHIFT;
92 unsigned long lower_bits = (phys_addr & PA_LOWER_BITS) >> PA_LOWER_BITS_SHIFT; 489 unsigned long lower_bits = (phys_addr & PA_LOWER_BITS) >> PA_LOWER_BITS_SHIFT;
@@ -118,25 +515,18 @@ static int bank_match(struct bank_info *bp, unsigned long phys_addr)
118} 515}
119 516
120/* Given PHYS_ADDR, search memory controller banks for a match. */ 517/* Given PHYS_ADDR, search memory controller banks for a match. */
121static struct bank_info *find_bank(unsigned long phys_addr) 518static struct chmc_bank_info *chmc_find_bank(unsigned long phys_addr)
122{ 519{
123 struct list_head *mctrl_head = &mctrl_list; 520 struct chmc *p;
124 struct list_head *mctrl_entry = mctrl_head->next;
125 521
126 for (;;) { 522 list_for_each_entry(p, &mctrl_list, list) {
127 struct mctrl_info *mp =
128 list_entry(mctrl_entry, struct mctrl_info, list);
129 int bank_no; 523 int bank_no;
130 524
131 if (mctrl_entry == mctrl_head)
132 break;
133 mctrl_entry = mctrl_entry->next;
134
135 for (bank_no = 0; bank_no < CHMCTRL_NBANKS; bank_no++) { 525 for (bank_no = 0; bank_no < CHMCTRL_NBANKS; bank_no++) {
136 struct bank_info *bp; 526 struct chmc_bank_info *bp;
137 527
138 bp = &mp->logical_banks[bank_no]; 528 bp = &p->logical_banks[bank_no];
139 if (bank_match(bp, phys_addr)) 529 if (chmc_bank_match(bp, phys_addr))
140 return bp; 530 return bp;
141 } 531 }
142 } 532 }
@@ -145,17 +535,15 @@ static struct bank_info *find_bank(unsigned long phys_addr)
145} 535}
146 536
147/* This is the main purpose of this driver. */ 537/* This is the main purpose of this driver. */
148#define SYNDROME_MIN -1 538static int chmc_print_dimm(int syndrome_code,
149#define SYNDROME_MAX 144 539 unsigned long phys_addr,
150int chmc_getunumber(int syndrome_code, 540 char *buf, int buflen)
151 unsigned long phys_addr,
152 char *buf, int buflen)
153{ 541{
154 struct bank_info *bp; 542 struct chmc_bank_info *bp;
155 struct obp_mem_layout *prop; 543 struct chmc_obp_mem_layout *prop;
156 int bank_in_controller, first_dimm; 544 int bank_in_controller, first_dimm;
157 545
158 bp = find_bank(phys_addr); 546 bp = chmc_find_bank(phys_addr);
159 if (bp == NULL || 547 if (bp == NULL ||
160 syndrome_code < SYNDROME_MIN || 548 syndrome_code < SYNDROME_MIN ||
161 syndrome_code > SYNDROME_MAX) { 549 syndrome_code > SYNDROME_MAX) {
@@ -166,60 +554,18 @@ int chmc_getunumber(int syndrome_code,
166 return 0; 554 return 0;
167 } 555 }
168 556
169 prop = &bp->mp->layout_prop; 557 prop = &bp->p->layout_prop;
170 bank_in_controller = bp->bank_id & (CHMCTRL_NBANKS - 1); 558 bank_in_controller = bp->bank_id & (CHMCTRL_NBANKS - 1);
171 first_dimm = (bank_in_controller & (CHMCTRL_NDGRPS - 1)); 559 first_dimm = (bank_in_controller & (CHMCTRL_NDGRPS - 1));
172 first_dimm *= CHMCTRL_NDIMMS; 560 first_dimm *= CHMCTRL_NDIMMS;
173 561
174 if (syndrome_code != SYNDROME_MIN) { 562 if (syndrome_code != SYNDROME_MIN) {
175 struct obp_map *map; 563 char *dimm_str;
176 int qword, where_in_line, where, map_index, map_offset; 564 int pin;
177 unsigned int map_val;
178 565
179 /* Yaay, single bit error so we can figure out 566 get_pin_and_dimm_str(syndrome_code, phys_addr, &pin,
180 * the exact dimm. 567 &dimm_str, prop, first_dimm);
181 */ 568 sprintf(buf, "%s, pin %3d", dimm_str, pin);
182 if (prop->symmetric)
183 map = &prop->map[0];
184 else
185 map = &prop->map[1];
186
187 /* Covert syndrome code into the way the bits are
188 * positioned on the bus.
189 */
190 if (syndrome_code < 144 - 16)
191 syndrome_code += 16;
192 else if (syndrome_code < 144)
193 syndrome_code -= (144 - 7);
194 else if (syndrome_code < (144 + 3))
195 syndrome_code -= (144 + 3 - 4);
196 else
197 syndrome_code -= 144 + 3;
198
199 /* All this magic has to do with how a cache line
200 * comes over the wire on Safari. A 64-bit line
201 * comes over in 4 quadword cycles, each of which
202 * transmit ECC/MTAG info as well as the actual
203 * data. 144 bits per quadword, 576 total.
204 */
205#define LINE_SIZE 64
206#define LINE_ADDR_MSK (LINE_SIZE - 1)
207#define QW_PER_LINE 4
208#define QW_BYTES (LINE_SIZE / QW_PER_LINE)
209#define QW_BITS 144
210#define LAST_BIT (576 - 1)
211
212 qword = (phys_addr & LINE_ADDR_MSK) / QW_BYTES;
213 where_in_line = ((3 - qword) * QW_BITS) + syndrome_code;
214 where = (LAST_BIT - where_in_line);
215 map_index = where >> 2;
216 map_offset = where & 0x3;
217 map_val = map->dimm_map[map_index];
218 map_val = ((map_val >> ((3 - map_offset) << 1)) & (2 - 1));
219
220 sprintf(buf, "%s, pin %3d",
221 prop->dimm_labels[first_dimm + map_val],
222 map->pin_map[where_in_line]);
223 } else { 569 } else {
224 int dimm; 570 int dimm;
225 571
@@ -240,7 +586,7 @@ int chmc_getunumber(int syndrome_code,
240 * the code is executing, you must use special ASI load/store else 586 * the code is executing, you must use special ASI load/store else
241 * you go through the global mapping. 587 * you go through the global mapping.
242 */ 588 */
243static u64 read_mcreg(struct mctrl_info *mp, unsigned long offset) 589static u64 chmc_read_mcreg(struct chmc *p, unsigned long offset)
244{ 590{
245 unsigned long ret, this_cpu; 591 unsigned long ret, this_cpu;
246 592
@@ -248,14 +594,14 @@ static u64 read_mcreg(struct mctrl_info *mp, unsigned long offset)
248 594
249 this_cpu = real_hard_smp_processor_id(); 595 this_cpu = real_hard_smp_processor_id();
250 596
251 if (mp->portid == this_cpu) { 597 if (p->portid == this_cpu) {
252 __asm__ __volatile__("ldxa [%1] %2, %0" 598 __asm__ __volatile__("ldxa [%1] %2, %0"
253 : "=r" (ret) 599 : "=r" (ret)
254 : "r" (offset), "i" (ASI_MCU_CTRL_REG)); 600 : "r" (offset), "i" (ASI_MCU_CTRL_REG));
255 } else { 601 } else {
256 __asm__ __volatile__("ldxa [%1] %2, %0" 602 __asm__ __volatile__("ldxa [%1] %2, %0"
257 : "=r" (ret) 603 : "=r" (ret)
258 : "r" (mp->regs + offset), 604 : "r" (p->regs + offset),
259 "i" (ASI_PHYS_BYPASS_EC_E)); 605 "i" (ASI_PHYS_BYPASS_EC_E));
260 } 606 }
261 607
@@ -265,178 +611,253 @@ static u64 read_mcreg(struct mctrl_info *mp, unsigned long offset)
265} 611}
266 612
267#if 0 /* currently unused */ 613#if 0 /* currently unused */
268static void write_mcreg(struct mctrl_info *mp, unsigned long offset, u64 val) 614static void chmc_write_mcreg(struct chmc *p, unsigned long offset, u64 val)
269{ 615{
270 if (mp->portid == smp_processor_id()) { 616 if (p->portid == smp_processor_id()) {
271 __asm__ __volatile__("stxa %0, [%1] %2" 617 __asm__ __volatile__("stxa %0, [%1] %2"
272 : : "r" (val), 618 : : "r" (val),
273 "r" (offset), "i" (ASI_MCU_CTRL_REG)); 619 "r" (offset), "i" (ASI_MCU_CTRL_REG));
274 } else { 620 } else {
275 __asm__ __volatile__("ldxa %0, [%1] %2" 621 __asm__ __volatile__("ldxa %0, [%1] %2"
276 : : "r" (val), 622 : : "r" (val),
277 "r" (mp->regs + offset), 623 "r" (p->regs + offset),
278 "i" (ASI_PHYS_BYPASS_EC_E)); 624 "i" (ASI_PHYS_BYPASS_EC_E));
279 } 625 }
280} 626}
281#endif 627#endif
282 628
283static void interpret_one_decode_reg(struct mctrl_info *mp, int which_bank, u64 val) 629static void chmc_interpret_one_decode_reg(struct chmc *p, int which_bank, u64 val)
284{ 630{
285 struct bank_info *p = &mp->logical_banks[which_bank]; 631 struct chmc_bank_info *bp = &p->logical_banks[which_bank];
286 632
287 p->mp = mp; 633 bp->p = p;
288 p->bank_id = (CHMCTRL_NBANKS * mp->portid) + which_bank; 634 bp->bank_id = (CHMCTRL_NBANKS * p->portid) + which_bank;
289 p->raw_reg = val; 635 bp->raw_reg = val;
290 p->valid = (val & MEM_DECODE_VALID) >> MEM_DECODE_VALID_SHIFT; 636 bp->valid = (val & MEM_DECODE_VALID) >> MEM_DECODE_VALID_SHIFT;
291 p->uk = (val & MEM_DECODE_UK) >> MEM_DECODE_UK_SHIFT; 637 bp->uk = (val & MEM_DECODE_UK) >> MEM_DECODE_UK_SHIFT;
292 p->um = (val & MEM_DECODE_UM) >> MEM_DECODE_UM_SHIFT; 638 bp->um = (val & MEM_DECODE_UM) >> MEM_DECODE_UM_SHIFT;
293 p->lk = (val & MEM_DECODE_LK) >> MEM_DECODE_LK_SHIFT; 639 bp->lk = (val & MEM_DECODE_LK) >> MEM_DECODE_LK_SHIFT;
294 p->lm = (val & MEM_DECODE_LM) >> MEM_DECODE_LM_SHIFT; 640 bp->lm = (val & MEM_DECODE_LM) >> MEM_DECODE_LM_SHIFT;
295 641
296 p->base = (p->um); 642 bp->base = (bp->um);
297 p->base &= ~(p->uk); 643 bp->base &= ~(bp->uk);
298 p->base <<= PA_UPPER_BITS_SHIFT; 644 bp->base <<= PA_UPPER_BITS_SHIFT;
299 645
300 switch(p->lk) { 646 switch(bp->lk) {
301 case 0xf: 647 case 0xf:
302 default: 648 default:
303 p->interleave = 1; 649 bp->interleave = 1;
304 break; 650 break;
305 651
306 case 0xe: 652 case 0xe:
307 p->interleave = 2; 653 bp->interleave = 2;
308 break; 654 break;
309 655
310 case 0xc: 656 case 0xc:
311 p->interleave = 4; 657 bp->interleave = 4;
312 break; 658 break;
313 659
314 case 0x8: 660 case 0x8:
315 p->interleave = 8; 661 bp->interleave = 8;
316 break; 662 break;
317 663
318 case 0x0: 664 case 0x0:
319 p->interleave = 16; 665 bp->interleave = 16;
320 break; 666 break;
321 }; 667 };
322 668
323 /* UK[10] is reserved, and UK[11] is not set for the SDRAM 669 /* UK[10] is reserved, and UK[11] is not set for the SDRAM
324 * bank size definition. 670 * bank size definition.
325 */ 671 */
326 p->size = (((unsigned long)p->uk & 672 bp->size = (((unsigned long)bp->uk &
327 ((1UL << 10UL) - 1UL)) + 1UL) << PA_UPPER_BITS_SHIFT; 673 ((1UL << 10UL) - 1UL)) + 1UL) << PA_UPPER_BITS_SHIFT;
328 p->size /= p->interleave; 674 bp->size /= bp->interleave;
329} 675}
330 676
331static void fetch_decode_regs(struct mctrl_info *mp) 677static void chmc_fetch_decode_regs(struct chmc *p)
332{ 678{
333 if (mp->layout_size == 0) 679 if (p->layout_size == 0)
334 return; 680 return;
335 681
336 interpret_one_decode_reg(mp, 0, 682 chmc_interpret_one_decode_reg(p, 0,
337 read_mcreg(mp, CHMCTRL_DECODE1)); 683 chmc_read_mcreg(p, CHMCTRL_DECODE1));
338 interpret_one_decode_reg(mp, 1, 684 chmc_interpret_one_decode_reg(p, 1,
339 read_mcreg(mp, CHMCTRL_DECODE2)); 685 chmc_read_mcreg(p, CHMCTRL_DECODE2));
340 interpret_one_decode_reg(mp, 2, 686 chmc_interpret_one_decode_reg(p, 2,
341 read_mcreg(mp, CHMCTRL_DECODE3)); 687 chmc_read_mcreg(p, CHMCTRL_DECODE3));
342 interpret_one_decode_reg(mp, 3, 688 chmc_interpret_one_decode_reg(p, 3,
343 read_mcreg(mp, CHMCTRL_DECODE4)); 689 chmc_read_mcreg(p, CHMCTRL_DECODE4));
344} 690}
345 691
346static int init_one_mctrl(struct device_node *dp) 692static int __devinit chmc_probe(struct of_device *op,
693 const struct of_device_id *match)
347{ 694{
348 struct mctrl_info *mp = kzalloc(sizeof(*mp), GFP_KERNEL); 695 struct device_node *dp = op->node;
349 int portid = of_getintprop_default(dp, "portid", -1); 696 unsigned long ver;
350 const struct linux_prom64_registers *regs;
351 const void *pval; 697 const void *pval;
352 int len; 698 int len, portid;
699 struct chmc *p;
700 int err;
701
702 err = -ENODEV;
703 __asm__ ("rdpr %%ver, %0" : "=r" (ver));
704 if ((ver >> 32UL) == __JALAPENO_ID ||
705 (ver >> 32UL) == __SERRANO_ID)
706 goto out;
353 707
354 if (!mp) 708 portid = of_getintprop_default(dp, "portid", -1);
355 return -1;
356 if (portid == -1) 709 if (portid == -1)
357 goto fail; 710 goto out;
358 711
359 mp->portid = portid;
360 pval = of_get_property(dp, "memory-layout", &len); 712 pval = of_get_property(dp, "memory-layout", &len);
361 mp->layout_size = len; 713 if (pval && len > sizeof(p->layout_prop)) {
362 if (!pval) 714 printk(KERN_ERR PFX "Unexpected memory-layout property "
363 mp->layout_size = 0; 715 "size %d.\n", len);
364 else { 716 goto out;
365 if (mp->layout_size > sizeof(mp->layout_prop))
366 goto fail;
367 memcpy(&mp->layout_prop, pval, len);
368 } 717 }
369 718
370 regs = of_get_property(dp, "reg", NULL); 719 err = -ENOMEM;
371 if (!regs || regs->reg_size != 0x48) 720 p = kzalloc(sizeof(*p), GFP_KERNEL);
372 goto fail; 721 if (!p) {
722 printk(KERN_ERR PFX "Could not allocate struct chmc.\n");
723 goto out;
724 }
373 725
374 mp->regs = ioremap(regs->phys_addr, regs->reg_size); 726 p->portid = portid;
375 if (mp->regs == NULL) 727 p->layout_size = len;
376 goto fail; 728 if (!pval)
729 p->layout_size = 0;
730 else
731 memcpy(&p->layout_prop, pval, len);
732
733 p->regs = of_ioremap(&op->resource[0], 0, 0x48, "chmc");
734 if (!p->regs) {
735 printk(KERN_ERR PFX "Could not map registers.\n");
736 goto out_free;
737 }
377 738
378 if (mp->layout_size != 0UL) { 739 if (p->layout_size != 0UL) {
379 mp->timing_control1 = read_mcreg(mp, CHMCTRL_TCTRL1); 740 p->timing_control1 = chmc_read_mcreg(p, CHMCTRL_TCTRL1);
380 mp->timing_control2 = read_mcreg(mp, CHMCTRL_TCTRL2); 741 p->timing_control2 = chmc_read_mcreg(p, CHMCTRL_TCTRL2);
381 mp->timing_control3 = read_mcreg(mp, CHMCTRL_TCTRL3); 742 p->timing_control3 = chmc_read_mcreg(p, CHMCTRL_TCTRL3);
382 mp->timing_control4 = read_mcreg(mp, CHMCTRL_TCTRL4); 743 p->timing_control4 = chmc_read_mcreg(p, CHMCTRL_TCTRL4);
383 mp->memaddr_control = read_mcreg(mp, CHMCTRL_MACTRL); 744 p->memaddr_control = chmc_read_mcreg(p, CHMCTRL_MACTRL);
384 } 745 }
385 746
386 fetch_decode_regs(mp); 747 chmc_fetch_decode_regs(p);
387 748
388 list_add(&mp->list, &mctrl_list); 749 mc_list_add(&p->list);
389 750
390 /* Report the device. */ 751 printk(KERN_INFO PFX "UltraSPARC-III memory controller at %s [%s]\n",
391 printk(KERN_INFO "%s: US3 memory controller at %p [%s]\n",
392 dp->full_name, 752 dp->full_name,
393 mp->regs, (mp->layout_size ? "ACTIVE" : "INACTIVE")); 753 (p->layout_size ? "ACTIVE" : "INACTIVE"));
394 754
395 return 0; 755 dev_set_drvdata(&op->dev, p);
756
757 err = 0;
758
759out:
760 return err;
761
762out_free:
763 kfree(p);
764 goto out;
765}
396 766
397fail: 767static int __devinit us3mc_probe(struct of_device *op,
398 if (mp) { 768 const struct of_device_id *match)
399 if (mp->regs != NULL) 769{
400 iounmap(mp->regs); 770 if (mc_type == MC_TYPE_SAFARI)
401 kfree(mp); 771 return chmc_probe(op, match);
772 else if (mc_type == MC_TYPE_JBUS)
773 return jbusmc_probe(op, match);
774 return -ENODEV;
775}
776
777static void __devexit chmc_destroy(struct of_device *op, struct chmc *p)
778{
779 list_del(&p->list);
780 of_iounmap(&op->resource[0], p->regs, 0x48);
781 kfree(p);
782}
783
784static void __devexit jbusmc_destroy(struct of_device *op, struct jbusmc *p)
785{
786 mc_list_del(&p->list);
787 of_iounmap(&op->resource[0], p->regs, JBUSMC_REGS_SIZE);
788 kfree(p);
789}
790
791static int __devexit us3mc_remove(struct of_device *op)
792{
793 void *p = dev_get_drvdata(&op->dev);
794
795 if (p) {
796 if (mc_type == MC_TYPE_SAFARI)
797 chmc_destroy(op, p);
798 else if (mc_type == MC_TYPE_JBUS)
799 jbusmc_destroy(op, p);
402 } 800 }
403 return -1; 801 return 0;
802}
803
804static const struct of_device_id us3mc_match[] = {
805 {
806 .name = "memory-controller",
807 },
808 {},
809};
810MODULE_DEVICE_TABLE(of, us3mc_match);
811
812static struct of_platform_driver us3mc_driver = {
813 .name = "us3mc",
814 .match_table = us3mc_match,
815 .probe = us3mc_probe,
816 .remove = __devexit_p(us3mc_remove),
817};
818
819static inline bool us3mc_platform(void)
820{
821 if (tlb_type == cheetah || tlb_type == cheetah_plus)
822 return true;
823 return false;
404} 824}
405 825
406static int __init chmc_init(void) 826static int __init us3mc_init(void)
407{ 827{
408 struct device_node *dp; 828 unsigned long ver;
829 int ret;
409 830
410 /* This driver is only for cheetah platforms. */ 831 if (!us3mc_platform())
411 if (tlb_type != cheetah && tlb_type != cheetah_plus)
412 return -ENODEV; 832 return -ENODEV;
413 833
414 for_each_node_by_name(dp, "memory-controller") 834 __asm__ ("rdpr %%ver, %0" : "=r" (ver));
415 init_one_mctrl(dp); 835 if ((ver >> 32UL) == __JALAPENO_ID ||
836 (ver >> 32UL) == __SERRANO_ID) {
837 mc_type = MC_TYPE_JBUS;
838 us3mc_dimm_printer = jbusmc_print_dimm;
839 } else {
840 mc_type = MC_TYPE_SAFARI;
841 us3mc_dimm_printer = chmc_print_dimm;
842 }
416 843
417 for_each_node_by_name(dp, "mc-us3") 844 ret = register_dimm_printer(us3mc_dimm_printer);
418 init_one_mctrl(dp);
419 845
420 return 0; 846 if (!ret) {
847 ret = of_register_driver(&us3mc_driver, &of_bus_type);
848 if (ret)
849 unregister_dimm_printer(us3mc_dimm_printer);
850 }
851 return ret;
421} 852}
422 853
423static void __exit chmc_cleanup(void) 854static void __exit us3mc_cleanup(void)
424{ 855{
425 struct list_head *head = &mctrl_list; 856 if (us3mc_platform()) {
426 struct list_head *tmp = head->next; 857 unregister_dimm_printer(us3mc_dimm_printer);
427 858 of_unregister_driver(&us3mc_driver);
428 for (;;) {
429 struct mctrl_info *p =
430 list_entry(tmp, struct mctrl_info, list);
431 if (tmp == head)
432 break;
433 tmp = tmp->next;
434
435 list_del(&p->list);
436 iounmap(p->regs);
437 kfree(p);
438 } 859 }
439} 860}
440 861
441module_init(chmc_init); 862module_init(us3mc_init);
442module_exit(chmc_cleanup); 863module_exit(us3mc_cleanup);
diff --git a/arch/sparc64/kernel/cpu.c b/arch/sparc64/kernel/cpu.c
index 0097c08dc600..0c9ac83ed0a8 100644
--- a/arch/sparc64/kernel/cpu.c
+++ b/arch/sparc64/kernel/cpu.c
@@ -1,7 +1,7 @@
1/* cpu.c: Dinky routines to look for the kind of Sparc cpu 1/* cpu.c: Dinky routines to look for the kind of Sparc cpu
2 * we are on. 2 * we are on.
3 * 3 *
4 * Copyright (C) 1996, 2007 David S. Miller (davem@davemloft.net) 4 * Copyright (C) 1996, 2007, 2008 David S. Miller (davem@davemloft.net)
5 */ 5 */
6 6
7#include <linux/kernel.h> 7#include <linux/kernel.h>
@@ -19,53 +19,86 @@
19 19
20DEFINE_PER_CPU(cpuinfo_sparc, __cpu_data) = { 0 }; 20DEFINE_PER_CPU(cpuinfo_sparc, __cpu_data) = { 0 };
21 21
22struct cpu_iu_info { 22struct cpu_chip_info {
23 short manuf; 23 unsigned short manuf;
24 short impl; 24 unsigned short impl;
25 char* cpu_name; /* should be enough I hope... */ 25 const char *cpu_name;
26 const char *fp_name;
26}; 27};
27 28
28struct cpu_fp_info { 29static const struct cpu_chip_info cpu_chips[] = {
29 short manuf; 30 {
30 short impl; 31 .manuf = 0x17,
31 char fpu_vers; 32 .impl = 0x10,
32 char* fp_name; 33 .cpu_name = "TI UltraSparc I (SpitFire)",
34 .fp_name = "UltraSparc I integrated FPU",
35 },
36 {
37 .manuf = 0x22,
38 .impl = 0x10,
39 .cpu_name = "TI UltraSparc I (SpitFire)",
40 .fp_name = "UltraSparc I integrated FPU",
41 },
42 {
43 .manuf = 0x17,
44 .impl = 0x11,
45 .cpu_name = "TI UltraSparc II (BlackBird)",
46 .fp_name = "UltraSparc II integrated FPU",
47 },
48 {
49 .manuf = 0x17,
50 .impl = 0x12,
51 .cpu_name = "TI UltraSparc IIi (Sabre)",
52 .fp_name = "UltraSparc IIi integrated FPU",
53 },
54 {
55 .manuf = 0x17,
56 .impl = 0x13,
57 .cpu_name = "TI UltraSparc IIe (Hummingbird)",
58 .fp_name = "UltraSparc IIe integrated FPU",
59 },
60 {
61 .manuf = 0x3e,
62 .impl = 0x14,
63 .cpu_name = "TI UltraSparc III (Cheetah)",
64 .fp_name = "UltraSparc III integrated FPU",
65 },
66 {
67 .manuf = 0x3e,
68 .impl = 0x15,
69 .cpu_name = "TI UltraSparc III+ (Cheetah+)",
70 .fp_name = "UltraSparc III+ integrated FPU",
71 },
72 {
73 .manuf = 0x3e,
74 .impl = 0x16,
75 .cpu_name = "TI UltraSparc IIIi (Jalapeno)",
76 .fp_name = "UltraSparc IIIi integrated FPU",
77 },
78 {
79 .manuf = 0x3e,
80 .impl = 0x18,
81 .cpu_name = "TI UltraSparc IV (Jaguar)",
82 .fp_name = "UltraSparc IV integrated FPU",
83 },
84 {
85 .manuf = 0x3e,
86 .impl = 0x19,
87 .cpu_name = "TI UltraSparc IV+ (Panther)",
88 .fp_name = "UltraSparc IV+ integrated FPU",
89 },
90 {
91 .manuf = 0x3e,
92 .impl = 0x22,
93 .cpu_name = "TI UltraSparc IIIi+ (Serrano)",
94 .fp_name = "UltraSparc IIIi+ integrated FPU",
95 },
33}; 96};
34 97
35static struct cpu_fp_info linux_sparc_fpu[] = { 98#define NSPARCCHIPS ARRAY_SIZE(linux_sparc_chips)
36 { 0x17, 0x10, 0, "UltraSparc I integrated FPU"},
37 { 0x22, 0x10, 0, "UltraSparc I integrated FPU"},
38 { 0x17, 0x11, 0, "UltraSparc II integrated FPU"},
39 { 0x17, 0x12, 0, "UltraSparc IIi integrated FPU"},
40 { 0x17, 0x13, 0, "UltraSparc IIe integrated FPU"},
41 { 0x3e, 0x14, 0, "UltraSparc III integrated FPU"},
42 { 0x3e, 0x15, 0, "UltraSparc III+ integrated FPU"},
43 { 0x3e, 0x16, 0, "UltraSparc IIIi integrated FPU"},
44 { 0x3e, 0x18, 0, "UltraSparc IV integrated FPU"},
45 { 0x3e, 0x19, 0, "UltraSparc IV+ integrated FPU"},
46 { 0x3e, 0x22, 0, "UltraSparc IIIi+ integrated FPU"},
47};
48
49#define NSPARCFPU ARRAY_SIZE(linux_sparc_fpu)
50
51static struct cpu_iu_info linux_sparc_chips[] = {
52 { 0x17, 0x10, "TI UltraSparc I (SpitFire)"},
53 { 0x22, 0x10, "TI UltraSparc I (SpitFire)"},
54 { 0x17, 0x11, "TI UltraSparc II (BlackBird)"},
55 { 0x17, 0x12, "TI UltraSparc IIi (Sabre)"},
56 { 0x17, 0x13, "TI UltraSparc IIe (Hummingbird)"},
57 { 0x3e, 0x14, "TI UltraSparc III (Cheetah)"},
58 { 0x3e, 0x15, "TI UltraSparc III+ (Cheetah+)"},
59 { 0x3e, 0x16, "TI UltraSparc IIIi (Jalapeno)"},
60 { 0x3e, 0x18, "TI UltraSparc IV (Jaguar)"},
61 { 0x3e, 0x19, "TI UltraSparc IV+ (Panther)"},
62 { 0x3e, 0x22, "TI UltraSparc IIIi+ (Serrano)"},
63};
64 99
65#define NSPARCCHIPS ARRAY_SIZE(linux_sparc_chips) 100const char *sparc_cpu_type;
66 101const char *sparc_fpu_type;
67char *sparc_cpu_type;
68char *sparc_fpu_type;
69 102
70static void __init sun4v_cpu_probe(void) 103static void __init sun4v_cpu_probe(void)
71{ 104{
@@ -89,68 +122,45 @@ static void __init sun4v_cpu_probe(void)
89 } 122 }
90} 123}
91 124
92void __init cpu_probe(void) 125static const struct cpu_chip_info * __init find_cpu_chip(unsigned short manuf,
126 unsigned short impl)
93{ 127{
94 unsigned long ver, fpu_vers, manuf, impl, fprs;
95 int i; 128 int i;
96
97 if (tlb_type == hypervisor) {
98 sun4v_cpu_probe();
99 return;
100 }
101 129
102 fprs = fprs_read(); 130 for (i = 0; i < ARRAY_SIZE(cpu_chips); i++) {
103 fprs_write(FPRS_FEF); 131 const struct cpu_chip_info *p = &cpu_chips[i];
104 __asm__ __volatile__ ("rdpr %%ver, %0; stx %%fsr, [%1]"
105 : "=&r" (ver)
106 : "r" (&fpu_vers));
107 fprs_write(fprs);
108
109 manuf = ((ver >> 48) & 0xffff);
110 impl = ((ver >> 32) & 0xffff);
111
112 fpu_vers = ((fpu_vers >> 17) & 0x7);
113
114retry:
115 for (i = 0; i < NSPARCCHIPS; i++) {
116 if (linux_sparc_chips[i].manuf == manuf) {
117 if (linux_sparc_chips[i].impl == impl) {
118 sparc_cpu_type =
119 linux_sparc_chips[i].cpu_name;
120 break;
121 }
122 }
123 }
124 132
125 if (i == NSPARCCHIPS) { 133 if (p->manuf == manuf && p->impl == impl)
126 /* Maybe it is a cheetah+ derivative, report it as cheetah+ 134 return p;
127 * in that case until we learn the real names.
128 */
129 if (manuf == 0x3e &&
130 impl > 0x15) {
131 impl = 0x15;
132 goto retry;
133 } else {
134 printk("DEBUG: manuf[%lx] impl[%lx]\n",
135 manuf, impl);
136 }
137 sparc_cpu_type = "Unknown CPU";
138 } 135 }
136 return NULL;
137}
139 138
140 for (i = 0; i < NSPARCFPU; i++) { 139static int __init cpu_type_probe(void)
141 if (linux_sparc_fpu[i].manuf == manuf && 140{
142 linux_sparc_fpu[i].impl == impl) { 141 if (tlb_type == hypervisor) {
143 if (linux_sparc_fpu[i].fpu_vers == fpu_vers) { 142 sun4v_cpu_probe();
144 sparc_fpu_type = 143 } else {
145 linux_sparc_fpu[i].fp_name; 144 unsigned long ver, manuf, impl;
146 break; 145 const struct cpu_chip_info *p;
147 } 146
147 __asm__ __volatile__("rdpr %%ver, %0" : "=r" (ver));
148
149 manuf = ((ver >> 48) & 0xffff);
150 impl = ((ver >> 32) & 0xffff);
151
152 p = find_cpu_chip(manuf, impl);
153 if (p) {
154 sparc_cpu_type = p->cpu_name;
155 sparc_fpu_type = p->fp_name;
156 } else {
157 printk(KERN_ERR "CPU: Unknown chip, manuf[%lx] impl[%lx]\n",
158 manuf, impl);
159 sparc_cpu_type = "Unknown CPU";
160 sparc_fpu_type = "Unknown FPU";
148 } 161 }
149 } 162 }
150 163 return 0;
151 if (i == NSPARCFPU) {
152 printk("DEBUG: manuf[%lx] impl[%lx] fsr.vers[%lx]\n",
153 manuf, impl, fpu_vers);
154 sparc_fpu_type = "Unknown FPU";
155 }
156} 164}
165
166arch_initcall(cpu_type_probe);
diff --git a/arch/sparc64/kernel/ds.c b/arch/sparc64/kernel/ds.c
index d0fa5aa38934..f52e0534d91d 100644
--- a/arch/sparc64/kernel/ds.c
+++ b/arch/sparc64/kernel/ds.c
@@ -1,6 +1,6 @@
1/* ds.c: Domain Services driver for Logical Domains 1/* ds.c: Domain Services driver for Logical Domains
2 * 2 *
3 * Copyright (C) 2007 David S. Miller <davem@davemloft.net> 3 * Copyright (C) 2007, 2008 David S. Miller <davem@davemloft.net>
4 */ 4 */
5 5
6#include <linux/kernel.h> 6#include <linux/kernel.h>
@@ -1217,7 +1217,7 @@ static int ds_remove(struct vio_dev *vdev)
1217 return 0; 1217 return 0;
1218} 1218}
1219 1219
1220static struct vio_device_id ds_match[] = { 1220static struct vio_device_id __initdata ds_match[] = {
1221 { 1221 {
1222 .type = "domain-services-port", 1222 .type = "domain-services-port",
1223 }, 1223 },
diff --git a/arch/sparc64/kernel/ebus.c b/arch/sparc64/kernel/ebus.c
index 60d36d142559..77dbf6d45faf 100644
--- a/arch/sparc64/kernel/ebus.c
+++ b/arch/sparc64/kernel/ebus.c
@@ -1,5 +1,4 @@
1/* 1/* ebus.c: EBUS DMA library code.
2 * ebus.c: PCI to EBus bridge device.
3 * 2 *
4 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be) 3 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
5 * Copyright (C) 1999 David S. Miller (davem@redhat.com) 4 * Copyright (C) 1999 David S. Miller (davem@redhat.com)
@@ -9,23 +8,11 @@
9#include <linux/kernel.h> 8#include <linux/kernel.h>
10#include <linux/types.h> 9#include <linux/types.h>
11#include <linux/init.h> 10#include <linux/init.h>
12#include <linux/slab.h>
13#include <linux/string.h>
14#include <linux/interrupt.h> 11#include <linux/interrupt.h>
15#include <linux/delay.h> 12#include <linux/delay.h>
16#include <linux/pci.h>
17#include <linux/of_device.h>
18
19#include <asm/system.h>
20#include <asm/page.h>
21#include <asm/ebus.h>
22#include <asm/oplib.h>
23#include <asm/prom.h>
24#include <asm/bpp.h>
25#include <asm/irq.h>
26#include <asm/io.h>
27 13
28/* EBUS dma library. */ 14#include <asm/ebus_dma.h>
15#include <asm/io.h>
29 16
30#define EBDMA_CSR 0x00UL /* Control/Status */ 17#define EBDMA_CSR 0x00UL /* Control/Status */
31#define EBDMA_ADDR 0x04UL /* DMA Address */ 18#define EBDMA_ADDR 0x04UL /* DMA Address */
@@ -268,283 +255,3 @@ void ebus_dma_enable(struct ebus_dma_info *p, int on)
268 spin_unlock_irqrestore(&p->lock, flags); 255 spin_unlock_irqrestore(&p->lock, flags);
269} 256}
270EXPORT_SYMBOL(ebus_dma_enable); 257EXPORT_SYMBOL(ebus_dma_enable);
271
272struct linux_ebus *ebus_chain = NULL;
273
274static inline void *ebus_alloc(size_t size)
275{
276 void *mem;
277
278 mem = kzalloc(size, GFP_ATOMIC);
279 if (!mem)
280 panic("ebus_alloc: out of memory");
281 return mem;
282}
283
284static void __init fill_ebus_child(struct device_node *dp,
285 struct linux_ebus_child *dev,
286 int non_standard_regs)
287{
288 struct of_device *op;
289 const int *regs;
290 int i, len;
291
292 dev->prom_node = dp;
293 printk(" (%s)", dp->name);
294
295 regs = of_get_property(dp, "reg", &len);
296 if (!regs)
297 dev->num_addrs = 0;
298 else
299 dev->num_addrs = len / sizeof(regs[0]);
300
301 if (non_standard_regs) {
302 /* This is to handle reg properties which are not
303 * in the parent relative format. One example are
304 * children of the i2c device on CompactPCI systems.
305 *
306 * So, for such devices we just record the property
307 * raw in the child resources.
308 */
309 for (i = 0; i < dev->num_addrs; i++)
310 dev->resource[i].start = regs[i];
311 } else {
312 for (i = 0; i < dev->num_addrs; i++) {
313 int rnum = regs[i];
314 if (rnum >= dev->parent->num_addrs) {
315 prom_printf("UGH: property for %s was %d, need < %d\n",
316 dp->name, len, dev->parent->num_addrs);
317 prom_halt();
318 }
319 dev->resource[i].start = dev->parent->resource[i].start;
320 dev->resource[i].end = dev->parent->resource[i].end;
321 dev->resource[i].flags = IORESOURCE_MEM;
322 dev->resource[i].name = dp->name;
323 }
324 }
325
326 op = of_find_device_by_node(dp);
327 if (!op) {
328 dev->num_irqs = 0;
329 } else {
330 dev->num_irqs = op->num_irqs;
331 for (i = 0; i < dev->num_irqs; i++)
332 dev->irqs[i] = op->irqs[i];
333 }
334
335 if (!dev->num_irqs) {
336 /*
337 * Oh, well, some PROMs don't export interrupts
338 * property to children of EBus devices...
339 *
340 * Be smart about PS/2 keyboard and mouse.
341 */
342 if (!strcmp(dev->parent->prom_node->name, "8042")) {
343 if (!strcmp(dev->prom_node->name, "kb_ps2")) {
344 dev->num_irqs = 1;
345 dev->irqs[0] = dev->parent->irqs[0];
346 } else {
347 dev->num_irqs = 1;
348 dev->irqs[0] = dev->parent->irqs[1];
349 }
350 }
351 }
352}
353
354static int __init child_regs_nonstandard(struct linux_ebus_device *dev)
355{
356 if (!strcmp(dev->prom_node->name, "i2c") ||
357 !strcmp(dev->prom_node->name, "SUNW,lombus"))
358 return 1;
359 return 0;
360}
361
362static void __init fill_ebus_device(struct device_node *dp, struct linux_ebus_device *dev)
363{
364 struct linux_ebus_child *child;
365 struct dev_archdata *sd;
366 struct of_device *op;
367 int i, len;
368
369 dev->prom_node = dp;
370
371 printk(" [%s", dp->name);
372
373 op = of_find_device_by_node(dp);
374 if (!op) {
375 dev->num_addrs = 0;
376 dev->num_irqs = 0;
377 } else {
378 const int *regs = of_get_property(dp, "reg", &len);
379
380 if (!regs)
381 len = 0;
382 dev->num_addrs = len / sizeof(struct linux_prom_registers);
383
384 for (i = 0; i < dev->num_addrs; i++)
385 memcpy(&dev->resource[i],
386 &op->resource[i],
387 sizeof(struct resource));
388
389 dev->num_irqs = op->num_irqs;
390 for (i = 0; i < dev->num_irqs; i++)
391 dev->irqs[i] = op->irqs[i];
392 }
393
394 sd = &dev->ofdev.dev.archdata;
395 sd->prom_node = dp;
396 sd->op = &dev->ofdev;
397 sd->iommu = dev->bus->ofdev.dev.parent->archdata.iommu;
398 sd->stc = dev->bus->ofdev.dev.parent->archdata.stc;
399 sd->numa_node = dev->bus->ofdev.dev.parent->archdata.numa_node;
400
401 dev->ofdev.node = dp;
402 dev->ofdev.dev.parent = &dev->bus->ofdev.dev;
403 dev->ofdev.dev.bus = &ebus_bus_type;
404 dev_set_name(&dev->ofdev.dev, "ebus[%08x]", dp->node);
405
406 /* Register with core */
407 if (of_device_register(&dev->ofdev) != 0)
408 printk(KERN_DEBUG "ebus: device registration error for %s!\n",
409 dp->path_component_name);
410
411 dp = dp->child;
412 if (dp) {
413 printk(" ->");
414 dev->children = ebus_alloc(sizeof(struct linux_ebus_child));
415
416 child = dev->children;
417 child->next = NULL;
418 child->parent = dev;
419 child->bus = dev->bus;
420 fill_ebus_child(dp, child,
421 child_regs_nonstandard(dev));
422
423 while ((dp = dp->sibling) != NULL) {
424 child->next = ebus_alloc(sizeof(struct linux_ebus_child));
425
426 child = child->next;
427 child->next = NULL;
428 child->parent = dev;
429 child->bus = dev->bus;
430 fill_ebus_child(dp, child,
431 child_regs_nonstandard(dev));
432 }
433 }
434 printk("]");
435}
436
437static struct pci_dev *find_next_ebus(struct pci_dev *start, int *is_rio_p)
438{
439 struct pci_dev *pdev = start;
440
441 while ((pdev = pci_get_device(PCI_VENDOR_ID_SUN, PCI_ANY_ID, pdev)))
442 if (pdev->device == PCI_DEVICE_ID_SUN_EBUS ||
443 pdev->device == PCI_DEVICE_ID_SUN_RIO_EBUS)
444 break;
445
446 *is_rio_p = !!(pdev && (pdev->device == PCI_DEVICE_ID_SUN_RIO_EBUS));
447
448 return pdev;
449}
450
451void __init ebus_init(void)
452{
453 struct linux_ebus_device *dev;
454 struct linux_ebus *ebus;
455 struct pci_dev *pdev;
456 struct device_node *dp;
457 int is_rio;
458 int num_ebus = 0;
459
460 pdev = find_next_ebus(NULL, &is_rio);
461 if (!pdev) {
462 printk("ebus: No EBus's found.\n");
463 return;
464 }
465
466 dp = pci_device_to_OF_node(pdev);
467
468 ebus_chain = ebus = ebus_alloc(sizeof(struct linux_ebus));
469 ebus->next = NULL;
470 ebus->is_rio = is_rio;
471
472 while (dp) {
473 struct device_node *child;
474
475 /* SUNW,pci-qfe uses four empty ebuses on it.
476 I think we should not consider them here,
477 as they have half of the properties this
478 code expects and once we do PCI hot-plug,
479 we'd have to tweak with the ebus_chain
480 in the runtime after initialization. -jj */
481 if (!dp->child) {
482 pdev = find_next_ebus(pdev, &is_rio);
483 if (!pdev) {
484 if (ebus == ebus_chain) {
485 ebus_chain = NULL;
486 printk("ebus: No EBus's found.\n");
487 return;
488 }
489 break;
490 }
491 ebus->is_rio = is_rio;
492 dp = pci_device_to_OF_node(pdev);
493 continue;
494 }
495 printk("ebus%d:", num_ebus);
496
497 ebus->index = num_ebus;
498 ebus->prom_node = dp;
499 ebus->self = pdev;
500
501 ebus->ofdev.node = dp;
502 ebus->ofdev.dev.parent = &pdev->dev;
503 ebus->ofdev.dev.bus = &ebus_bus_type;
504 dev_set_name(&ebus->ofdev.dev, "ebus%d", num_ebus);
505
506 /* Register with core */
507 if (of_device_register(&ebus->ofdev) != 0)
508 printk(KERN_DEBUG "ebus: device registration error for %s!\n",
509 dp->path_component_name);
510
511
512 child = dp->child;
513 if (!child)
514 goto next_ebus;
515
516 ebus->devices = ebus_alloc(sizeof(struct linux_ebus_device));
517
518 dev = ebus->devices;
519 dev->next = NULL;
520 dev->children = NULL;
521 dev->bus = ebus;
522 fill_ebus_device(child, dev);
523
524 while ((child = child->sibling) != NULL) {
525 dev->next = ebus_alloc(sizeof(struct linux_ebus_device));
526
527 dev = dev->next;
528 dev->next = NULL;
529 dev->children = NULL;
530 dev->bus = ebus;
531 fill_ebus_device(child, dev);
532 }
533
534 next_ebus:
535 printk("\n");
536
537 pdev = find_next_ebus(pdev, &is_rio);
538 if (!pdev)
539 break;
540
541 dp = pci_device_to_OF_node(pdev);
542
543 ebus->next = ebus_alloc(sizeof(struct linux_ebus));
544 ebus = ebus->next;
545 ebus->next = NULL;
546 ebus->is_rio = is_rio;
547 ++num_ebus;
548 }
549 pci_dev_put(pdev); /* XXX for the case, when ebusnd is 0, is it OK? */
550}
diff --git a/arch/sparc64/kernel/entry.h b/arch/sparc64/kernel/entry.h
index fc294a292899..34d7ab5e10d2 100644
--- a/arch/sparc64/kernel/entry.h
+++ b/arch/sparc64/kernel/entry.h
@@ -5,8 +5,8 @@
5#include <linux/types.h> 5#include <linux/types.h>
6#include <linux/init.h> 6#include <linux/init.h>
7 7
8extern char *sparc_cpu_type; 8extern const char *sparc_cpu_type;
9extern char *sparc_fpu_type; 9extern const char *sparc_fpu_type;
10 10
11extern void __init per_cpu_patch(void); 11extern void __init per_cpu_patch(void);
12extern void __init sun4v_patch(void); 12extern void __init sun4v_patch(void);
@@ -22,7 +22,8 @@ extern void do_notify_resume(struct pt_regs *regs,
22 unsigned long orig_i0, 22 unsigned long orig_i0,
23 unsigned long thread_info_flags); 23 unsigned long thread_info_flags);
24 24
25extern asmlinkage int syscall_trace(struct pt_regs *regs, int syscall_exit_p); 25extern asmlinkage int syscall_trace_enter(struct pt_regs *regs);
26extern asmlinkage void syscall_trace_leave(struct pt_regs *regs);
26 27
27extern void bad_trap_tl1(struct pt_regs *regs, long lvl); 28extern void bad_trap_tl1(struct pt_regs *regs, long lvl);
28 29
diff --git a/arch/sparc64/kernel/head.S b/arch/sparc64/kernel/head.S
index c9afef093d51..353226fa0239 100644
--- a/arch/sparc64/kernel/head.S
+++ b/arch/sparc64/kernel/head.S
@@ -10,6 +10,7 @@
10#include <linux/errno.h> 10#include <linux/errno.h>
11#include <linux/threads.h> 11#include <linux/threads.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/linkage.h>
13#include <asm/thread_info.h> 14#include <asm/thread_info.h>
14#include <asm/asi.h> 15#include <asm/asi.h>
15#include <asm/pstate.h> 16#include <asm/pstate.h>
diff --git a/arch/sparc64/kernel/hvapi.c b/arch/sparc64/kernel/hvapi.c
index 691760b5b012..1d272c3b5740 100644
--- a/arch/sparc64/kernel/hvapi.c
+++ b/arch/sparc64/kernel/hvapi.c
@@ -9,7 +9,6 @@
9 9
10#include <asm/hypervisor.h> 10#include <asm/hypervisor.h>
11#include <asm/oplib.h> 11#include <asm/oplib.h>
12#include <asm/sstate.h>
13 12
14/* If the hypervisor indicates that the API setting 13/* If the hypervisor indicates that the API setting
15 * calls are unsupported, by returning HV_EBADTRAP or 14 * calls are unsupported, by returning HV_EBADTRAP or
@@ -184,8 +183,6 @@ void __init sun4v_hvapi_init(void)
184 if (sun4v_hvapi_register(group, major, &minor)) 183 if (sun4v_hvapi_register(group, major, &minor))
185 goto bad; 184 goto bad;
186 185
187 sun4v_sstate_init();
188
189 return; 186 return;
190 187
191bad: 188bad:
diff --git a/arch/sparc64/kernel/hvcalls.S b/arch/sparc64/kernel/hvcalls.S
index a2810f3ac70f..e066269d1594 100644
--- a/arch/sparc64/kernel/hvcalls.S
+++ b/arch/sparc64/kernel/hvcalls.S
@@ -3,89 +3,75 @@
3 * 3 *
4 * returns %o0: sysino 4 * returns %o0: sysino
5 */ 5 */
6 .globl sun4v_devino_to_sysino 6ENTRY(sun4v_devino_to_sysino)
7 .type sun4v_devino_to_sysino,#function
8sun4v_devino_to_sysino:
9 mov HV_FAST_INTR_DEVINO2SYSINO, %o5 7 mov HV_FAST_INTR_DEVINO2SYSINO, %o5
10 ta HV_FAST_TRAP 8 ta HV_FAST_TRAP
11 retl 9 retl
12 mov %o1, %o0 10 mov %o1, %o0
13 .size sun4v_devino_to_sysino, .-sun4v_devino_to_sysino 11ENDPROC(sun4v_devino_to_sysino)
14 12
15 /* %o0: sysino 13 /* %o0: sysino
16 * 14 *
17 * returns %o0: intr_enabled (HV_INTR_{DISABLED,ENABLED}) 15 * returns %o0: intr_enabled (HV_INTR_{DISABLED,ENABLED})
18 */ 16 */
19 .globl sun4v_intr_getenabled 17ENTRY(sun4v_intr_getenabled)
20 .type sun4v_intr_getenabled,#function
21sun4v_intr_getenabled:
22 mov HV_FAST_INTR_GETENABLED, %o5 18 mov HV_FAST_INTR_GETENABLED, %o5
23 ta HV_FAST_TRAP 19 ta HV_FAST_TRAP
24 retl 20 retl
25 mov %o1, %o0 21 mov %o1, %o0
26 .size sun4v_intr_getenabled, .-sun4v_intr_getenabled 22ENDPROC(sun4v_intr_getenabled)
27 23
28 /* %o0: sysino 24 /* %o0: sysino
29 * %o1: intr_enabled (HV_INTR_{DISABLED,ENABLED}) 25 * %o1: intr_enabled (HV_INTR_{DISABLED,ENABLED})
30 */ 26 */
31 .globl sun4v_intr_setenabled 27ENTRY(sun4v_intr_setenabled)
32 .type sun4v_intr_setenabled,#function
33sun4v_intr_setenabled:
34 mov HV_FAST_INTR_SETENABLED, %o5 28 mov HV_FAST_INTR_SETENABLED, %o5
35 ta HV_FAST_TRAP 29 ta HV_FAST_TRAP
36 retl 30 retl
37 nop 31 nop
38 .size sun4v_intr_setenabled, .-sun4v_intr_setenabled 32ENDPROC(sun4v_intr_setenabled)
39 33
40 /* %o0: sysino 34 /* %o0: sysino
41 * 35 *
42 * returns %o0: intr_state (HV_INTR_STATE_*) 36 * returns %o0: intr_state (HV_INTR_STATE_*)
43 */ 37 */
44 .globl sun4v_intr_getstate 38ENTRY(sun4v_intr_getstate)
45 .type sun4v_intr_getstate,#function
46sun4v_intr_getstate:
47 mov HV_FAST_INTR_GETSTATE, %o5 39 mov HV_FAST_INTR_GETSTATE, %o5
48 ta HV_FAST_TRAP 40 ta HV_FAST_TRAP
49 retl 41 retl
50 mov %o1, %o0 42 mov %o1, %o0
51 .size sun4v_intr_getstate, .-sun4v_intr_getstate 43ENDPROC(sun4v_intr_getstate)
52 44
53 /* %o0: sysino 45 /* %o0: sysino
54 * %o1: intr_state (HV_INTR_STATE_*) 46 * %o1: intr_state (HV_INTR_STATE_*)
55 */ 47 */
56 .globl sun4v_intr_setstate 48ENTRY(sun4v_intr_setstate)
57 .type sun4v_intr_setstate,#function
58sun4v_intr_setstate:
59 mov HV_FAST_INTR_SETSTATE, %o5 49 mov HV_FAST_INTR_SETSTATE, %o5
60 ta HV_FAST_TRAP 50 ta HV_FAST_TRAP
61 retl 51 retl
62 nop 52 nop
63 .size sun4v_intr_setstate, .-sun4v_intr_setstate 53ENDPROC(sun4v_intr_setstate)
64 54
65 /* %o0: sysino 55 /* %o0: sysino
66 * 56 *
67 * returns %o0: cpuid 57 * returns %o0: cpuid
68 */ 58 */
69 .globl sun4v_intr_gettarget 59ENTRY(sun4v_intr_gettarget)
70 .type sun4v_intr_gettarget,#function
71sun4v_intr_gettarget:
72 mov HV_FAST_INTR_GETTARGET, %o5 60 mov HV_FAST_INTR_GETTARGET, %o5
73 ta HV_FAST_TRAP 61 ta HV_FAST_TRAP
74 retl 62 retl
75 mov %o1, %o0 63 mov %o1, %o0
76 .size sun4v_intr_gettarget, .-sun4v_intr_gettarget 64ENDPROC(sun4v_intr_gettarget)
77 65
78 /* %o0: sysino 66 /* %o0: sysino
79 * %o1: cpuid 67 * %o1: cpuid
80 */ 68 */
81 .globl sun4v_intr_settarget 69ENTRY(sun4v_intr_settarget)
82 .type sun4v_intr_settarget,#function
83sun4v_intr_settarget:
84 mov HV_FAST_INTR_SETTARGET, %o5 70 mov HV_FAST_INTR_SETTARGET, %o5
85 ta HV_FAST_TRAP 71 ta HV_FAST_TRAP
86 retl 72 retl
87 nop 73 nop
88 .size sun4v_intr_settarget, .-sun4v_intr_settarget 74ENDPROC(sun4v_intr_settarget)
89 75
90 /* %o0: cpuid 76 /* %o0: cpuid
91 * %o1: pc 77 * %o1: pc
@@ -94,37 +80,31 @@ sun4v_intr_settarget:
94 * 80 *
95 * returns %o0: status 81 * returns %o0: status
96 */ 82 */
97 .globl sun4v_cpu_start 83ENTRY(sun4v_cpu_start)
98 .type sun4v_cpu_start,#function
99sun4v_cpu_start:
100 mov HV_FAST_CPU_START, %o5 84 mov HV_FAST_CPU_START, %o5
101 ta HV_FAST_TRAP 85 ta HV_FAST_TRAP
102 retl 86 retl
103 nop 87 nop
104 .size sun4v_cpu_start, .-sun4v_cpu_start 88ENDPROC(sun4v_cpu_start)
105 89
106 /* %o0: cpuid 90 /* %o0: cpuid
107 * 91 *
108 * returns %o0: status 92 * returns %o0: status
109 */ 93 */
110 .globl sun4v_cpu_stop 94ENTRY(sun4v_cpu_stop)
111 .type sun4v_cpu_stop,#function
112sun4v_cpu_stop:
113 mov HV_FAST_CPU_STOP, %o5 95 mov HV_FAST_CPU_STOP, %o5
114 ta HV_FAST_TRAP 96 ta HV_FAST_TRAP
115 retl 97 retl
116 nop 98 nop
117 .size sun4v_cpu_stop, .-sun4v_cpu_stop 99ENDPROC(sun4v_cpu_stop)
118 100
119 /* returns %o0: status */ 101 /* returns %o0: status */
120 .globl sun4v_cpu_yield 102ENTRY(sun4v_cpu_yield)
121 .type sun4v_cpu_yield, #function
122sun4v_cpu_yield:
123 mov HV_FAST_CPU_YIELD, %o5 103 mov HV_FAST_CPU_YIELD, %o5
124 ta HV_FAST_TRAP 104 ta HV_FAST_TRAP
125 retl 105 retl
126 nop 106 nop
127 .size sun4v_cpu_yield, .-sun4v_cpu_yield 107ENDPROC(sun4v_cpu_yield)
128 108
129 /* %o0: type 109 /* %o0: type
130 * %o1: queue paddr 110 * %o1: queue paddr
@@ -132,14 +112,12 @@ sun4v_cpu_yield:
132 * 112 *
133 * returns %o0: status 113 * returns %o0: status
134 */ 114 */
135 .globl sun4v_cpu_qconf 115ENTRY(sun4v_cpu_qconf)
136 .type sun4v_cpu_qconf,#function
137sun4v_cpu_qconf:
138 mov HV_FAST_CPU_QCONF, %o5 116 mov HV_FAST_CPU_QCONF, %o5
139 ta HV_FAST_TRAP 117 ta HV_FAST_TRAP
140 retl 118 retl
141 nop 119 nop
142 .size sun4v_cpu_qconf, .-sun4v_cpu_qconf 120ENDPROC(sun4v_cpu_qconf)
143 121
144 /* %o0: num cpus in cpu list 122 /* %o0: num cpus in cpu list
145 * %o1: cpu list paddr 123 * %o1: cpu list paddr
@@ -147,23 +125,19 @@ sun4v_cpu_qconf:
147 * 125 *
148 * returns %o0: status 126 * returns %o0: status
149 */ 127 */
150 .globl sun4v_cpu_mondo_send 128ENTRY(sun4v_cpu_mondo_send)
151 .type sun4v_cpu_mondo_send,#function
152sun4v_cpu_mondo_send:
153 mov HV_FAST_CPU_MONDO_SEND, %o5 129 mov HV_FAST_CPU_MONDO_SEND, %o5
154 ta HV_FAST_TRAP 130 ta HV_FAST_TRAP
155 retl 131 retl
156 nop 132 nop
157 .size sun4v_cpu_mondo_send, .-sun4v_cpu_mondo_send 133ENDPROC(sun4v_cpu_mondo_send)
158 134
159 /* %o0: CPU ID 135 /* %o0: CPU ID
160 * 136 *
161 * returns %o0: -status if status non-zero, else 137 * returns %o0: -status if status non-zero, else
162 * %o0: cpu state as HV_CPU_STATE_* 138 * %o0: cpu state as HV_CPU_STATE_*
163 */ 139 */
164 .globl sun4v_cpu_state 140ENTRY(sun4v_cpu_state)
165 .type sun4v_cpu_state,#function
166sun4v_cpu_state:
167 mov HV_FAST_CPU_STATE, %o5 141 mov HV_FAST_CPU_STATE, %o5
168 ta HV_FAST_TRAP 142 ta HV_FAST_TRAP
169 brnz,pn %o0, 1f 143 brnz,pn %o0, 1f
@@ -171,7 +145,7 @@ sun4v_cpu_state:
171 mov %o1, %o0 145 mov %o1, %o0
1721: retl 1461: retl
173 nop 147 nop
174 .size sun4v_cpu_state, .-sun4v_cpu_state 148ENDPROC(sun4v_cpu_state)
175 149
176 /* %o0: virtual address 150 /* %o0: virtual address
177 * %o1: must be zero 151 * %o1: must be zero
@@ -180,28 +154,24 @@ sun4v_cpu_state:
180 * 154 *
181 * returns %o0: status 155 * returns %o0: status
182 */ 156 */
183 .globl sun4v_mmu_map_perm_addr 157ENTRY(sun4v_mmu_map_perm_addr)
184 .type sun4v_mmu_map_perm_addr,#function
185sun4v_mmu_map_perm_addr:
186 mov HV_FAST_MMU_MAP_PERM_ADDR, %o5 158 mov HV_FAST_MMU_MAP_PERM_ADDR, %o5
187 ta HV_FAST_TRAP 159 ta HV_FAST_TRAP
188 retl 160 retl
189 nop 161 nop
190 .size sun4v_mmu_map_perm_addr, .-sun4v_mmu_map_perm_addr 162ENDPROC(sun4v_mmu_map_perm_addr)
191 163
192 /* %o0: number of TSB descriptions 164 /* %o0: number of TSB descriptions
193 * %o1: TSB descriptions real address 165 * %o1: TSB descriptions real address
194 * 166 *
195 * returns %o0: status 167 * returns %o0: status
196 */ 168 */
197 .globl sun4v_mmu_tsb_ctx0 169ENTRY(sun4v_mmu_tsb_ctx0)
198 .type sun4v_mmu_tsb_ctx0,#function
199sun4v_mmu_tsb_ctx0:
200 mov HV_FAST_MMU_TSB_CTX0, %o5 170 mov HV_FAST_MMU_TSB_CTX0, %o5
201 ta HV_FAST_TRAP 171 ta HV_FAST_TRAP
202 retl 172 retl
203 nop 173 nop
204 .size sun4v_mmu_tsb_ctx0, .-sun4v_mmu_tsb_ctx0 174ENDPROC(sun4v_mmu_tsb_ctx0)
205 175
206 /* %o0: API group number 176 /* %o0: API group number
207 * %o1: pointer to unsigned long major number storage 177 * %o1: pointer to unsigned long major number storage
@@ -209,9 +179,7 @@ sun4v_mmu_tsb_ctx0:
209 * 179 *
210 * returns %o0: status 180 * returns %o0: status
211 */ 181 */
212 .globl sun4v_get_version 182ENTRY(sun4v_get_version)
213 .type sun4v_get_version,#function
214sun4v_get_version:
215 mov HV_CORE_GET_VER, %o5 183 mov HV_CORE_GET_VER, %o5
216 mov %o1, %o3 184 mov %o1, %o3
217 mov %o2, %o4 185 mov %o2, %o4
@@ -219,7 +187,7 @@ sun4v_get_version:
219 stx %o1, [%o3] 187 stx %o1, [%o3]
220 retl 188 retl
221 stx %o2, [%o4] 189 stx %o2, [%o4]
222 .size sun4v_get_version, .-sun4v_get_version 190ENDPROC(sun4v_get_version)
223 191
224 /* %o0: API group number 192 /* %o0: API group number
225 * %o1: desired major number 193 * %o1: desired major number
@@ -228,51 +196,43 @@ sun4v_get_version:
228 * 196 *
229 * returns %o0: status 197 * returns %o0: status
230 */ 198 */
231 .globl sun4v_set_version 199ENTRY(sun4v_set_version)
232 .type sun4v_set_version,#function
233sun4v_set_version:
234 mov HV_CORE_SET_VER, %o5 200 mov HV_CORE_SET_VER, %o5
235 mov %o3, %o4 201 mov %o3, %o4
236 ta HV_CORE_TRAP 202 ta HV_CORE_TRAP
237 retl 203 retl
238 stx %o1, [%o4] 204 stx %o1, [%o4]
239 .size sun4v_set_version, .-sun4v_set_version 205ENDPROC(sun4v_set_version)
240 206
241 /* %o0: pointer to unsigned long time 207 /* %o0: pointer to unsigned long time
242 * 208 *
243 * returns %o0: status 209 * returns %o0: status
244 */ 210 */
245 .globl sun4v_tod_get 211ENTRY(sun4v_tod_get)
246 .type sun4v_tod_get,#function
247sun4v_tod_get:
248 mov %o0, %o4 212 mov %o0, %o4
249 mov HV_FAST_TOD_GET, %o5 213 mov HV_FAST_TOD_GET, %o5
250 ta HV_FAST_TRAP 214 ta HV_FAST_TRAP
251 stx %o1, [%o4] 215 stx %o1, [%o4]
252 retl 216 retl
253 nop 217 nop
254 .size sun4v_tod_get, .-sun4v_tod_get 218ENDPROC(sun4v_tod_get)
255 219
256 /* %o0: time 220 /* %o0: time
257 * 221 *
258 * returns %o0: status 222 * returns %o0: status
259 */ 223 */
260 .globl sun4v_tod_set 224ENTRY(sun4v_tod_set)
261 .type sun4v_tod_set,#function
262sun4v_tod_set:
263 mov HV_FAST_TOD_SET, %o5 225 mov HV_FAST_TOD_SET, %o5
264 ta HV_FAST_TRAP 226 ta HV_FAST_TRAP
265 retl 227 retl
266 nop 228 nop
267 .size sun4v_tod_set, .-sun4v_tod_set 229ENDPROC(sun4v_tod_set)
268 230
269 /* %o0: pointer to unsigned long status 231 /* %o0: pointer to unsigned long status
270 * 232 *
271 * returns %o0: signed character 233 * returns %o0: signed character
272 */ 234 */
273 .globl sun4v_con_getchar 235ENTRY(sun4v_con_getchar)
274 .type sun4v_con_getchar,#function
275sun4v_con_getchar:
276 mov %o0, %o4 236 mov %o0, %o4
277 mov HV_FAST_CONS_GETCHAR, %o5 237 mov HV_FAST_CONS_GETCHAR, %o5
278 clr %o0 238 clr %o0
@@ -281,20 +241,18 @@ sun4v_con_getchar:
281 stx %o0, [%o4] 241 stx %o0, [%o4]
282 retl 242 retl
283 sra %o1, 0, %o0 243 sra %o1, 0, %o0
284 .size sun4v_con_getchar, .-sun4v_con_getchar 244ENDPROC(sun4v_con_getchar)
285 245
286 /* %o0: signed long character 246 /* %o0: signed long character
287 * 247 *
288 * returns %o0: status 248 * returns %o0: status
289 */ 249 */
290 .globl sun4v_con_putchar 250ENTRY(sun4v_con_putchar)
291 .type sun4v_con_putchar,#function
292sun4v_con_putchar:
293 mov HV_FAST_CONS_PUTCHAR, %o5 251 mov HV_FAST_CONS_PUTCHAR, %o5
294 ta HV_FAST_TRAP 252 ta HV_FAST_TRAP
295 retl 253 retl
296 sra %o0, 0, %o0 254 sra %o0, 0, %o0
297 .size sun4v_con_putchar, .-sun4v_con_putchar 255ENDPROC(sun4v_con_putchar)
298 256
299 /* %o0: buffer real address 257 /* %o0: buffer real address
300 * %o1: buffer size 258 * %o1: buffer size
@@ -302,9 +260,7 @@ sun4v_con_putchar:
302 * 260 *
303 * returns %o0: status 261 * returns %o0: status
304 */ 262 */
305 .globl sun4v_con_read 263ENTRY(sun4v_con_read)
306 .type sun4v_con_read,#function
307sun4v_con_read:
308 mov %o2, %o4 264 mov %o2, %o4
309 mov HV_FAST_CONS_READ, %o5 265 mov HV_FAST_CONS_READ, %o5
310 ta HV_FAST_TRAP 266 ta HV_FAST_TRAP
@@ -318,7 +274,7 @@ sun4v_con_read:
318 stx %o1, [%o4] 274 stx %o1, [%o4]
3191: retl 2751: retl
320 nop 276 nop
321 .size sun4v_con_read, .-sun4v_con_read 277ENDPROC(sun4v_con_read)
322 278
323 /* %o0: buffer real address 279 /* %o0: buffer real address
324 * %o1: buffer size 280 * %o1: buffer size
@@ -326,43 +282,37 @@ sun4v_con_read:
326 * 282 *
327 * returns %o0: status 283 * returns %o0: status
328 */ 284 */
329 .globl sun4v_con_write 285ENTRY(sun4v_con_write)
330 .type sun4v_con_write,#function
331sun4v_con_write:
332 mov %o2, %o4 286 mov %o2, %o4
333 mov HV_FAST_CONS_WRITE, %o5 287 mov HV_FAST_CONS_WRITE, %o5
334 ta HV_FAST_TRAP 288 ta HV_FAST_TRAP
335 stx %o1, [%o4] 289 stx %o1, [%o4]
336 retl 290 retl
337 nop 291 nop
338 .size sun4v_con_write, .-sun4v_con_write 292ENDPROC(sun4v_con_write)
339 293
340 /* %o0: soft state 294 /* %o0: soft state
341 * %o1: address of description string 295 * %o1: address of description string
342 * 296 *
343 * returns %o0: status 297 * returns %o0: status
344 */ 298 */
345 .globl sun4v_mach_set_soft_state 299ENTRY(sun4v_mach_set_soft_state)
346 .type sun4v_mach_set_soft_state,#function
347sun4v_mach_set_soft_state:
348 mov HV_FAST_MACH_SET_SOFT_STATE, %o5 300 mov HV_FAST_MACH_SET_SOFT_STATE, %o5
349 ta HV_FAST_TRAP 301 ta HV_FAST_TRAP
350 retl 302 retl
351 nop 303 nop
352 .size sun4v_mach_set_soft_state, .-sun4v_mach_set_soft_state 304ENDPROC(sun4v_mach_set_soft_state)
353 305
354 /* %o0: exit code 306 /* %o0: exit code
355 * 307 *
356 * Does not return. 308 * Does not return.
357 */ 309 */
358 .globl sun4v_mach_exit 310ENTRY(sun4v_mach_exit)
359 .type sun4v_mach_exit,#function
360sun4v_mach_exit:
361 mov HV_FAST_MACH_EXIT, %o5 311 mov HV_FAST_MACH_EXIT, %o5
362 ta HV_FAST_TRAP 312 ta HV_FAST_TRAP
363 retl 313 retl
364 nop 314 nop
365 .size sun4v_mach_exit, .-sun4v_mach_exit 315ENDPROC(sun4v_mach_exit)
366 316
367 /* %o0: buffer real address 317 /* %o0: buffer real address
368 * %o1: buffer length 318 * %o1: buffer length
@@ -370,44 +320,38 @@ sun4v_mach_exit:
370 * 320 *
371 * returns %o0: status 321 * returns %o0: status
372 */ 322 */
373 .globl sun4v_mach_desc 323ENTRY(sun4v_mach_desc)
374 .type sun4v_mach_desc,#function
375sun4v_mach_desc:
376 mov %o2, %o4 324 mov %o2, %o4
377 mov HV_FAST_MACH_DESC, %o5 325 mov HV_FAST_MACH_DESC, %o5
378 ta HV_FAST_TRAP 326 ta HV_FAST_TRAP
379 stx %o1, [%o4] 327 stx %o1, [%o4]
380 retl 328 retl
381 nop 329 nop
382 .size sun4v_mach_desc, .-sun4v_mach_desc 330ENDPROC(sun4v_mach_desc)
383 331
384 /* %o0: new timeout in milliseconds 332 /* %o0: new timeout in milliseconds
385 * %o1: pointer to unsigned long orig_timeout 333 * %o1: pointer to unsigned long orig_timeout
386 * 334 *
387 * returns %o0: status 335 * returns %o0: status
388 */ 336 */
389 .globl sun4v_mach_set_watchdog 337ENTRY(sun4v_mach_set_watchdog)
390 .type sun4v_mach_set_watchdog,#function
391sun4v_mach_set_watchdog:
392 mov %o1, %o4 338 mov %o1, %o4
393 mov HV_FAST_MACH_SET_WATCHDOG, %o5 339 mov HV_FAST_MACH_SET_WATCHDOG, %o5
394 ta HV_FAST_TRAP 340 ta HV_FAST_TRAP
395 stx %o1, [%o4] 341 stx %o1, [%o4]
396 retl 342 retl
397 nop 343 nop
398 .size sun4v_mach_set_watchdog, .-sun4v_mach_set_watchdog 344ENDPROC(sun4v_mach_set_watchdog)
399 345
400 /* No inputs and does not return. */ 346 /* No inputs and does not return. */
401 .globl sun4v_mach_sir 347ENTRY(sun4v_mach_sir)
402 .type sun4v_mach_sir,#function
403sun4v_mach_sir:
404 mov %o1, %o4 348 mov %o1, %o4
405 mov HV_FAST_MACH_SIR, %o5 349 mov HV_FAST_MACH_SIR, %o5
406 ta HV_FAST_TRAP 350 ta HV_FAST_TRAP
407 stx %o1, [%o4] 351 stx %o1, [%o4]
408 retl 352 retl
409 nop 353 nop
410 .size sun4v_mach_sir, .-sun4v_mach_sir 354ENDPROC(sun4v_mach_sir)
411 355
412 /* %o0: channel 356 /* %o0: channel
413 * %o1: ra 357 * %o1: ra
@@ -415,14 +359,12 @@ sun4v_mach_sir:
415 * 359 *
416 * returns %o0: status 360 * returns %o0: status
417 */ 361 */
418 .globl sun4v_ldc_tx_qconf 362ENTRY(sun4v_ldc_tx_qconf)
419 .type sun4v_ldc_tx_qconf,#function
420sun4v_ldc_tx_qconf:
421 mov HV_FAST_LDC_TX_QCONF, %o5 363 mov HV_FAST_LDC_TX_QCONF, %o5
422 ta HV_FAST_TRAP 364 ta HV_FAST_TRAP
423 retl 365 retl
424 nop 366 nop
425 .size sun4v_ldc_tx_qconf, .-sun4v_ldc_tx_qconf 367ENDPROC(sun4v_ldc_tx_qconf)
426 368
427 /* %o0: channel 369 /* %o0: channel
428 * %o1: pointer to unsigned long ra 370 * %o1: pointer to unsigned long ra
@@ -430,9 +372,7 @@ sun4v_ldc_tx_qconf:
430 * 372 *
431 * returns %o0: status 373 * returns %o0: status
432 */ 374 */
433 .globl sun4v_ldc_tx_qinfo 375ENTRY(sun4v_ldc_tx_qinfo)
434 .type sun4v_ldc_tx_qinfo,#function
435sun4v_ldc_tx_qinfo:
436 mov %o1, %g1 376 mov %o1, %g1
437 mov %o2, %g2 377 mov %o2, %g2
438 mov HV_FAST_LDC_TX_QINFO, %o5 378 mov HV_FAST_LDC_TX_QINFO, %o5
@@ -441,7 +381,7 @@ sun4v_ldc_tx_qinfo:
441 stx %o2, [%g2] 381 stx %o2, [%g2]
442 retl 382 retl
443 nop 383 nop
444 .size sun4v_ldc_tx_qinfo, .-sun4v_ldc_tx_qinfo 384ENDPROC(sun4v_ldc_tx_qinfo)
445 385
446 /* %o0: channel 386 /* %o0: channel
447 * %o1: pointer to unsigned long head_off 387 * %o1: pointer to unsigned long head_off
@@ -450,9 +390,7 @@ sun4v_ldc_tx_qinfo:
450 * 390 *
451 * returns %o0: status 391 * returns %o0: status
452 */ 392 */
453 .globl sun4v_ldc_tx_get_state 393ENTRY(sun4v_ldc_tx_get_state)
454 .type sun4v_ldc_tx_get_state,#function
455sun4v_ldc_tx_get_state:
456 mov %o1, %g1 394 mov %o1, %g1
457 mov %o2, %g2 395 mov %o2, %g2
458 mov %o3, %g3 396 mov %o3, %g3
@@ -463,21 +401,19 @@ sun4v_ldc_tx_get_state:
463 stx %o3, [%g3] 401 stx %o3, [%g3]
464 retl 402 retl
465 nop 403 nop
466 .size sun4v_ldc_tx_get_state, .-sun4v_ldc_tx_get_state 404ENDPROC(sun4v_ldc_tx_get_state)
467 405
468 /* %o0: channel 406 /* %o0: channel
469 * %o1: tail_off 407 * %o1: tail_off
470 * 408 *
471 * returns %o0: status 409 * returns %o0: status
472 */ 410 */
473 .globl sun4v_ldc_tx_set_qtail 411ENTRY(sun4v_ldc_tx_set_qtail)
474 .type sun4v_ldc_tx_set_qtail,#function
475sun4v_ldc_tx_set_qtail:
476 mov HV_FAST_LDC_TX_SET_QTAIL, %o5 412 mov HV_FAST_LDC_TX_SET_QTAIL, %o5
477 ta HV_FAST_TRAP 413 ta HV_FAST_TRAP
478 retl 414 retl
479 nop 415 nop
480 .size sun4v_ldc_tx_set_qtail, .-sun4v_ldc_tx_set_qtail 416ENDPROC(sun4v_ldc_tx_set_qtail)
481 417
482 /* %o0: channel 418 /* %o0: channel
483 * %o1: ra 419 * %o1: ra
@@ -485,14 +421,12 @@ sun4v_ldc_tx_set_qtail:
485 * 421 *
486 * returns %o0: status 422 * returns %o0: status
487 */ 423 */
488 .globl sun4v_ldc_rx_qconf 424ENTRY(sun4v_ldc_rx_qconf)
489 .type sun4v_ldc_rx_qconf,#function
490sun4v_ldc_rx_qconf:
491 mov HV_FAST_LDC_RX_QCONF, %o5 425 mov HV_FAST_LDC_RX_QCONF, %o5
492 ta HV_FAST_TRAP 426 ta HV_FAST_TRAP
493 retl 427 retl
494 nop 428 nop
495 .size sun4v_ldc_rx_qconf, .-sun4v_ldc_rx_qconf 429ENDPROC(sun4v_ldc_rx_qconf)
496 430
497 /* %o0: channel 431 /* %o0: channel
498 * %o1: pointer to unsigned long ra 432 * %o1: pointer to unsigned long ra
@@ -500,9 +434,7 @@ sun4v_ldc_rx_qconf:
500 * 434 *
501 * returns %o0: status 435 * returns %o0: status
502 */ 436 */
503 .globl sun4v_ldc_rx_qinfo 437ENTRY(sun4v_ldc_rx_qinfo)
504 .type sun4v_ldc_rx_qinfo,#function
505sun4v_ldc_rx_qinfo:
506 mov %o1, %g1 438 mov %o1, %g1
507 mov %o2, %g2 439 mov %o2, %g2
508 mov HV_FAST_LDC_RX_QINFO, %o5 440 mov HV_FAST_LDC_RX_QINFO, %o5
@@ -511,7 +443,7 @@ sun4v_ldc_rx_qinfo:
511 stx %o2, [%g2] 443 stx %o2, [%g2]
512 retl 444 retl
513 nop 445 nop
514 .size sun4v_ldc_rx_qinfo, .-sun4v_ldc_rx_qinfo 446ENDPROC(sun4v_ldc_rx_qinfo)
515 447
516 /* %o0: channel 448 /* %o0: channel
517 * %o1: pointer to unsigned long head_off 449 * %o1: pointer to unsigned long head_off
@@ -520,9 +452,7 @@ sun4v_ldc_rx_qinfo:
520 * 452 *
521 * returns %o0: status 453 * returns %o0: status
522 */ 454 */
523 .globl sun4v_ldc_rx_get_state 455ENTRY(sun4v_ldc_rx_get_state)
524 .type sun4v_ldc_rx_get_state,#function
525sun4v_ldc_rx_get_state:
526 mov %o1, %g1 456 mov %o1, %g1
527 mov %o2, %g2 457 mov %o2, %g2
528 mov %o3, %g3 458 mov %o3, %g3
@@ -533,21 +463,19 @@ sun4v_ldc_rx_get_state:
533 stx %o3, [%g3] 463 stx %o3, [%g3]
534 retl 464 retl
535 nop 465 nop
536 .size sun4v_ldc_rx_get_state, .-sun4v_ldc_rx_get_state 466ENDPROC(sun4v_ldc_rx_get_state)
537 467
538 /* %o0: channel 468 /* %o0: channel
539 * %o1: head_off 469 * %o1: head_off
540 * 470 *
541 * returns %o0: status 471 * returns %o0: status
542 */ 472 */
543 .globl sun4v_ldc_rx_set_qhead 473ENTRY(sun4v_ldc_rx_set_qhead)
544 .type sun4v_ldc_rx_set_qhead,#function
545sun4v_ldc_rx_set_qhead:
546 mov HV_FAST_LDC_RX_SET_QHEAD, %o5 474 mov HV_FAST_LDC_RX_SET_QHEAD, %o5
547 ta HV_FAST_TRAP 475 ta HV_FAST_TRAP
548 retl 476 retl
549 nop 477 nop
550 .size sun4v_ldc_rx_set_qhead, .-sun4v_ldc_rx_set_qhead 478ENDPROC(sun4v_ldc_rx_set_qhead)
551 479
552 /* %o0: channel 480 /* %o0: channel
553 * %o1: ra 481 * %o1: ra
@@ -555,14 +483,12 @@ sun4v_ldc_rx_set_qhead:
555 * 483 *
556 * returns %o0: status 484 * returns %o0: status
557 */ 485 */
558 .globl sun4v_ldc_set_map_table 486ENTRY(sun4v_ldc_set_map_table)
559 .type sun4v_ldc_set_map_table,#function
560sun4v_ldc_set_map_table:
561 mov HV_FAST_LDC_SET_MAP_TABLE, %o5 487 mov HV_FAST_LDC_SET_MAP_TABLE, %o5
562 ta HV_FAST_TRAP 488 ta HV_FAST_TRAP
563 retl 489 retl
564 nop 490 nop
565 .size sun4v_ldc_set_map_table, .-sun4v_ldc_set_map_table 491ENDPROC(sun4v_ldc_set_map_table)
566 492
567 /* %o0: channel 493 /* %o0: channel
568 * %o1: pointer to unsigned long ra 494 * %o1: pointer to unsigned long ra
@@ -570,9 +496,7 @@ sun4v_ldc_set_map_table:
570 * 496 *
571 * returns %o0: status 497 * returns %o0: status
572 */ 498 */
573 .globl sun4v_ldc_get_map_table 499ENTRY(sun4v_ldc_get_map_table)
574 .type sun4v_ldc_get_map_table,#function
575sun4v_ldc_get_map_table:
576 mov %o1, %g1 500 mov %o1, %g1
577 mov %o2, %g2 501 mov %o2, %g2
578 mov HV_FAST_LDC_GET_MAP_TABLE, %o5 502 mov HV_FAST_LDC_GET_MAP_TABLE, %o5
@@ -581,7 +505,7 @@ sun4v_ldc_get_map_table:
581 stx %o2, [%g2] 505 stx %o2, [%g2]
582 retl 506 retl
583 nop 507 nop
584 .size sun4v_ldc_get_map_table, .-sun4v_ldc_get_map_table 508ENDPROC(sun4v_ldc_get_map_table)
585 509
586 /* %o0: channel 510 /* %o0: channel
587 * %o1: dir_code 511 * %o1: dir_code
@@ -592,16 +516,14 @@ sun4v_ldc_get_map_table:
592 * 516 *
593 * returns %o0: status 517 * returns %o0: status
594 */ 518 */
595 .globl sun4v_ldc_copy 519ENTRY(sun4v_ldc_copy)
596 .type sun4v_ldc_copy,#function
597sun4v_ldc_copy:
598 mov %o5, %g1 520 mov %o5, %g1
599 mov HV_FAST_LDC_COPY, %o5 521 mov HV_FAST_LDC_COPY, %o5
600 ta HV_FAST_TRAP 522 ta HV_FAST_TRAP
601 stx %o1, [%g1] 523 stx %o1, [%g1]
602 retl 524 retl
603 nop 525 nop
604 .size sun4v_ldc_copy, .-sun4v_ldc_copy 526ENDPROC(sun4v_ldc_copy)
605 527
606 /* %o0: channel 528 /* %o0: channel
607 * %o1: cookie 529 * %o1: cookie
@@ -610,9 +532,7 @@ sun4v_ldc_copy:
610 * 532 *
611 * returns %o0: status 533 * returns %o0: status
612 */ 534 */
613 .globl sun4v_ldc_mapin 535ENTRY(sun4v_ldc_mapin)
614 .type sun4v_ldc_mapin,#function
615sun4v_ldc_mapin:
616 mov %o2, %g1 536 mov %o2, %g1
617 mov %o3, %g2 537 mov %o3, %g2
618 mov HV_FAST_LDC_MAPIN, %o5 538 mov HV_FAST_LDC_MAPIN, %o5
@@ -621,20 +541,18 @@ sun4v_ldc_mapin:
621 stx %o2, [%g2] 541 stx %o2, [%g2]
622 retl 542 retl
623 nop 543 nop
624 .size sun4v_ldc_mapin, .-sun4v_ldc_mapin 544ENDPROC(sun4v_ldc_mapin)
625 545
626 /* %o0: ra 546 /* %o0: ra
627 * 547 *
628 * returns %o0: status 548 * returns %o0: status
629 */ 549 */
630 .globl sun4v_ldc_unmap 550ENTRY(sun4v_ldc_unmap)
631 .type sun4v_ldc_unmap,#function
632sun4v_ldc_unmap:
633 mov HV_FAST_LDC_UNMAP, %o5 551 mov HV_FAST_LDC_UNMAP, %o5
634 ta HV_FAST_TRAP 552 ta HV_FAST_TRAP
635 retl 553 retl
636 nop 554 nop
637 .size sun4v_ldc_unmap, .-sun4v_ldc_unmap 555ENDPROC(sun4v_ldc_unmap)
638 556
639 /* %o0: channel 557 /* %o0: channel
640 * %o1: cookie 558 * %o1: cookie
@@ -642,14 +560,12 @@ sun4v_ldc_unmap:
642 * 560 *
643 * returns %o0: status 561 * returns %o0: status
644 */ 562 */
645 .globl sun4v_ldc_revoke 563ENTRY(sun4v_ldc_revoke)
646 .type sun4v_ldc_revoke,#function
647sun4v_ldc_revoke:
648 mov HV_FAST_LDC_REVOKE, %o5 564 mov HV_FAST_LDC_REVOKE, %o5
649 ta HV_FAST_TRAP 565 ta HV_FAST_TRAP
650 retl 566 retl
651 nop 567 nop
652 .size sun4v_ldc_revoke, .-sun4v_ldc_revoke 568ENDPROC(sun4v_ldc_revoke)
653 569
654 /* %o0: device handle 570 /* %o0: device handle
655 * %o1: device INO 571 * %o1: device INO
@@ -657,16 +573,14 @@ sun4v_ldc_revoke:
657 * 573 *
658 * returns %o0: status 574 * returns %o0: status
659 */ 575 */
660 .globl sun4v_vintr_get_cookie 576ENTRY(sun4v_vintr_get_cookie)
661 .type sun4v_vintr_get_cookie,#function
662sun4v_vintr_get_cookie:
663 mov %o2, %g1 577 mov %o2, %g1
664 mov HV_FAST_VINTR_GET_COOKIE, %o5 578 mov HV_FAST_VINTR_GET_COOKIE, %o5
665 ta HV_FAST_TRAP 579 ta HV_FAST_TRAP
666 stx %o1, [%g1] 580 stx %o1, [%g1]
667 retl 581 retl
668 nop 582 nop
669 .size sun4v_vintr_get_cookie, .-sun4v_vintr_get_cookie 583ENDPROC(sun4v_vintr_get_cookie)
670 584
671 /* %o0: device handle 585 /* %o0: device handle
672 * %o1: device INO 586 * %o1: device INO
@@ -674,14 +588,12 @@ sun4v_vintr_get_cookie:
674 * 588 *
675 * returns %o0: status 589 * returns %o0: status
676 */ 590 */
677 .globl sun4v_vintr_set_cookie 591ENTRY(sun4v_vintr_set_cookie)
678 .type sun4v_vintr_set_cookie,#function
679sun4v_vintr_set_cookie:
680 mov HV_FAST_VINTR_SET_COOKIE, %o5 592 mov HV_FAST_VINTR_SET_COOKIE, %o5
681 ta HV_FAST_TRAP 593 ta HV_FAST_TRAP
682 retl 594 retl
683 nop 595 nop
684 .size sun4v_vintr_set_cookie, .-sun4v_vintr_set_cookie 596ENDPROC(sun4v_vintr_set_cookie)
685 597
686 /* %o0: device handle 598 /* %o0: device handle
687 * %o1: device INO 599 * %o1: device INO
@@ -689,16 +601,14 @@ sun4v_vintr_set_cookie:
689 * 601 *
690 * returns %o0: status 602 * returns %o0: status
691 */ 603 */
692 .globl sun4v_vintr_get_valid 604ENTRY(sun4v_vintr_get_valid)
693 .type sun4v_vintr_get_valid,#function
694sun4v_vintr_get_valid:
695 mov %o2, %g1 605 mov %o2, %g1
696 mov HV_FAST_VINTR_GET_VALID, %o5 606 mov HV_FAST_VINTR_GET_VALID, %o5
697 ta HV_FAST_TRAP 607 ta HV_FAST_TRAP
698 stx %o1, [%g1] 608 stx %o1, [%g1]
699 retl 609 retl
700 nop 610 nop
701 .size sun4v_vintr_get_valid, .-sun4v_vintr_get_valid 611ENDPROC(sun4v_vintr_get_valid)
702 612
703 /* %o0: device handle 613 /* %o0: device handle
704 * %o1: device INO 614 * %o1: device INO
@@ -706,14 +616,12 @@ sun4v_vintr_get_valid:
706 * 616 *
707 * returns %o0: status 617 * returns %o0: status
708 */ 618 */
709 .globl sun4v_vintr_set_valid 619ENTRY(sun4v_vintr_set_valid)
710 .type sun4v_vintr_set_valid,#function
711sun4v_vintr_set_valid:
712 mov HV_FAST_VINTR_SET_VALID, %o5 620 mov HV_FAST_VINTR_SET_VALID, %o5
713 ta HV_FAST_TRAP 621 ta HV_FAST_TRAP
714 retl 622 retl
715 nop 623 nop
716 .size sun4v_vintr_set_valid, .-sun4v_vintr_set_valid 624ENDPROC(sun4v_vintr_set_valid)
717 625
718 /* %o0: device handle 626 /* %o0: device handle
719 * %o1: device INO 627 * %o1: device INO
@@ -721,16 +629,14 @@ sun4v_vintr_set_valid:
721 * 629 *
722 * returns %o0: status 630 * returns %o0: status
723 */ 631 */
724 .globl sun4v_vintr_get_state 632ENTRY(sun4v_vintr_get_state)
725 .type sun4v_vintr_get_state,#function
726sun4v_vintr_get_state:
727 mov %o2, %g1 633 mov %o2, %g1
728 mov HV_FAST_VINTR_GET_STATE, %o5 634 mov HV_FAST_VINTR_GET_STATE, %o5
729 ta HV_FAST_TRAP 635 ta HV_FAST_TRAP
730 stx %o1, [%g1] 636 stx %o1, [%g1]
731 retl 637 retl
732 nop 638 nop
733 .size sun4v_vintr_get_state, .-sun4v_vintr_get_state 639ENDPROC(sun4v_vintr_get_state)
734 640
735 /* %o0: device handle 641 /* %o0: device handle
736 * %o1: device INO 642 * %o1: device INO
@@ -738,14 +644,12 @@ sun4v_vintr_get_state:
738 * 644 *
739 * returns %o0: status 645 * returns %o0: status
740 */ 646 */
741 .globl sun4v_vintr_set_state 647ENTRY(sun4v_vintr_set_state)
742 .type sun4v_vintr_set_state,#function
743sun4v_vintr_set_state:
744 mov HV_FAST_VINTR_SET_STATE, %o5 648 mov HV_FAST_VINTR_SET_STATE, %o5
745 ta HV_FAST_TRAP 649 ta HV_FAST_TRAP
746 retl 650 retl
747 nop 651 nop
748 .size sun4v_vintr_set_state, .-sun4v_vintr_set_state 652ENDPROC(sun4v_vintr_set_state)
749 653
750 /* %o0: device handle 654 /* %o0: device handle
751 * %o1: device INO 655 * %o1: device INO
@@ -753,16 +657,14 @@ sun4v_vintr_set_state:
753 * 657 *
754 * returns %o0: status 658 * returns %o0: status
755 */ 659 */
756 .globl sun4v_vintr_get_target 660ENTRY(sun4v_vintr_get_target)
757 .type sun4v_vintr_get_target,#function
758sun4v_vintr_get_target:
759 mov %o2, %g1 661 mov %o2, %g1
760 mov HV_FAST_VINTR_GET_TARGET, %o5 662 mov HV_FAST_VINTR_GET_TARGET, %o5
761 ta HV_FAST_TRAP 663 ta HV_FAST_TRAP
762 stx %o1, [%g1] 664 stx %o1, [%g1]
763 retl 665 retl
764 nop 666 nop
765 .size sun4v_vintr_get_target, .-sun4v_vintr_get_target 667ENDPROC(sun4v_vintr_get_target)
766 668
767 /* %o0: device handle 669 /* %o0: device handle
768 * %o1: device INO 670 * %o1: device INO
@@ -770,14 +672,12 @@ sun4v_vintr_get_target:
770 * 672 *
771 * returns %o0: status 673 * returns %o0: status
772 */ 674 */
773 .globl sun4v_vintr_set_target 675ENTRY(sun4v_vintr_set_target)
774 .type sun4v_vintr_set_target,#function
775sun4v_vintr_set_target:
776 mov HV_FAST_VINTR_SET_TARGET, %o5 676 mov HV_FAST_VINTR_SET_TARGET, %o5
777 ta HV_FAST_TRAP 677 ta HV_FAST_TRAP
778 retl 678 retl
779 nop 679 nop
780 .size sun4v_vintr_set_target, .-sun4v_vintr_set_target 680ENDPROC(sun4v_vintr_set_target)
781 681
782 /* %o0: NCS sub-function 682 /* %o0: NCS sub-function
783 * %o1: sub-function arg real-address 683 * %o1: sub-function arg real-address
@@ -785,18 +685,14 @@ sun4v_vintr_set_target:
785 * 685 *
786 * returns %o0: status 686 * returns %o0: status
787 */ 687 */
788 .globl sun4v_ncs_request 688ENTRY(sun4v_ncs_request)
789 .type sun4v_ncs_request,#function
790sun4v_ncs_request:
791 mov HV_FAST_NCS_REQUEST, %o5 689 mov HV_FAST_NCS_REQUEST, %o5
792 ta HV_FAST_TRAP 690 ta HV_FAST_TRAP
793 retl 691 retl
794 nop 692 nop
795 .size sun4v_ncs_request, .-sun4v_ncs_request 693ENDPROC(sun4v_ncs_request)
796 694
797 .globl sun4v_svc_send 695ENTRY(sun4v_svc_send)
798 .type sun4v_svc_send,#function
799sun4v_svc_send:
800 save %sp, -192, %sp 696 save %sp, -192, %sp
801 mov %i0, %o0 697 mov %i0, %o0
802 mov %i1, %o1 698 mov %i1, %o1
@@ -806,11 +702,9 @@ sun4v_svc_send:
806 stx %o1, [%i3] 702 stx %o1, [%i3]
807 ret 703 ret
808 restore 704 restore
809 .size sun4v_svc_send, .-sun4v_svc_send 705ENDPROC(sun4v_svc_send)
810 706
811 .globl sun4v_svc_recv 707ENTRY(sun4v_svc_recv)
812 .type sun4v_svc_recv,#function
813sun4v_svc_recv:
814 save %sp, -192, %sp 708 save %sp, -192, %sp
815 mov %i0, %o0 709 mov %i0, %o0
816 mov %i1, %o1 710 mov %i1, %o1
@@ -820,62 +714,50 @@ sun4v_svc_recv:
820 stx %o1, [%i3] 714 stx %o1, [%i3]
821 ret 715 ret
822 restore 716 restore
823 .size sun4v_svc_recv, .-sun4v_svc_recv 717ENDPROC(sun4v_svc_recv)
824 718
825 .globl sun4v_svc_getstatus 719ENTRY(sun4v_svc_getstatus)
826 .type sun4v_svc_getstatus,#function
827sun4v_svc_getstatus:
828 mov HV_FAST_SVC_GETSTATUS, %o5 720 mov HV_FAST_SVC_GETSTATUS, %o5
829 mov %o1, %o4 721 mov %o1, %o4
830 ta HV_FAST_TRAP 722 ta HV_FAST_TRAP
831 stx %o1, [%o4] 723 stx %o1, [%o4]
832 retl 724 retl
833 nop 725 nop
834 .size sun4v_svc_getstatus, .-sun4v_svc_getstatus 726ENDPROC(sun4v_svc_getstatus)
835 727
836 .globl sun4v_svc_setstatus 728ENTRY(sun4v_svc_setstatus)
837 .type sun4v_svc_setstatus,#function
838sun4v_svc_setstatus:
839 mov HV_FAST_SVC_SETSTATUS, %o5 729 mov HV_FAST_SVC_SETSTATUS, %o5
840 ta HV_FAST_TRAP 730 ta HV_FAST_TRAP
841 retl 731 retl
842 nop 732 nop
843 .size sun4v_svc_setstatus, .-sun4v_svc_setstatus 733ENDPROC(sun4v_svc_setstatus)
844 734
845 .globl sun4v_svc_clrstatus 735ENTRY(sun4v_svc_clrstatus)
846 .type sun4v_svc_clrstatus,#function
847sun4v_svc_clrstatus:
848 mov HV_FAST_SVC_CLRSTATUS, %o5 736 mov HV_FAST_SVC_CLRSTATUS, %o5
849 ta HV_FAST_TRAP 737 ta HV_FAST_TRAP
850 retl 738 retl
851 nop 739 nop
852 .size sun4v_svc_clrstatus, .-sun4v_svc_clrstatus 740ENDPROC(sun4v_svc_clrstatus)
853 741
854 .globl sun4v_mmustat_conf 742ENTRY(sun4v_mmustat_conf)
855 .type sun4v_mmustat_conf,#function
856sun4v_mmustat_conf:
857 mov %o1, %o4 743 mov %o1, %o4
858 mov HV_FAST_MMUSTAT_CONF, %o5 744 mov HV_FAST_MMUSTAT_CONF, %o5
859 ta HV_FAST_TRAP 745 ta HV_FAST_TRAP
860 stx %o1, [%o4] 746 stx %o1, [%o4]
861 retl 747 retl
862 nop 748 nop
863 .size sun4v_mmustat_conf, .-sun4v_mmustat_conf 749ENDPROC(sun4v_mmustat_conf)
864 750
865 .globl sun4v_mmustat_info 751ENTRY(sun4v_mmustat_info)
866 .type sun4v_mmustat_info,#function
867sun4v_mmustat_info:
868 mov %o0, %o4 752 mov %o0, %o4
869 mov HV_FAST_MMUSTAT_INFO, %o5 753 mov HV_FAST_MMUSTAT_INFO, %o5
870 ta HV_FAST_TRAP 754 ta HV_FAST_TRAP
871 stx %o1, [%o4] 755 stx %o1, [%o4]
872 retl 756 retl
873 nop 757 nop
874 .size sun4v_mmustat_info, .-sun4v_mmustat_info 758ENDPROC(sun4v_mmustat_info)
875 759
876 .globl sun4v_mmu_demap_all 760ENTRY(sun4v_mmu_demap_all)
877 .type sun4v_mmu_demap_all,#function
878sun4v_mmu_demap_all:
879 clr %o0 761 clr %o0
880 clr %o1 762 clr %o1
881 mov HV_MMU_ALL, %o2 763 mov HV_MMU_ALL, %o2
@@ -883,4 +765,4 @@ sun4v_mmu_demap_all:
883 ta HV_FAST_TRAP 765 ta HV_FAST_TRAP
884 retl 766 retl
885 nop 767 nop
886 .size sun4v_mmu_demap_all, .-sun4v_mmu_demap_all 768ENDPROC(sun4v_mmu_demap_all)
diff --git a/arch/sparc64/kernel/irq.c b/arch/sparc64/kernel/irq.c
index 9b6689d9d570..2817a272b4cf 100644
--- a/arch/sparc64/kernel/irq.c
+++ b/arch/sparc64/kernel/irq.c
@@ -28,7 +28,6 @@
28#include <asm/system.h> 28#include <asm/system.h>
29#include <asm/irq.h> 29#include <asm/irq.h>
30#include <asm/io.h> 30#include <asm/io.h>
31#include <asm/sbus.h>
32#include <asm/iommu.h> 31#include <asm/iommu.h>
33#include <asm/upa.h> 32#include <asm/upa.h>
34#include <asm/oplib.h> 33#include <asm/oplib.h>
diff --git a/arch/sparc64/kernel/of_device.c b/arch/sparc64/kernel/of_device.c
index f845f150f565..5c4fbc23aeea 100644
--- a/arch/sparc64/kernel/of_device.c
+++ b/arch/sparc64/kernel/of_device.c
@@ -55,15 +55,38 @@ struct of_device *of_find_device_by_node(struct device_node *dp)
55} 55}
56EXPORT_SYMBOL(of_find_device_by_node); 56EXPORT_SYMBOL(of_find_device_by_node);
57 57
58#ifdef CONFIG_PCI 58unsigned int irq_of_parse_and_map(struct device_node *node, int index)
59struct bus_type ebus_bus_type; 59{
60EXPORT_SYMBOL(ebus_bus_type); 60 struct of_device *op = of_find_device_by_node(node);
61#endif 61
62 if (!op || index >= op->num_irqs)
63 return 0;
64
65 return op->irqs[index];
66}
67EXPORT_SYMBOL(irq_of_parse_and_map);
68
69/* Take the archdata values for IOMMU, STC, and HOSTDATA found in
70 * BUS and propagate to all child of_device objects.
71 */
72void of_propagate_archdata(struct of_device *bus)
73{
74 struct dev_archdata *bus_sd = &bus->dev.archdata;
75 struct device_node *bus_dp = bus->node;
76 struct device_node *dp;
62 77
63#ifdef CONFIG_SBUS 78 for (dp = bus_dp->child; dp; dp = dp->sibling) {
64struct bus_type sbus_bus_type; 79 struct of_device *op = of_find_device_by_node(dp);
65EXPORT_SYMBOL(sbus_bus_type); 80
66#endif 81 op->dev.archdata.iommu = bus_sd->iommu;
82 op->dev.archdata.stc = bus_sd->stc;
83 op->dev.archdata.host_controller = bus_sd->host_controller;
84 op->dev.archdata.numa_node = bus_sd->numa_node;
85
86 if (dp->child)
87 of_propagate_archdata(op);
88 }
89}
67 90
68struct bus_type of_platform_bus_type; 91struct bus_type of_platform_bus_type;
69EXPORT_SYMBOL(of_platform_bus_type); 92EXPORT_SYMBOL(of_platform_bus_type);
@@ -421,8 +444,17 @@ static int __init use_1to1_mapping(struct device_node *pp)
421 444
422 /* If the parent is the dma node of an ISA bus, pass 445 /* If the parent is the dma node of an ISA bus, pass
423 * the translation up to the root. 446 * the translation up to the root.
447 *
448 * Some SBUS devices use intermediate nodes to express
449 * hierarchy within the device itself. These aren't
450 * real bus nodes, and don't have a 'ranges' property.
451 * But, we should still pass the translation work up
452 * to the SBUS itself.
424 */ 453 */
425 if (!strcmp(pp->name, "dma")) 454 if (!strcmp(pp->name, "dma") ||
455 !strcmp(pp->name, "espdma") ||
456 !strcmp(pp->name, "ledma") ||
457 !strcmp(pp->name, "lebuffer"))
426 return 0; 458 return 0;
427 459
428 /* Similarly for all PCI bridges, if we get this far 460 /* Similarly for all PCI bridges, if we get this far
@@ -845,15 +877,6 @@ static int __init of_bus_driver_init(void)
845 int err; 877 int err;
846 878
847 err = of_bus_type_init(&of_platform_bus_type, "of"); 879 err = of_bus_type_init(&of_platform_bus_type, "of");
848#ifdef CONFIG_PCI
849 if (!err)
850 err = of_bus_type_init(&ebus_bus_type, "ebus");
851#endif
852#ifdef CONFIG_SBUS
853 if (!err)
854 err = of_bus_type_init(&sbus_bus_type, "sbus");
855#endif
856
857 if (!err) 880 if (!err)
858 scan_of_devices(); 881 scan_of_devices();
859 882
diff --git a/arch/sparc64/kernel/pci.c b/arch/sparc64/kernel/pci.c
index 55096195458f..8e18fdf32a60 100644
--- a/arch/sparc64/kernel/pci.c
+++ b/arch/sparc64/kernel/pci.c
@@ -18,32 +18,17 @@
18#include <linux/msi.h> 18#include <linux/msi.h>
19#include <linux/irq.h> 19#include <linux/irq.h>
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/of.h>
22#include <linux/of_device.h>
21 23
22#include <asm/uaccess.h> 24#include <asm/uaccess.h>
23#include <asm/pgtable.h> 25#include <asm/pgtable.h>
24#include <asm/irq.h> 26#include <asm/irq.h>
25#include <asm/ebus.h>
26#include <asm/prom.h> 27#include <asm/prom.h>
27#include <asm/apb.h> 28#include <asm/apb.h>
28 29
29#include "pci_impl.h" 30#include "pci_impl.h"
30 31
31#ifndef CONFIG_PCI
32/* A "nop" PCI implementation. */
33asmlinkage int sys_pciconfig_read(unsigned long bus, unsigned long dfn,
34 unsigned long off, unsigned long len,
35 unsigned char *buf)
36{
37 return 0;
38}
39asmlinkage int sys_pciconfig_write(unsigned long bus, unsigned long dfn,
40 unsigned long off, unsigned long len,
41 unsigned char *buf)
42{
43 return 0;
44}
45#else
46
47/* List of all PCI controllers found in the system. */ 32/* List of all PCI controllers found in the system. */
48struct pci_pbm_info *pci_pbm_root = NULL; 33struct pci_pbm_info *pci_pbm_root = NULL;
49 34
@@ -179,97 +164,6 @@ void pci_config_write32(u32 *addr, u32 val)
179 spin_unlock_irqrestore(&pci_poke_lock, flags); 164 spin_unlock_irqrestore(&pci_poke_lock, flags);
180} 165}
181 166
182/* Probe for all PCI controllers in the system. */
183extern void sabre_init(struct device_node *, const char *);
184extern void psycho_init(struct device_node *, const char *);
185extern void schizo_init(struct device_node *, const char *);
186extern void schizo_plus_init(struct device_node *, const char *);
187extern void tomatillo_init(struct device_node *, const char *);
188extern void sun4v_pci_init(struct device_node *, const char *);
189extern void fire_pci_init(struct device_node *, const char *);
190
191static struct {
192 char *model_name;
193 void (*init)(struct device_node *, const char *);
194} pci_controller_table[] __initdata = {
195 { "SUNW,sabre", sabre_init },
196 { "pci108e,a000", sabre_init },
197 { "pci108e,a001", sabre_init },
198 { "SUNW,psycho", psycho_init },
199 { "pci108e,8000", psycho_init },
200 { "SUNW,schizo", schizo_init },
201 { "pci108e,8001", schizo_init },
202 { "SUNW,schizo+", schizo_plus_init },
203 { "pci108e,8002", schizo_plus_init },
204 { "SUNW,tomatillo", tomatillo_init },
205 { "pci108e,a801", tomatillo_init },
206 { "SUNW,sun4v-pci", sun4v_pci_init },
207 { "pciex108e,80f0", fire_pci_init },
208};
209#define PCI_NUM_CONTROLLER_TYPES ARRAY_SIZE(pci_controller_table)
210
211static int __init pci_controller_init(const char *model_name, int namelen, struct device_node *dp)
212{
213 int i;
214
215 for (i = 0; i < PCI_NUM_CONTROLLER_TYPES; i++) {
216 if (!strncmp(model_name,
217 pci_controller_table[i].model_name,
218 namelen)) {
219 pci_controller_table[i].init(dp, model_name);
220 return 1;
221 }
222 }
223
224 return 0;
225}
226
227static int __init pci_controller_scan(int (*handler)(const char *, int, struct device_node *))
228{
229 struct device_node *dp;
230 int count = 0;
231
232 for_each_node_by_name(dp, "pci") {
233 struct property *prop;
234 int len;
235
236 prop = of_find_property(dp, "model", &len);
237 if (!prop)
238 prop = of_find_property(dp, "compatible", &len);
239
240 if (prop) {
241 const char *model = prop->value;
242 int item_len = 0;
243
244 /* Our value may be a multi-valued string in the
245 * case of some compatible properties. For sanity,
246 * only try the first one.
247 */
248 while (model[item_len] && len) {
249 len--;
250 item_len++;
251 }
252
253 if (handler(model, item_len, dp))
254 count++;
255 }
256 }
257
258 return count;
259}
260
261/* Find each controller in the system, attach and initialize
262 * software state structure for each and link into the
263 * pci_pbm_root. Setup the controller enough such
264 * that bus scanning can be done.
265 */
266static void __init pci_controller_probe(void)
267{
268 printk("PCI: Probing for controllers.\n");
269
270 pci_controller_scan(pci_controller_init);
271}
272
273static int ofpci_verbose; 167static int ofpci_verbose;
274 168
275static int __init ofpci_debug(char *str) 169static int __init ofpci_debug(char *str)
@@ -353,6 +247,7 @@ struct pci_dev *of_create_pci_dev(struct pci_pbm_info *pbm,
353 struct pci_bus *bus, int devfn) 247 struct pci_bus *bus, int devfn)
354{ 248{
355 struct dev_archdata *sd; 249 struct dev_archdata *sd;
250 struct of_device *op;
356 struct pci_dev *dev; 251 struct pci_dev *dev;
357 const char *type; 252 const char *type;
358 u32 class; 253 u32 class;
@@ -366,14 +261,17 @@ struct pci_dev *of_create_pci_dev(struct pci_pbm_info *pbm,
366 sd->stc = &pbm->stc; 261 sd->stc = &pbm->stc;
367 sd->host_controller = pbm; 262 sd->host_controller = pbm;
368 sd->prom_node = node; 263 sd->prom_node = node;
369 sd->op = of_find_device_by_node(node); 264 sd->op = op = of_find_device_by_node(node);
370 sd->numa_node = pbm->numa_node; 265 sd->numa_node = pbm->numa_node;
371 266
372 sd = &sd->op->dev.archdata; 267 sd = &op->dev.archdata;
373 sd->iommu = pbm->iommu; 268 sd->iommu = pbm->iommu;
374 sd->stc = &pbm->stc; 269 sd->stc = &pbm->stc;
375 sd->numa_node = pbm->numa_node; 270 sd->numa_node = pbm->numa_node;
376 271
272 if (!strcmp(node->name, "ebus"))
273 of_propagate_archdata(op);
274
377 type = of_get_property(node, "device_type", NULL); 275 type = of_get_property(node, "device_type", NULL);
378 if (type == NULL) 276 if (type == NULL)
379 type = ""; 277 type = "";
@@ -775,15 +673,15 @@ static void __devinit pci_bus_register_of_sysfs(struct pci_bus *bus)
775 pci_bus_register_of_sysfs(child_bus); 673 pci_bus_register_of_sysfs(child_bus);
776} 674}
777 675
778struct pci_bus * __devinit pci_scan_one_pbm(struct pci_pbm_info *pbm) 676struct pci_bus * __devinit pci_scan_one_pbm(struct pci_pbm_info *pbm,
677 struct device *parent)
779{ 678{
780 struct device_node *node = pbm->prom_node; 679 struct device_node *node = pbm->prom_node;
781 struct pci_bus *bus; 680 struct pci_bus *bus;
782 681
783 printk("PCI: Scanning PBM %s\n", node->full_name); 682 printk("PCI: Scanning PBM %s\n", node->full_name);
784 683
785 /* XXX parent device? XXX */ 684 bus = pci_create_bus(parent, pbm->pci_first_busno, pbm->pci_ops, pbm);
786 bus = pci_create_bus(NULL, pbm->pci_first_busno, pbm->pci_ops, pbm);
787 if (!bus) { 685 if (!bus) {
788 printk(KERN_ERR "Failed to create bus for %s\n", 686 printk(KERN_ERR "Failed to create bus for %s\n",
789 node->full_name); 687 node->full_name);
@@ -802,32 +700,6 @@ struct pci_bus * __devinit pci_scan_one_pbm(struct pci_pbm_info *pbm)
802 return bus; 700 return bus;
803} 701}
804 702
805static void __init pci_scan_each_controller_bus(void)
806{
807 struct pci_pbm_info *pbm;
808
809 for (pbm = pci_pbm_root; pbm; pbm = pbm->next)
810 pbm->scan_bus(pbm);
811}
812
813extern void power_init(void);
814
815static int __init pcibios_init(void)
816{
817 pci_controller_probe();
818 if (pci_pbm_root == NULL)
819 return 0;
820
821 pci_scan_each_controller_bus();
822
823 ebus_init();
824 power_init();
825
826 return 0;
827}
828
829subsys_initcall(pcibios_init);
830
831void __devinit pcibios_fixup_bus(struct pci_bus *pbus) 703void __devinit pcibios_fixup_bus(struct pci_bus *pbus)
832{ 704{
833 struct pci_pbm_info *pbm = pbus->sysdata; 705 struct pci_pbm_info *pbm = pbus->sysdata;
@@ -1215,5 +1087,3 @@ void pci_resource_to_user(const struct pci_dev *pdev, int bar,
1215 *start = rp->start - offset; 1087 *start = rp->start - offset;
1216 *end = rp->end - offset; 1088 *end = rp->end - offset;
1217} 1089}
1218
1219#endif /* !(CONFIG_PCI) */
diff --git a/arch/sparc64/kernel/pci_fire.c b/arch/sparc64/kernel/pci_fire.c
index d23bb6f53cda..1b44153f9077 100644
--- a/arch/sparc64/kernel/pci_fire.c
+++ b/arch/sparc64/kernel/pci_fire.c
@@ -8,13 +8,16 @@
8#include <linux/init.h> 8#include <linux/init.h>
9#include <linux/msi.h> 9#include <linux/msi.h>
10#include <linux/irq.h> 10#include <linux/irq.h>
11#include <linux/of_device.h>
11 12
12#include <asm/oplib.h>
13#include <asm/prom.h> 13#include <asm/prom.h>
14#include <asm/irq.h> 14#include <asm/irq.h>
15 15
16#include "pci_impl.h" 16#include "pci_impl.h"
17 17
18#define DRIVER_NAME "fire"
19#define PFX DRIVER_NAME ": "
20
18#define fire_read(__reg) \ 21#define fire_read(__reg) \
19({ u64 __ret; \ 22({ u64 __ret; \
20 __asm__ __volatile__("ldxa [%1] %2, %0" \ 23 __asm__ __volatile__("ldxa [%1] %2, %0" \
@@ -30,13 +33,6 @@
30 "i" (ASI_PHYS_BYPASS_EC_E) \ 33 "i" (ASI_PHYS_BYPASS_EC_E) \
31 : "memory") 34 : "memory")
32 35
33static void __init pci_fire_scan_bus(struct pci_pbm_info *pbm)
34{
35 pbm->pci_bus = pci_scan_one_pbm(pbm);
36
37 /* XXX register error interrupt handlers XXX */
38}
39
40#define FIRE_IOMMU_CONTROL 0x40000UL 36#define FIRE_IOMMU_CONTROL 0x40000UL
41#define FIRE_IOMMU_TSBBASE 0x40008UL 37#define FIRE_IOMMU_TSBBASE 0x40008UL
42#define FIRE_IOMMU_FLUSH 0x40100UL 38#define FIRE_IOMMU_FLUSH 0x40100UL
@@ -436,9 +432,10 @@ static void pci_fire_hw_init(struct pci_pbm_info *pbm)
436} 432}
437 433
438static int __init pci_fire_pbm_init(struct pci_controller_info *p, 434static int __init pci_fire_pbm_init(struct pci_controller_info *p,
439 struct device_node *dp, u32 portid) 435 struct of_device *op, u32 portid)
440{ 436{
441 const struct linux_prom64_registers *regs; 437 const struct linux_prom64_registers *regs;
438 struct device_node *dp = op->node;
442 struct pci_pbm_info *pbm; 439 struct pci_pbm_info *pbm;
443 int err; 440 int err;
444 441
@@ -452,7 +449,6 @@ static int __init pci_fire_pbm_init(struct pci_controller_info *p,
452 449
453 pbm->numa_node = -1; 450 pbm->numa_node = -1;
454 451
455 pbm->scan_bus = pci_fire_scan_bus;
456 pbm->pci_ops = &sun4u_pci_ops; 452 pbm->pci_ops = &sun4u_pci_ops;
457 pbm->config_space_reg_bits = 12; 453 pbm->config_space_reg_bits = 12;
458 454
@@ -481,6 +477,10 @@ static int __init pci_fire_pbm_init(struct pci_controller_info *p,
481 477
482 pci_fire_msi_init(pbm); 478 pci_fire_msi_init(pbm);
483 479
480 pbm->pci_bus = pci_scan_one_pbm(pbm, &op->dev);
481
482 /* XXX register error interrupt handlers XXX */
483
484 return 0; 484 return 0;
485} 485}
486 486
@@ -491,43 +491,74 @@ static inline int portid_compare(u32 x, u32 y)
491 return 0; 491 return 0;
492} 492}
493 493
494void __init fire_pci_init(struct device_node *dp, const char *model_name) 494static int __devinit fire_probe(struct of_device *op,
495 const struct of_device_id *match)
495{ 496{
497 struct device_node *dp = op->node;
496 struct pci_controller_info *p; 498 struct pci_controller_info *p;
497 u32 portid = of_getintprop_default(dp, "portid", 0xff);
498 struct iommu *iommu;
499 struct pci_pbm_info *pbm; 499 struct pci_pbm_info *pbm;
500 struct iommu *iommu;
501 u32 portid;
502 int err;
500 503
504 portid = of_getintprop_default(dp, "portid", 0xff);
501 for (pbm = pci_pbm_root; pbm; pbm = pbm->next) { 505 for (pbm = pci_pbm_root; pbm; pbm = pbm->next) {
502 if (portid_compare(pbm->portid, portid)) { 506 if (portid_compare(pbm->portid, portid))
503 if (pci_fire_pbm_init(pbm->parent, dp, portid)) 507 return pci_fire_pbm_init(pbm->parent, op, portid);
504 goto fatal_memory_error;
505 return;
506 }
507 } 508 }
508 509
510 err = -ENOMEM;
509 p = kzalloc(sizeof(struct pci_controller_info), GFP_ATOMIC); 511 p = kzalloc(sizeof(struct pci_controller_info), GFP_ATOMIC);
510 if (!p) 512 if (!p) {
511 goto fatal_memory_error; 513 printk(KERN_ERR PFX "Cannot allocate controller info.\n");
514 goto out_err;
515 }
512 516
513 iommu = kzalloc(sizeof(struct iommu), GFP_ATOMIC); 517 iommu = kzalloc(sizeof(struct iommu), GFP_ATOMIC);
514 if (!iommu) 518 if (!iommu) {
515 goto fatal_memory_error; 519 printk(KERN_ERR PFX "Cannot allocate PBM A iommu.\n");
520 goto out_free_controller;
521 }
516 522
517 p->pbm_A.iommu = iommu; 523 p->pbm_A.iommu = iommu;
518 524
519 iommu = kzalloc(sizeof(struct iommu), GFP_ATOMIC); 525 iommu = kzalloc(sizeof(struct iommu), GFP_ATOMIC);
520 if (!iommu) 526 if (!iommu) {
521 goto fatal_memory_error; 527 printk(KERN_ERR PFX "Cannot allocate PBM A iommu.\n");
528 goto out_free_iommu_A;
529 }
522 530
523 p->pbm_B.iommu = iommu; 531 p->pbm_B.iommu = iommu;
524 532
525 if (pci_fire_pbm_init(p, dp, portid)) 533 return pci_fire_pbm_init(p, op, portid);
526 goto fatal_memory_error;
527 534
528 return; 535out_free_iommu_A:
536 kfree(p->pbm_A.iommu);
537
538out_free_controller:
539 kfree(p);
529 540
530fatal_memory_error: 541out_err:
531 prom_printf("PCI_FIRE: Fatal memory allocation error.\n"); 542 return err;
532 prom_halt();
533} 543}
544
545static struct of_device_id __initdata fire_match[] = {
546 {
547 .name = "pci",
548 .compatible = "pciex108e,80f0",
549 },
550 {},
551};
552
553static struct of_platform_driver fire_driver = {
554 .name = DRIVER_NAME,
555 .match_table = fire_match,
556 .probe = fire_probe,
557};
558
559static int __init fire_init(void)
560{
561 return of_register_driver(&fire_driver, &of_bus_type);
562}
563
564subsys_initcall(fire_init);
diff --git a/arch/sparc64/kernel/pci_impl.h b/arch/sparc64/kernel/pci_impl.h
index c385d126be11..4125f7513c69 100644
--- a/arch/sparc64/kernel/pci_impl.h
+++ b/arch/sparc64/kernel/pci_impl.h
@@ -146,7 +146,6 @@ struct pci_pbm_info {
146 unsigned int pci_first_busno; 146 unsigned int pci_first_busno;
147 unsigned int pci_last_busno; 147 unsigned int pci_last_busno;
148 struct pci_bus *pci_bus; 148 struct pci_bus *pci_bus;
149 void (*scan_bus)(struct pci_pbm_info *);
150 struct pci_ops *pci_ops; 149 struct pci_ops *pci_ops;
151 150
152 int numa_node; 151 int numa_node;
@@ -164,7 +163,8 @@ extern int pci_num_pbms;
164 163
165/* PCI bus scanning and fixup support. */ 164/* PCI bus scanning and fixup support. */
166extern void pci_get_pbm_props(struct pci_pbm_info *pbm); 165extern void pci_get_pbm_props(struct pci_pbm_info *pbm);
167extern struct pci_bus *pci_scan_one_pbm(struct pci_pbm_info *pbm); 166extern struct pci_bus *pci_scan_one_pbm(struct pci_pbm_info *pbm,
167 struct device *parent);
168extern void pci_determine_mem_io_space(struct pci_pbm_info *pbm); 168extern void pci_determine_mem_io_space(struct pci_pbm_info *pbm);
169 169
170/* Error reporting support. */ 170/* Error reporting support. */
diff --git a/arch/sparc64/kernel/pci_psycho.c b/arch/sparc64/kernel/pci_psycho.c
index ef5fe29202c2..0be850e6e580 100644
--- a/arch/sparc64/kernel/pci_psycho.c
+++ b/arch/sparc64/kernel/pci_psycho.c
@@ -17,11 +17,13 @@
17#include <asm/irq.h> 17#include <asm/irq.h>
18#include <asm/starfire.h> 18#include <asm/starfire.h>
19#include <asm/prom.h> 19#include <asm/prom.h>
20#include <asm/oplib.h>
21 20
22#include "pci_impl.h" 21#include "pci_impl.h"
23#include "iommu_common.h" 22#include "iommu_common.h"
24 23
24#define DRIVER_NAME "psycho"
25#define PFX DRIVER_NAME ": "
26
25/* All PSYCHO registers are 64-bits. The following accessor 27/* All PSYCHO registers are 64-bits. The following accessor
26 * routines are how they are accessed. The REG parameter 28 * routines are how they are accessed. The REG parameter
27 * is a physical address. 29 * is a physical address.
@@ -801,11 +803,12 @@ static void pbm_config_busmastering(struct pci_pbm_info *pbm)
801 pci_config_write8(addr, 64); 803 pci_config_write8(addr, 64);
802} 804}
803 805
804static void __init psycho_scan_bus(struct pci_pbm_info *pbm) 806static void __init psycho_scan_bus(struct pci_pbm_info *pbm,
807 struct device *parent)
805{ 808{
806 pbm_config_busmastering(pbm); 809 pbm_config_busmastering(pbm);
807 pbm->is_66mhz_capable = 0; 810 pbm->is_66mhz_capable = 0;
808 pbm->pci_bus = pci_scan_one_pbm(pbm); 811 pbm->pci_bus = pci_scan_one_pbm(pbm, parent);
809 812
810 /* After the PCI bus scan is complete, we can register 813 /* After the PCI bus scan is complete, we can register
811 * the error interrupt handlers. 814 * the error interrupt handlers.
@@ -840,7 +843,7 @@ static int psycho_iommu_init(struct pci_pbm_info *pbm)
840 control = psycho_read(pbm->controller_regs + PSYCHO_IOMMU_CONTROL); 843 control = psycho_read(pbm->controller_regs + PSYCHO_IOMMU_CONTROL);
841 control |= PSYCHO_IOMMU_CTRL_DENAB; 844 control |= PSYCHO_IOMMU_CTRL_DENAB;
842 psycho_write(pbm->controller_regs + PSYCHO_IOMMU_CONTROL, control); 845 psycho_write(pbm->controller_regs + PSYCHO_IOMMU_CONTROL, control);
843 for(i = 0; i < 16; i++) { 846 for (i = 0; i < 16; i++) {
844 psycho_write(pbm->controller_regs + PSYCHO_IOMMU_TAG + (i * 8UL), 0); 847 psycho_write(pbm->controller_regs + PSYCHO_IOMMU_TAG + (i * 8UL), 0);
845 psycho_write(pbm->controller_regs + PSYCHO_IOMMU_DATA + (i * 8UL), 0); 848 psycho_write(pbm->controller_regs + PSYCHO_IOMMU_DATA + (i * 8UL), 0);
846 } 849 }
@@ -850,8 +853,10 @@ static int psycho_iommu_init(struct pci_pbm_info *pbm)
850 */ 853 */
851 err = iommu_table_init(iommu, IO_TSB_SIZE, 0xc0000000, 0xffffffff, 854 err = iommu_table_init(iommu, IO_TSB_SIZE, 0xc0000000, 0xffffffff,
852 pbm->numa_node); 855 pbm->numa_node);
853 if (err) 856 if (err) {
857 printk(KERN_ERR PFX "iommu_table_init() fails\n");
854 return err; 858 return err;
859 }
855 860
856 psycho_write(pbm->controller_regs + PSYCHO_IOMMU_TSBBASE, 861 psycho_write(pbm->controller_regs + PSYCHO_IOMMU_TSBBASE,
857 __pa(iommu->page_table)); 862 __pa(iommu->page_table));
@@ -967,9 +972,9 @@ static void psycho_pbm_strbuf_init(struct pci_pbm_info *pbm,
967#define PSYCHO_MEMSPACE_SIZE 0x07fffffffUL 972#define PSYCHO_MEMSPACE_SIZE 0x07fffffffUL
968 973
969static void __init psycho_pbm_init(struct pci_controller_info *p, 974static void __init psycho_pbm_init(struct pci_controller_info *p,
970 struct device_node *dp, int is_pbm_a) 975 struct of_device *op, int is_pbm_a)
971{ 976{
972 struct property *prop; 977 struct device_node *dp = op->node;
973 struct pci_pbm_info *pbm; 978 struct pci_pbm_info *pbm;
974 979
975 if (is_pbm_a) 980 if (is_pbm_a)
@@ -982,27 +987,20 @@ static void __init psycho_pbm_init(struct pci_controller_info *p,
982 987
983 pbm->numa_node = -1; 988 pbm->numa_node = -1;
984 989
985 pbm->scan_bus = psycho_scan_bus;
986 pbm->pci_ops = &sun4u_pci_ops; 990 pbm->pci_ops = &sun4u_pci_ops;
987 pbm->config_space_reg_bits = 8; 991 pbm->config_space_reg_bits = 8;
988 992
989 pbm->index = pci_num_pbms++; 993 pbm->index = pci_num_pbms++;
990 994
991 pbm->chip_type = PBM_CHIP_TYPE_PSYCHO; 995 pbm->chip_type = PBM_CHIP_TYPE_PSYCHO;
992 pbm->chip_version = 0; 996 pbm->chip_version = of_getintprop_default(dp, "version#", 0);
993 prop = of_find_property(dp, "version#", NULL); 997 pbm->chip_revision = of_getintprop_default(dp, "module-revision#", 0);
994 if (prop)
995 pbm->chip_version = *(int *) prop->value;
996 pbm->chip_revision = 0;
997 prop = of_find_property(dp, "module-revision#", NULL);
998 if (prop)
999 pbm->chip_revision = *(int *) prop->value;
1000 998
1001 pbm->parent = p; 999 pbm->parent = p;
1002 pbm->prom_node = dp; 1000 pbm->prom_node = dp;
1003 pbm->name = dp->full_name; 1001 pbm->name = dp->full_name;
1004 1002
1005 printk("%s: PSYCHO PCI Bus Module ver[%x:%x]\n", 1003 printk(KERN_INFO "%s: PSYCHO PCI Bus Module ver[%x:%x]\n",
1006 pbm->name, 1004 pbm->name,
1007 pbm->chip_version, pbm->chip_revision); 1005 pbm->chip_version, pbm->chip_revision);
1008 1006
@@ -1011,49 +1009,59 @@ static void __init psycho_pbm_init(struct pci_controller_info *p,
1011 pci_get_pbm_props(pbm); 1009 pci_get_pbm_props(pbm);
1012 1010
1013 psycho_pbm_strbuf_init(pbm, is_pbm_a); 1011 psycho_pbm_strbuf_init(pbm, is_pbm_a);
1012
1013 psycho_scan_bus(pbm, &op->dev);
1014} 1014}
1015 1015
1016#define PSYCHO_CONFIGSPACE 0x001000000UL 1016#define PSYCHO_CONFIGSPACE 0x001000000UL
1017 1017
1018void __init psycho_init(struct device_node *dp, char *model_name) 1018static int __devinit psycho_probe(struct of_device *op,
1019 const struct of_device_id *match)
1019{ 1020{
1020 struct linux_prom64_registers *pr_regs; 1021 const struct linux_prom64_registers *pr_regs;
1022 struct device_node *dp = op->node;
1021 struct pci_controller_info *p; 1023 struct pci_controller_info *p;
1022 struct pci_pbm_info *pbm; 1024 struct pci_pbm_info *pbm;
1023 struct iommu *iommu; 1025 struct iommu *iommu;
1024 struct property *prop; 1026 int is_pbm_a, err;
1025 u32 upa_portid; 1027 u32 upa_portid;
1026 int is_pbm_a;
1027 1028
1028 upa_portid = 0xff; 1029 upa_portid = of_getintprop_default(dp, "upa-portid", 0xff);
1029 prop = of_find_property(dp, "upa-portid", NULL);
1030 if (prop)
1031 upa_portid = *(u32 *) prop->value;
1032 1030
1033 for (pbm = pci_pbm_root; pbm; pbm = pbm->next) { 1031 for (pbm = pci_pbm_root; pbm; pbm = pbm->next) {
1034 struct pci_controller_info *p = pbm->parent; 1032 struct pci_controller_info *p = pbm->parent;
1035 1033
1036 if (p->pbm_A.portid == upa_portid) { 1034 if (p->pbm_A.portid == upa_portid) {
1037 is_pbm_a = (p->pbm_A.prom_node == NULL); 1035 is_pbm_a = (p->pbm_A.prom_node == NULL);
1038 psycho_pbm_init(p, dp, is_pbm_a); 1036 psycho_pbm_init(p, op, is_pbm_a);
1039 return; 1037 return 0;
1040 } 1038 }
1041 } 1039 }
1042 1040
1041 err = -ENOMEM;
1043 p = kzalloc(sizeof(struct pci_controller_info), GFP_ATOMIC); 1042 p = kzalloc(sizeof(struct pci_controller_info), GFP_ATOMIC);
1044 if (!p) 1043 if (!p) {
1045 goto fatal_memory_error; 1044 printk(KERN_ERR PFX "Cannot allocate controller info.\n");
1045 goto out_err;
1046 }
1047
1046 iommu = kzalloc(sizeof(struct iommu), GFP_ATOMIC); 1048 iommu = kzalloc(sizeof(struct iommu), GFP_ATOMIC);
1047 if (!iommu) 1049 if (!iommu) {
1048 goto fatal_memory_error; 1050 printk(KERN_ERR PFX "Cannot allocate PBM iommu.\n");
1051 goto out_free_controller;
1052 }
1049 1053
1050 p->pbm_A.iommu = p->pbm_B.iommu = iommu; 1054 p->pbm_A.iommu = p->pbm_B.iommu = iommu;
1051 1055
1052 p->pbm_A.portid = upa_portid; 1056 p->pbm_A.portid = upa_portid;
1053 p->pbm_B.portid = upa_portid; 1057 p->pbm_B.portid = upa_portid;
1054 1058
1055 prop = of_find_property(dp, "reg", NULL); 1059 pr_regs = of_get_property(dp, "reg", NULL);
1056 pr_regs = prop->value; 1060 err = -ENODEV;
1061 if (!pr_regs) {
1062 printk(KERN_ERR PFX "No reg property.\n");
1063 goto out_free_iommu;
1064 }
1057 1065
1058 p->pbm_A.controller_regs = pr_regs[2].phys_addr; 1066 p->pbm_A.controller_regs = pr_regs[2].phys_addr;
1059 p->pbm_B.controller_regs = pr_regs[2].phys_addr; 1067 p->pbm_B.controller_regs = pr_regs[2].phys_addr;
@@ -1063,14 +1071,43 @@ void __init psycho_init(struct device_node *dp, char *model_name)
1063 1071
1064 psycho_controller_hwinit(&p->pbm_A); 1072 psycho_controller_hwinit(&p->pbm_A);
1065 1073
1066 if (psycho_iommu_init(&p->pbm_A)) 1074 err = psycho_iommu_init(&p->pbm_A);
1067 goto fatal_memory_error; 1075 if (err)
1076 goto out_free_iommu;
1068 1077
1069 is_pbm_a = ((pr_regs[0].phys_addr & 0x6000) == 0x2000); 1078 is_pbm_a = ((pr_regs[0].phys_addr & 0x6000) == 0x2000);
1070 psycho_pbm_init(p, dp, is_pbm_a);
1071 return;
1072 1079
1073fatal_memory_error: 1080 psycho_pbm_init(p, op, is_pbm_a);
1074 prom_printf("PSYCHO: Fatal memory allocation error.\n"); 1081
1075 prom_halt(); 1082 return 0;
1083
1084out_free_iommu:
1085 kfree(p->pbm_A.iommu);
1086
1087out_free_controller:
1088 kfree(p);
1089
1090out_err:
1091 return err;
1076} 1092}
1093
1094static struct of_device_id __initdata psycho_match[] = {
1095 {
1096 .name = "pci",
1097 .compatible = "pci108e,8000",
1098 },
1099 {},
1100};
1101
1102static struct of_platform_driver psycho_driver = {
1103 .name = DRIVER_NAME,
1104 .match_table = psycho_match,
1105 .probe = psycho_probe,
1106};
1107
1108static int __init psycho_init(void)
1109{
1110 return of_register_driver(&psycho_driver, &of_bus_type);
1111}
1112
1113subsys_initcall(psycho_init);
diff --git a/arch/sparc64/kernel/pci_sabre.c b/arch/sparc64/kernel/pci_sabre.c
index ade5184e75d1..707d6d6130f7 100644
--- a/arch/sparc64/kernel/pci_sabre.c
+++ b/arch/sparc64/kernel/pci_sabre.c
@@ -16,13 +16,14 @@
16#include <asm/apb.h> 16#include <asm/apb.h>
17#include <asm/iommu.h> 17#include <asm/iommu.h>
18#include <asm/irq.h> 18#include <asm/irq.h>
19#include <asm/smp.h>
20#include <asm/oplib.h>
21#include <asm/prom.h> 19#include <asm/prom.h>
22 20
23#include "pci_impl.h" 21#include "pci_impl.h"
24#include "iommu_common.h" 22#include "iommu_common.h"
25 23
24#define DRIVER_NAME "sabre"
25#define PFX DRIVER_NAME ": "
26
26/* All SABRE registers are 64-bits. The following accessor 27/* All SABRE registers are 64-bits. The following accessor
27 * routines are how they are accessed. The REG parameter 28 * routines are how they are accessed. The REG parameter
28 * is a physical address. 29 * is a physical address.
@@ -633,7 +634,8 @@ static void apb_init(struct pci_bus *sabre_bus)
633 } 634 }
634} 635}
635 636
636static void __init sabre_scan_bus(struct pci_pbm_info *pbm) 637static void __init sabre_scan_bus(struct pci_pbm_info *pbm,
638 struct device *parent)
637{ 639{
638 static int once; 640 static int once;
639 641
@@ -656,12 +658,12 @@ static void __init sabre_scan_bus(struct pci_pbm_info *pbm)
656 * to live at bus 0. 658 * to live at bus 0.
657 */ 659 */
658 if (once != 0) { 660 if (once != 0) {
659 prom_printf("SABRE: Multiple controllers unsupported.\n"); 661 printk(KERN_ERR PFX "Multiple controllers unsupported.\n");
660 prom_halt(); 662 return;
661 } 663 }
662 once++; 664 once++;
663 665
664 pbm->pci_bus = pci_scan_one_pbm(pbm); 666 pbm->pci_bus = pci_scan_one_pbm(pbm, parent);
665 if (!pbm->pci_bus) 667 if (!pbm->pci_bus)
666 return; 668 return;
667 669
@@ -705,8 +707,10 @@ static int sabre_iommu_init(struct pci_pbm_info *pbm,
705 */ 707 */
706 err = iommu_table_init(iommu, tsbsize * 1024 * 8, 708 err = iommu_table_init(iommu, tsbsize * 1024 * 8,
707 dvma_offset, dma_mask, pbm->numa_node); 709 dvma_offset, dma_mask, pbm->numa_node);
708 if (err) 710 if (err) {
711 printk(KERN_ERR PFX "iommu_table_init() failed\n");
709 return err; 712 return err;
713 }
710 714
711 sabre_write(pbm->controller_regs + SABRE_IOMMU_TSBBASE, 715 sabre_write(pbm->controller_regs + SABRE_IOMMU_TSBBASE,
712 __pa(iommu->page_table)); 716 __pa(iommu->page_table));
@@ -722,9 +726,8 @@ static int sabre_iommu_init(struct pci_pbm_info *pbm,
722 control |= SABRE_IOMMU_TSBSZ_128K; 726 control |= SABRE_IOMMU_TSBSZ_128K;
723 break; 727 break;
724 default: 728 default:
725 prom_printf("iommu_init: Illegal TSB size %d\n", tsbsize); 729 printk(KERN_ERR PFX "Illegal TSB size %d\n", tsbsize);
726 prom_halt(); 730 return -EINVAL;
727 break;
728 } 731 }
729 sabre_write(pbm->controller_regs + SABRE_IOMMU_CONTROL, control); 732 sabre_write(pbm->controller_regs + SABRE_IOMMU_CONTROL, control);
730 733
@@ -732,14 +735,15 @@ static int sabre_iommu_init(struct pci_pbm_info *pbm,
732} 735}
733 736
734static void __init sabre_pbm_init(struct pci_controller_info *p, 737static void __init sabre_pbm_init(struct pci_controller_info *p,
735 struct pci_pbm_info *pbm, struct device_node *dp) 738 struct pci_pbm_info *pbm, struct of_device *op)
736{ 739{
740 struct device_node *dp = op->node;
741
737 pbm->name = dp->full_name; 742 pbm->name = dp->full_name;
738 printk("%s: SABRE PCI Bus Module\n", pbm->name); 743 printk("%s: SABRE PCI Bus Module\n", pbm->name);
739 744
740 pbm->numa_node = -1; 745 pbm->numa_node = -1;
741 746
742 pbm->scan_bus = sabre_scan_bus;
743 pbm->pci_ops = &sun4u_pci_ops; 747 pbm->pci_ops = &sun4u_pci_ops;
744 pbm->config_space_reg_bits = 8; 748 pbm->config_space_reg_bits = 8;
745 749
@@ -751,46 +755,49 @@ static void __init sabre_pbm_init(struct pci_controller_info *p,
751 pci_get_pbm_props(pbm); 755 pci_get_pbm_props(pbm);
752 756
753 pci_determine_mem_io_space(pbm); 757 pci_determine_mem_io_space(pbm);
758
759 sabre_scan_bus(pbm, &op->dev);
754} 760}
755 761
756void __init sabre_init(struct device_node *dp, char *model_name) 762static int __devinit sabre_probe(struct of_device *op,
763 const struct of_device_id *match)
757{ 764{
758 const struct linux_prom64_registers *pr_regs; 765 const struct linux_prom64_registers *pr_regs;
766 struct device_node *dp = op->node;
759 struct pci_controller_info *p; 767 struct pci_controller_info *p;
760 struct pci_pbm_info *pbm; 768 struct pci_pbm_info *pbm;
769 u32 upa_portid, dma_mask;
761 struct iommu *iommu; 770 struct iommu *iommu;
762 int tsbsize; 771 int tsbsize, err;
763 const u32 *vdma; 772 const u32 *vdma;
764 u32 upa_portid, dma_mask;
765 u64 clear_irq; 773 u64 clear_irq;
766 774
767 hummingbird_p = 0; 775 hummingbird_p = (match->data != NULL);
768 if (!strcmp(model_name, "pci108e,a001")) 776 if (!hummingbird_p) {
769 hummingbird_p = 1; 777 struct device_node *cpu_dp;
770 else if (!strcmp(model_name, "SUNW,sabre")) { 778
771 const char *compat = of_get_property(dp, "compatible", NULL); 779 /* Of course, Sun has to encode things a thousand
772 if (compat && !strcmp(compat, "pci108e,a001")) 780 * different ways, inconsistently.
773 hummingbird_p = 1; 781 */
774 if (!hummingbird_p) { 782 for_each_node_by_type(cpu_dp, "cpu") {
775 struct device_node *dp; 783 if (!strcmp(cpu_dp->name, "SUNW,UltraSPARC-IIe"))
776 784 hummingbird_p = 1;
777 /* Of course, Sun has to encode things a thousand
778 * different ways, inconsistently.
779 */
780 for_each_node_by_type(dp, "cpu") {
781 if (!strcmp(dp->name, "SUNW,UltraSPARC-IIe"))
782 hummingbird_p = 1;
783 }
784 } 785 }
785 } 786 }
786 787
788 err = -ENOMEM;
787 p = kzalloc(sizeof(*p), GFP_ATOMIC); 789 p = kzalloc(sizeof(*p), GFP_ATOMIC);
788 if (!p) 790 if (!p) {
789 goto fatal_memory_error; 791 printk(KERN_ERR PFX "Cannot allocate controller info.\n");
792 goto out_err;
793 }
790 794
791 iommu = kzalloc(sizeof(*iommu), GFP_ATOMIC); 795 iommu = kzalloc(sizeof(*iommu), GFP_ATOMIC);
792 if (!iommu) 796 if (!iommu) {
793 goto fatal_memory_error; 797 printk(KERN_ERR PFX "Cannot allocate PBM iommu.\n");
798 goto out_free_controller;
799 }
800
794 pbm = &p->pbm_A; 801 pbm = &p->pbm_A;
795 pbm->iommu = iommu; 802 pbm->iommu = iommu;
796 803
@@ -806,6 +813,11 @@ void __init sabre_init(struct device_node *dp, char *model_name)
806 */ 813 */
807 814
808 pr_regs = of_get_property(dp, "reg", NULL); 815 pr_regs = of_get_property(dp, "reg", NULL);
816 err = -ENODEV;
817 if (!pr_regs) {
818 printk(KERN_ERR PFX "No reg property\n");
819 goto out_free_iommu;
820 }
809 821
810 /* 822 /*
811 * First REG in property is base of entire SABRE register space. 823 * First REG in property is base of entire SABRE register space.
@@ -832,6 +844,10 @@ void __init sabre_init(struct device_node *dp, char *model_name)
832 (pbm->controller_regs + SABRE_CONFIGSPACE); 844 (pbm->controller_regs + SABRE_CONFIGSPACE);
833 845
834 vdma = of_get_property(dp, "virtual-dma", NULL); 846 vdma = of_get_property(dp, "virtual-dma", NULL);
847 if (!vdma) {
848 printk(KERN_ERR PFX "No virtual-dma property\n");
849 goto out_free_iommu;
850 }
835 851
836 dma_mask = vdma[0]; 852 dma_mask = vdma[0];
837 switch(vdma[1]) { 853 switch(vdma[1]) {
@@ -849,20 +865,52 @@ void __init sabre_init(struct device_node *dp, char *model_name)
849 tsbsize = 128; 865 tsbsize = 128;
850 break; 866 break;
851 default: 867 default:
852 prom_printf("SABRE: strange virtual-dma size.\n"); 868 printk(KERN_ERR PFX "Strange virtual-dma size.\n");
853 prom_halt(); 869 goto out_free_iommu;
854 } 870 }
855 871
856 if (sabre_iommu_init(pbm, tsbsize, vdma[0], dma_mask)) 872 err = sabre_iommu_init(pbm, tsbsize, vdma[0], dma_mask);
857 goto fatal_memory_error; 873 if (err)
874 goto out_free_iommu;
858 875
859 /* 876 /*
860 * Look for APB underneath. 877 * Look for APB underneath.
861 */ 878 */
862 sabre_pbm_init(p, pbm, dp); 879 sabre_pbm_init(p, pbm, op);
863 return; 880 return 0;
864 881
865fatal_memory_error: 882out_free_iommu:
866 prom_printf("SABRE: Fatal memory allocation error.\n"); 883 kfree(p->pbm_A.iommu);
867 prom_halt(); 884
885out_free_controller:
886 kfree(p);
887
888out_err:
889 return err;
890}
891
892static struct of_device_id __initdata sabre_match[] = {
893 {
894 .name = "pci",
895 .compatible = "pci108e,a001",
896 .data = (void *) 1,
897 },
898 {
899 .name = "pci",
900 .compatible = "pci108e,a000",
901 },
902 {},
903};
904
905static struct of_platform_driver sabre_driver = {
906 .name = DRIVER_NAME,
907 .match_table = sabre_match,
908 .probe = sabre_probe,
909};
910
911static int __init sabre_init(void)
912{
913 return of_register_driver(&sabre_driver, &of_bus_type);
868} 914}
915
916subsys_initcall(sabre_init);
diff --git a/arch/sparc64/kernel/pci_schizo.c b/arch/sparc64/kernel/pci_schizo.c
index 9248c6737f0e..e1c565744d3f 100644
--- a/arch/sparc64/kernel/pci_schizo.c
+++ b/arch/sparc64/kernel/pci_schizo.c
@@ -1,6 +1,6 @@
1/* pci_schizo.c: SCHIZO/TOMATILLO specific PCI controller support. 1/* pci_schizo.c: SCHIZO/TOMATILLO specific PCI controller support.
2 * 2 *
3 * Copyright (C) 2001, 2002, 2003, 2007 David S. Miller (davem@davemloft.net) 3 * Copyright (C) 2001, 2002, 2003, 2007, 2008 David S. Miller (davem@davemloft.net)
4 */ 4 */
5 5
6#include <linux/kernel.h> 6#include <linux/kernel.h>
@@ -13,14 +13,15 @@
13 13
14#include <asm/iommu.h> 14#include <asm/iommu.h>
15#include <asm/irq.h> 15#include <asm/irq.h>
16#include <asm/upa.h>
17#include <asm/pstate.h> 16#include <asm/pstate.h>
18#include <asm/prom.h> 17#include <asm/prom.h>
19#include <asm/oplib.h>
20 18
21#include "pci_impl.h" 19#include "pci_impl.h"
22#include "iommu_common.h" 20#include "iommu_common.h"
23 21
22#define DRIVER_NAME "schizo"
23#define PFX DRIVER_NAME ": "
24
24/* All SCHIZO registers are 64-bits. The following accessor 25/* All SCHIZO registers are 64-bits. The following accessor
25 * routines are how they are accessed. The REG parameter 26 * routines are how they are accessed. The REG parameter
26 * is a physical address. 27 * is a physical address.
@@ -1084,14 +1085,15 @@ static void pbm_config_busmastering(struct pci_pbm_info *pbm)
1084 pci_config_write8(addr, 64); 1085 pci_config_write8(addr, 64);
1085} 1086}
1086 1087
1087static void __init schizo_scan_bus(struct pci_pbm_info *pbm) 1088static void __devinit schizo_scan_bus(struct pci_pbm_info *pbm,
1089 struct device *parent)
1088{ 1090{
1089 pbm_config_busmastering(pbm); 1091 pbm_config_busmastering(pbm);
1090 pbm->is_66mhz_capable = 1092 pbm->is_66mhz_capable =
1091 (of_find_property(pbm->prom_node, "66mhz-capable", NULL) 1093 (of_find_property(pbm->prom_node, "66mhz-capable", NULL)
1092 != NULL); 1094 != NULL);
1093 1095
1094 pbm->pci_bus = pci_scan_one_pbm(pbm); 1096 pbm->pci_bus = pci_scan_one_pbm(pbm, parent);
1095 1097
1096 if (pbm->chip_type == PBM_CHIP_TYPE_TOMATILLO) 1098 if (pbm->chip_type == PBM_CHIP_TYPE_TOMATILLO)
1097 tomatillo_register_error_handlers(pbm); 1099 tomatillo_register_error_handlers(pbm);
@@ -1150,24 +1152,17 @@ static void schizo_pbm_strbuf_init(struct pci_pbm_info *pbm)
1150 1152
1151static int schizo_pbm_iommu_init(struct pci_pbm_info *pbm) 1153static int schizo_pbm_iommu_init(struct pci_pbm_info *pbm)
1152{ 1154{
1153 struct iommu *iommu = pbm->iommu; 1155 static const u32 vdma_default[] = { 0xc0000000, 0x40000000 };
1154 unsigned long i, tagbase, database; 1156 unsigned long i, tagbase, database;
1155 struct property *prop; 1157 struct iommu *iommu = pbm->iommu;
1156 u32 vdma[2], dma_mask;
1157 int tsbsize, err; 1158 int tsbsize, err;
1159 const u32 *vdma;
1160 u32 dma_mask;
1158 u64 control; 1161 u64 control;
1159 1162
1160 prop = of_find_property(pbm->prom_node, "virtual-dma", NULL); 1163 vdma = of_get_property(pbm->prom_node, "virtual-dma", NULL);
1161 if (prop) { 1164 if (!vdma)
1162 u32 *val = prop->value; 1165 vdma = vdma_default;
1163
1164 vdma[0] = val[0];
1165 vdma[1] = val[1];
1166 } else {
1167 /* No property, use default values. */
1168 vdma[0] = 0xc0000000;
1169 vdma[1] = 0x40000000;
1170 }
1171 1166
1172 dma_mask = vdma[0]; 1167 dma_mask = vdma[0];
1173 switch (vdma[1]) { 1168 switch (vdma[1]) {
@@ -1187,9 +1182,9 @@ static int schizo_pbm_iommu_init(struct pci_pbm_info *pbm)
1187 break; 1182 break;
1188 1183
1189 default: 1184 default:
1190 prom_printf("SCHIZO: strange virtual-dma size.\n"); 1185 printk(KERN_ERR PFX "Strange virtual-dma size.\n");
1191 prom_halt(); 1186 return -EINVAL;
1192 }; 1187 }
1193 1188
1194 /* Register addresses, SCHIZO has iommu ctx flushing. */ 1189 /* Register addresses, SCHIZO has iommu ctx flushing. */
1195 iommu->iommu_control = pbm->pbm_regs + SCHIZO_IOMMU_CONTROL; 1190 iommu->iommu_control = pbm->pbm_regs + SCHIZO_IOMMU_CONTROL;
@@ -1212,7 +1207,7 @@ static int schizo_pbm_iommu_init(struct pci_pbm_info *pbm)
1212 1207
1213 tagbase = SCHIZO_IOMMU_TAG, database = SCHIZO_IOMMU_DATA; 1208 tagbase = SCHIZO_IOMMU_TAG, database = SCHIZO_IOMMU_DATA;
1214 1209
1215 for(i = 0; i < 16; i++) { 1210 for (i = 0; i < 16; i++) {
1216 schizo_write(pbm->pbm_regs + tagbase + (i * 8UL), 0); 1211 schizo_write(pbm->pbm_regs + tagbase + (i * 8UL), 0);
1217 schizo_write(pbm->pbm_regs + database + (i * 8UL), 0); 1212 schizo_write(pbm->pbm_regs + database + (i * 8UL), 0);
1218 } 1213 }
@@ -1222,8 +1217,10 @@ static int schizo_pbm_iommu_init(struct pci_pbm_info *pbm)
1222 */ 1217 */
1223 err = iommu_table_init(iommu, tsbsize * 8 * 1024, vdma[0], dma_mask, 1218 err = iommu_table_init(iommu, tsbsize * 8 * 1024, vdma[0], dma_mask,
1224 pbm->numa_node); 1219 pbm->numa_node);
1225 if (err) 1220 if (err) {
1221 printk(KERN_ERR PFX "iommu_table_init() fails with %d\n", err);
1226 return err; 1222 return err;
1223 }
1227 1224
1228 schizo_write(iommu->iommu_tsbbase, __pa(iommu->page_table)); 1225 schizo_write(iommu->iommu_tsbbase, __pa(iommu->page_table));
1229 1226
@@ -1236,7 +1233,7 @@ static int schizo_pbm_iommu_init(struct pci_pbm_info *pbm)
1236 case 128: 1233 case 128:
1237 control |= SCHIZO_IOMMU_TSBSZ_128K; 1234 control |= SCHIZO_IOMMU_TSBSZ_128K;
1238 break; 1235 break;
1239 }; 1236 }
1240 1237
1241 control |= SCHIZO_IOMMU_CTRL_ENAB; 1238 control |= SCHIZO_IOMMU_CTRL_ENAB;
1242 schizo_write(iommu->iommu_control, control); 1239 schizo_write(iommu->iommu_control, control);
@@ -1280,7 +1277,6 @@ static int schizo_pbm_iommu_init(struct pci_pbm_info *pbm)
1280 1277
1281static void schizo_pbm_hw_init(struct pci_pbm_info *pbm) 1278static void schizo_pbm_hw_init(struct pci_pbm_info *pbm)
1282{ 1279{
1283 struct property *prop;
1284 u64 tmp; 1280 u64 tmp;
1285 1281
1286 schizo_write(pbm->pbm_regs + SCHIZO_PCI_IRQ_RETRY, 5); 1282 schizo_write(pbm->pbm_regs + SCHIZO_PCI_IRQ_RETRY, 5);
@@ -1294,8 +1290,7 @@ static void schizo_pbm_hw_init(struct pci_pbm_info *pbm)
1294 pbm->chip_version >= 0x2) 1290 pbm->chip_version >= 0x2)
1295 tmp |= 0x3UL << SCHIZO_PCICTRL_PTO_SHIFT; 1291 tmp |= 0x3UL << SCHIZO_PCICTRL_PTO_SHIFT;
1296 1292
1297 prop = of_find_property(pbm->prom_node, "no-bus-parking", NULL); 1293 if (!of_find_property(pbm->prom_node, "no-bus-parking", NULL))
1298 if (!prop)
1299 tmp |= SCHIZO_PCICTRL_PARK; 1294 tmp |= SCHIZO_PCICTRL_PARK;
1300 else 1295 else
1301 tmp &= ~SCHIZO_PCICTRL_PARK; 1296 tmp &= ~SCHIZO_PCICTRL_PARK;
@@ -1334,11 +1329,12 @@ static void schizo_pbm_hw_init(struct pci_pbm_info *pbm)
1334 } 1329 }
1335} 1330}
1336 1331
1337static int __init schizo_pbm_init(struct pci_controller_info *p, 1332static int __devinit schizo_pbm_init(struct pci_controller_info *p,
1338 struct device_node *dp, u32 portid, 1333 struct of_device *op, u32 portid,
1339 int chip_type) 1334 int chip_type)
1340{ 1335{
1341 const struct linux_prom64_registers *regs; 1336 const struct linux_prom64_registers *regs;
1337 struct device_node *dp = op->node;
1342 struct pci_pbm_info *pbm; 1338 struct pci_pbm_info *pbm;
1343 const char *chipset_name; 1339 const char *chipset_name;
1344 int is_pbm_a, err; 1340 int is_pbm_a, err;
@@ -1382,7 +1378,6 @@ static int __init schizo_pbm_init(struct pci_controller_info *p,
1382 1378
1383 pbm->numa_node = -1; 1379 pbm->numa_node = -1;
1384 1380
1385 pbm->scan_bus = schizo_scan_bus;
1386 pbm->pci_ops = &sun4u_pci_ops; 1381 pbm->pci_ops = &sun4u_pci_ops;
1387 pbm->config_space_reg_bits = 8; 1382 pbm->config_space_reg_bits = 8;
1388 1383
@@ -1420,6 +1415,8 @@ static int __init schizo_pbm_init(struct pci_controller_info *p,
1420 1415
1421 schizo_pbm_strbuf_init(pbm); 1416 schizo_pbm_strbuf_init(pbm);
1422 1417
1418 schizo_scan_bus(pbm, &op->dev);
1419
1423 return 0; 1420 return 0;
1424} 1421}
1425 1422
@@ -1433,62 +1430,106 @@ static inline int portid_compare(u32 x, u32 y, int chip_type)
1433 return (x == y); 1430 return (x == y);
1434} 1431}
1435 1432
1436static void __init __schizo_init(struct device_node *dp, char *model_name, 1433static int __devinit __schizo_init(struct of_device *op, unsigned long chip_type)
1437 int chip_type)
1438{ 1434{
1435 struct device_node *dp = op->node;
1439 struct pci_controller_info *p; 1436 struct pci_controller_info *p;
1440 struct pci_pbm_info *pbm; 1437 struct pci_pbm_info *pbm;
1441 struct iommu *iommu; 1438 struct iommu *iommu;
1442 u32 portid; 1439 u32 portid;
1440 int err;
1443 1441
1444 portid = of_getintprop_default(dp, "portid", 0xff); 1442 portid = of_getintprop_default(dp, "portid", 0xff);
1445 1443
1444 err = -ENOMEM;
1446 for (pbm = pci_pbm_root; pbm; pbm = pbm->next) { 1445 for (pbm = pci_pbm_root; pbm; pbm = pbm->next) {
1447 if (portid_compare(pbm->portid, portid, chip_type)) { 1446 if (portid_compare(pbm->portid, portid, chip_type)) {
1448 if (schizo_pbm_init(pbm->parent, dp, 1447 if (schizo_pbm_init(pbm->parent, op,
1449 portid, chip_type)) 1448 portid, chip_type))
1450 goto fatal_memory_error; 1449 goto out_err;
1451 return; 1450 return 0;
1452 } 1451 }
1453 } 1452 }
1454 1453
1455 p = kzalloc(sizeof(struct pci_controller_info), GFP_ATOMIC); 1454 p = kzalloc(sizeof(struct pci_controller_info), GFP_ATOMIC);
1456 if (!p) 1455 if (!p) {
1457 goto fatal_memory_error; 1456 printk(KERN_ERR PFX "Cannot allocate controller info.\n");
1457 goto out_err;
1458 }
1458 1459
1459 iommu = kzalloc(sizeof(struct iommu), GFP_ATOMIC); 1460 iommu = kzalloc(sizeof(struct iommu), GFP_ATOMIC);
1460 if (!iommu) 1461 if (!iommu) {
1461 goto fatal_memory_error; 1462 printk(KERN_ERR PFX "Cannot allocate PBM A iommu.\n");
1463 goto out_free_controller;
1464 }
1462 1465
1463 p->pbm_A.iommu = iommu; 1466 p->pbm_A.iommu = iommu;
1464 1467
1465 iommu = kzalloc(sizeof(struct iommu), GFP_ATOMIC); 1468 iommu = kzalloc(sizeof(struct iommu), GFP_ATOMIC);
1466 if (!iommu) 1469 if (!iommu) {
1467 goto fatal_memory_error; 1470 printk(KERN_ERR PFX "Cannot allocate PBM B iommu.\n");
1471 goto out_free_iommu_A;
1472 }
1468 1473
1469 p->pbm_B.iommu = iommu; 1474 p->pbm_B.iommu = iommu;
1470 1475
1471 if (schizo_pbm_init(p, dp, portid, chip_type)) 1476 if (schizo_pbm_init(p, op, portid, chip_type))
1472 goto fatal_memory_error; 1477 goto out_free_iommu_B;
1473 1478
1474 return; 1479 return 0;
1475 1480
1476fatal_memory_error: 1481out_free_iommu_B:
1477 prom_printf("SCHIZO: Fatal memory allocation error.\n"); 1482 kfree(p->pbm_B.iommu);
1478 prom_halt();
1479}
1480 1483
1481void __init schizo_init(struct device_node *dp, char *model_name) 1484out_free_iommu_A:
1482{ 1485 kfree(p->pbm_A.iommu);
1483 __schizo_init(dp, model_name, PBM_CHIP_TYPE_SCHIZO); 1486
1487out_free_controller:
1488 kfree(p);
1489
1490out_err:
1491 return err;
1484} 1492}
1485 1493
1486void __init schizo_plus_init(struct device_node *dp, char *model_name) 1494static int __devinit schizo_probe(struct of_device *op,
1495 const struct of_device_id *match)
1487{ 1496{
1488 __schizo_init(dp, model_name, PBM_CHIP_TYPE_SCHIZO_PLUS); 1497 return __schizo_init(op, (unsigned long) match->data);
1489} 1498}
1490 1499
1491void __init tomatillo_init(struct device_node *dp, char *model_name) 1500/* The ordering of this table is very important. Some Tomatillo
1501 * nodes announce that they are compatible with both pci108e,a801
1502 * and pci108e,8001. So list the chips in reverse chronological
1503 * order.
1504 */
1505static struct of_device_id __initdata schizo_match[] = {
1506 {
1507 .name = "pci",
1508 .compatible = "pci108e,a801",
1509 .data = (void *) PBM_CHIP_TYPE_TOMATILLO,
1510 },
1511 {
1512 .name = "pci",
1513 .compatible = "pci108e,8002",
1514 .data = (void *) PBM_CHIP_TYPE_SCHIZO_PLUS,
1515 },
1516 {
1517 .name = "pci",
1518 .compatible = "pci108e,8001",
1519 .data = (void *) PBM_CHIP_TYPE_SCHIZO,
1520 },
1521 {},
1522};
1523
1524static struct of_platform_driver schizo_driver = {
1525 .name = DRIVER_NAME,
1526 .match_table = schizo_match,
1527 .probe = schizo_probe,
1528};
1529
1530static int __init schizo_init(void)
1492{ 1531{
1493 __schizo_init(dp, model_name, PBM_CHIP_TYPE_TOMATILLO); 1532 return of_register_driver(&schizo_driver, &of_bus_type);
1494} 1533}
1534
1535subsys_initcall(schizo_init);
diff --git a/arch/sparc64/kernel/pci_sun4v.c b/arch/sparc64/kernel/pci_sun4v.c
index a104c80d319d..6bed2f6bf7cd 100644
--- a/arch/sparc64/kernel/pci_sun4v.c
+++ b/arch/sparc64/kernel/pci_sun4v.c
@@ -13,12 +13,10 @@
13#include <linux/irq.h> 13#include <linux/irq.h>
14#include <linux/msi.h> 14#include <linux/msi.h>
15#include <linux/log2.h> 15#include <linux/log2.h>
16#include <linux/of_device.h>
16 17
17#include <asm/iommu.h> 18#include <asm/iommu.h>
18#include <asm/irq.h> 19#include <asm/irq.h>
19#include <asm/upa.h>
20#include <asm/pstate.h>
21#include <asm/oplib.h>
22#include <asm/hypervisor.h> 20#include <asm/hypervisor.h>
23#include <asm/prom.h> 21#include <asm/prom.h>
24 22
@@ -27,6 +25,9 @@
27 25
28#include "pci_sun4v.h" 26#include "pci_sun4v.h"
29 27
28#define DRIVER_NAME "pci_sun4v"
29#define PFX DRIVER_NAME ": "
30
30static unsigned long vpci_major = 1; 31static unsigned long vpci_major = 1;
31static unsigned long vpci_minor = 1; 32static unsigned long vpci_minor = 1;
32 33
@@ -542,7 +543,8 @@ static const struct dma_ops sun4v_dma_ops = {
542 .sync_sg_for_cpu = dma_4v_sync_sg_for_cpu, 543 .sync_sg_for_cpu = dma_4v_sync_sg_for_cpu,
543}; 544};
544 545
545static void __init pci_sun4v_scan_bus(struct pci_pbm_info *pbm) 546static void __init pci_sun4v_scan_bus(struct pci_pbm_info *pbm,
547 struct device *parent)
546{ 548{
547 struct property *prop; 549 struct property *prop;
548 struct device_node *dp; 550 struct device_node *dp;
@@ -550,7 +552,7 @@ static void __init pci_sun4v_scan_bus(struct pci_pbm_info *pbm)
550 dp = pbm->prom_node; 552 dp = pbm->prom_node;
551 prop = of_find_property(dp, "66mhz-capable", NULL); 553 prop = of_find_property(dp, "66mhz-capable", NULL);
552 pbm->is_66mhz_capable = (prop != NULL); 554 pbm->is_66mhz_capable = (prop != NULL);
553 pbm->pci_bus = pci_scan_one_pbm(pbm); 555 pbm->pci_bus = pci_scan_one_pbm(pbm, parent);
554 556
555 /* XXX register error interrupt handlers XXX */ 557 /* XXX register error interrupt handlers XXX */
556} 558}
@@ -583,29 +585,22 @@ static unsigned long __init probe_existing_entries(struct pci_pbm_info *pbm,
583 return cnt; 585 return cnt;
584} 586}
585 587
586static void __init pci_sun4v_iommu_init(struct pci_pbm_info *pbm) 588static int __init pci_sun4v_iommu_init(struct pci_pbm_info *pbm)
587{ 589{
590 static const u32 vdma_default[] = { 0x80000000, 0x80000000 };
588 struct iommu *iommu = pbm->iommu; 591 struct iommu *iommu = pbm->iommu;
589 struct property *prop;
590 unsigned long num_tsb_entries, sz, tsbsize; 592 unsigned long num_tsb_entries, sz, tsbsize;
591 u32 vdma[2], dma_mask, dma_offset; 593 u32 dma_mask, dma_offset;
592 594 const u32 *vdma;
593 prop = of_find_property(pbm->prom_node, "virtual-dma", NULL); 595
594 if (prop) { 596 vdma = of_get_property(pbm->prom_node, "virtual-dma", NULL);
595 u32 *val = prop->value; 597 if (!vdma)
596 598 vdma = vdma_default;
597 vdma[0] = val[0];
598 vdma[1] = val[1];
599 } else {
600 /* No property, use default values. */
601 vdma[0] = 0x80000000;
602 vdma[1] = 0x80000000;
603 }
604 599
605 if ((vdma[0] | vdma[1]) & ~IO_PAGE_MASK) { 600 if ((vdma[0] | vdma[1]) & ~IO_PAGE_MASK) {
606 prom_printf("PCI-SUN4V: strange virtual-dma[%08x:%08x].\n", 601 printk(KERN_ERR PFX "Strange virtual-dma[%08x:%08x].\n",
607 vdma[0], vdma[1]); 602 vdma[0], vdma[1]);
608 prom_halt(); 603 return -EINVAL;
609 }; 604 };
610 605
611 dma_mask = (roundup_pow_of_two(vdma[1]) - 1UL); 606 dma_mask = (roundup_pow_of_two(vdma[1]) - 1UL);
@@ -625,8 +620,8 @@ static void __init pci_sun4v_iommu_init(struct pci_pbm_info *pbm)
625 sz = (sz + 7UL) & ~7UL; 620 sz = (sz + 7UL) & ~7UL;
626 iommu->arena.map = kzalloc(sz, GFP_KERNEL); 621 iommu->arena.map = kzalloc(sz, GFP_KERNEL);
627 if (!iommu->arena.map) { 622 if (!iommu->arena.map) {
628 prom_printf("PCI_IOMMU: Error, kmalloc(arena.map) failed.\n"); 623 printk(KERN_ERR PFX "Error, kmalloc(arena.map) failed.\n");
629 prom_halt(); 624 return -ENOMEM;
630 } 625 }
631 iommu->arena.limit = num_tsb_entries; 626 iommu->arena.limit = num_tsb_entries;
632 627
@@ -634,6 +629,8 @@ static void __init pci_sun4v_iommu_init(struct pci_pbm_info *pbm)
634 if (sz) 629 if (sz)
635 printk("%s: Imported %lu TSB entries from OBP\n", 630 printk("%s: Imported %lu TSB entries from OBP\n",
636 pbm->name, sz); 631 pbm->name, sz);
632
633 return 0;
637} 634}
638 635
639#ifdef CONFIG_PCI_MSI 636#ifdef CONFIG_PCI_MSI
@@ -890,10 +887,12 @@ static void pci_sun4v_msi_init(struct pci_pbm_info *pbm)
890} 887}
891#endif /* !(CONFIG_PCI_MSI) */ 888#endif /* !(CONFIG_PCI_MSI) */
892 889
893static void __init pci_sun4v_pbm_init(struct pci_controller_info *p, 890static int __init pci_sun4v_pbm_init(struct pci_controller_info *p,
894 struct device_node *dp, u32 devhandle) 891 struct of_device *op, u32 devhandle)
895{ 892{
893 struct device_node *dp = op->node;
896 struct pci_pbm_info *pbm; 894 struct pci_pbm_info *pbm;
895 int err;
897 896
898 if (devhandle & 0x40) 897 if (devhandle & 0x40)
899 pbm = &p->pbm_B; 898 pbm = &p->pbm_B;
@@ -905,7 +904,6 @@ static void __init pci_sun4v_pbm_init(struct pci_controller_info *p,
905 904
906 pbm->numa_node = of_node_to_nid(dp); 905 pbm->numa_node = of_node_to_nid(dp);
907 906
908 pbm->scan_bus = pci_sun4v_scan_bus;
909 pbm->pci_ops = &sun4v_pci_ops; 907 pbm->pci_ops = &sun4v_pci_ops;
910 pbm->config_space_reg_bits = 12; 908 pbm->config_space_reg_bits = 12;
911 909
@@ -924,20 +922,31 @@ static void __init pci_sun4v_pbm_init(struct pci_controller_info *p,
924 pci_determine_mem_io_space(pbm); 922 pci_determine_mem_io_space(pbm);
925 923
926 pci_get_pbm_props(pbm); 924 pci_get_pbm_props(pbm);
927 pci_sun4v_iommu_init(pbm); 925
926 err = pci_sun4v_iommu_init(pbm);
927 if (err)
928 return err;
929
928 pci_sun4v_msi_init(pbm); 930 pci_sun4v_msi_init(pbm);
931
932 pci_sun4v_scan_bus(pbm, &op->dev);
933
934 return 0;
929} 935}
930 936
931void __init sun4v_pci_init(struct device_node *dp, char *model_name) 937static int __devinit pci_sun4v_probe(struct of_device *op,
938 const struct of_device_id *match)
932{ 939{
940 const struct linux_prom64_registers *regs;
933 static int hvapi_negotiated = 0; 941 static int hvapi_negotiated = 0;
934 struct pci_controller_info *p; 942 struct pci_controller_info *p;
935 struct pci_pbm_info *pbm; 943 struct pci_pbm_info *pbm;
944 struct device_node *dp;
936 struct iommu *iommu; 945 struct iommu *iommu;
937 struct property *prop;
938 struct linux_prom64_registers *regs;
939 u32 devhandle; 946 u32 devhandle;
940 int i; 947 int i, err;
948
949 dp = op->node;
941 950
942 if (!hvapi_negotiated++) { 951 if (!hvapi_negotiated++) {
943 int err = sun4v_hvapi_register(HV_GRP_PCI, 952 int err = sun4v_hvapi_register(HV_GRP_PCI,
@@ -945,61 +954,91 @@ void __init sun4v_pci_init(struct device_node *dp, char *model_name)
945 &vpci_minor); 954 &vpci_minor);
946 955
947 if (err) { 956 if (err) {
948 prom_printf("SUN4V_PCI: Could not register hvapi, " 957 printk(KERN_ERR PFX "Could not register hvapi, "
949 "err=%d\n", err); 958 "err=%d\n", err);
950 prom_halt(); 959 return err;
951 } 960 }
952 printk("SUN4V_PCI: Registered hvapi major[%lu] minor[%lu]\n", 961 printk(KERN_INFO PFX "Registered hvapi major[%lu] minor[%lu]\n",
953 vpci_major, vpci_minor); 962 vpci_major, vpci_minor);
954 963
955 dma_ops = &sun4v_dma_ops; 964 dma_ops = &sun4v_dma_ops;
956 } 965 }
957 966
958 prop = of_find_property(dp, "reg", NULL); 967 regs = of_get_property(dp, "reg", NULL);
959 if (!prop) { 968 err = -ENODEV;
960 prom_printf("SUN4V_PCI: Could not find config registers\n"); 969 if (!regs) {
961 prom_halt(); 970 printk(KERN_ERR PFX "Could not find config registers\n");
971 goto out_err;
962 } 972 }
963 regs = prop->value;
964
965 devhandle = (regs->phys_addr >> 32UL) & 0x0fffffff; 973 devhandle = (regs->phys_addr >> 32UL) & 0x0fffffff;
966 974
967 for (pbm = pci_pbm_root; pbm; pbm = pbm->next) { 975 for (pbm = pci_pbm_root; pbm; pbm = pbm->next) {
968 if (pbm->devhandle == (devhandle ^ 0x40)) { 976 if (pbm->devhandle == (devhandle ^ 0x40)) {
969 pci_sun4v_pbm_init(pbm->parent, dp, devhandle); 977 return pci_sun4v_pbm_init(pbm->parent, op, devhandle);
970 return;
971 } 978 }
972 } 979 }
973 980
981 err = -ENOMEM;
974 for_each_possible_cpu(i) { 982 for_each_possible_cpu(i) {
975 unsigned long page = get_zeroed_page(GFP_ATOMIC); 983 unsigned long page = get_zeroed_page(GFP_ATOMIC);
976 984
977 if (!page) 985 if (!page)
978 goto fatal_memory_error; 986 goto out_err;
979 987
980 per_cpu(iommu_batch, i).pglist = (u64 *) page; 988 per_cpu(iommu_batch, i).pglist = (u64 *) page;
981 } 989 }
982 990
983 p = kzalloc(sizeof(struct pci_controller_info), GFP_ATOMIC); 991 p = kzalloc(sizeof(struct pci_controller_info), GFP_ATOMIC);
984 if (!p) 992 if (!p) {
985 goto fatal_memory_error; 993 printk(KERN_ERR PFX "Could not allocate pci_controller_info\n");
994 goto out_err;
995 }
986 996
987 iommu = kzalloc(sizeof(struct iommu), GFP_ATOMIC); 997 iommu = kzalloc(sizeof(struct iommu), GFP_ATOMIC);
988 if (!iommu) 998 if (!iommu) {
989 goto fatal_memory_error; 999 printk(KERN_ERR PFX "Could not allocate pbm A iommu\n");
1000 goto out_free_controller;
1001 }
990 1002
991 p->pbm_A.iommu = iommu; 1003 p->pbm_A.iommu = iommu;
992 1004
993 iommu = kzalloc(sizeof(struct iommu), GFP_ATOMIC); 1005 iommu = kzalloc(sizeof(struct iommu), GFP_ATOMIC);
994 if (!iommu) 1006 if (!iommu) {
995 goto fatal_memory_error; 1007 printk(KERN_ERR PFX "Could not allocate pbm B iommu\n");
1008 goto out_free_iommu_A;
1009 }
996 1010
997 p->pbm_B.iommu = iommu; 1011 p->pbm_B.iommu = iommu;
998 1012
999 pci_sun4v_pbm_init(p, dp, devhandle); 1013 return pci_sun4v_pbm_init(p, op, devhandle);
1000 return; 1014
1015out_free_iommu_A:
1016 kfree(p->pbm_A.iommu);
1017
1018out_free_controller:
1019 kfree(p);
1001 1020
1002fatal_memory_error: 1021out_err:
1003 prom_printf("SUN4V_PCI: Fatal memory allocation error.\n"); 1022 return err;
1004 prom_halt();
1005} 1023}
1024
1025static struct of_device_id __initdata pci_sun4v_match[] = {
1026 {
1027 .name = "pci",
1028 .compatible = "SUNW,sun4v-pci",
1029 },
1030 {},
1031};
1032
1033static struct of_platform_driver pci_sun4v_driver = {
1034 .name = DRIVER_NAME,
1035 .match_table = pci_sun4v_match,
1036 .probe = pci_sun4v_probe,
1037};
1038
1039static int __init pci_sun4v_init(void)
1040{
1041 return of_register_driver(&pci_sun4v_driver, &of_bus_type);
1042}
1043
1044subsys_initcall(pci_sun4v_init);
diff --git a/arch/sparc64/kernel/pci_sun4v_asm.S b/arch/sparc64/kernel/pci_sun4v_asm.S
index ecb81f389b06..e606d46c6815 100644
--- a/arch/sparc64/kernel/pci_sun4v_asm.S
+++ b/arch/sparc64/kernel/pci_sun4v_asm.S
@@ -1,8 +1,9 @@
1/* pci_sun4v_asm: Hypervisor calls for PCI support. 1/* pci_sun4v_asm: Hypervisor calls for PCI support.
2 * 2 *
3 * Copyright (C) 2006 David S. Miller <davem@davemloft.net> 3 * Copyright (C) 2006, 2008 David S. Miller <davem@davemloft.net>
4 */ 4 */
5 5
6#include <linux/linkage.h>
6#include <asm/hypervisor.h> 7#include <asm/hypervisor.h>
7 8
8 /* %o0: devhandle 9 /* %o0: devhandle
@@ -14,8 +15,7 @@
14 * returns %o0: -status if status was non-zero, else 15 * returns %o0: -status if status was non-zero, else
15 * %o0: num pages mapped 16 * %o0: num pages mapped
16 */ 17 */
17 .globl pci_sun4v_iommu_map 18ENTRY(pci_sun4v_iommu_map)
18pci_sun4v_iommu_map:
19 mov %o5, %g1 19 mov %o5, %g1
20 mov HV_FAST_PCI_IOMMU_MAP, %o5 20 mov HV_FAST_PCI_IOMMU_MAP, %o5
21 ta HV_FAST_TRAP 21 ta HV_FAST_TRAP
@@ -24,6 +24,7 @@ pci_sun4v_iommu_map:
24 mov %o1, %o0 24 mov %o1, %o0
251: retl 251: retl
26 nop 26 nop
27ENDPROC(pci_sun4v_iommu_map)
27 28
28 /* %o0: devhandle 29 /* %o0: devhandle
29 * %o1: tsbid 30 * %o1: tsbid
@@ -31,12 +32,12 @@ pci_sun4v_iommu_map:
31 * 32 *
32 * returns %o0: num ttes demapped 33 * returns %o0: num ttes demapped
33 */ 34 */
34 .globl pci_sun4v_iommu_demap 35ENTRY(pci_sun4v_iommu_demap)
35pci_sun4v_iommu_demap:
36 mov HV_FAST_PCI_IOMMU_DEMAP, %o5 36 mov HV_FAST_PCI_IOMMU_DEMAP, %o5
37 ta HV_FAST_TRAP 37 ta HV_FAST_TRAP
38 retl 38 retl
39 mov %o1, %o0 39 mov %o1, %o0
40ENDPROC(pci_sun4v_iommu_demap)
40 41
41 /* %o0: devhandle 42 /* %o0: devhandle
42 * %o1: tsbid 43 * %o1: tsbid
@@ -45,8 +46,7 @@ pci_sun4v_iommu_demap:
45 * 46 *
46 * returns %o0: status 47 * returns %o0: status
47 */ 48 */
48 .globl pci_sun4v_iommu_getmap 49ENTRY(pci_sun4v_iommu_getmap)
49pci_sun4v_iommu_getmap:
50 mov %o2, %o4 50 mov %o2, %o4
51 mov HV_FAST_PCI_IOMMU_GETMAP, %o5 51 mov HV_FAST_PCI_IOMMU_GETMAP, %o5
52 ta HV_FAST_TRAP 52 ta HV_FAST_TRAP
@@ -54,6 +54,7 @@ pci_sun4v_iommu_getmap:
54 stx %o2, [%o3] 54 stx %o2, [%o3]
55 retl 55 retl
56 mov %o0, %o0 56 mov %o0, %o0
57ENDPROC(pci_sun4v_iommu_getmap)
57 58
58 /* %o0: devhandle 59 /* %o0: devhandle
59 * %o1: pci_device 60 * %o1: pci_device
@@ -65,14 +66,14 @@ pci_sun4v_iommu_getmap:
65 * If there is an error, the data will be returned 66 * If there is an error, the data will be returned
66 * as all 1's. 67 * as all 1's.
67 */ 68 */
68 .globl pci_sun4v_config_get 69ENTRY(pci_sun4v_config_get)
69pci_sun4v_config_get:
70 mov HV_FAST_PCI_CONFIG_GET, %o5 70 mov HV_FAST_PCI_CONFIG_GET, %o5
71 ta HV_FAST_TRAP 71 ta HV_FAST_TRAP
72 brnz,a,pn %o1, 1f 72 brnz,a,pn %o1, 1f
73 mov -1, %o2 73 mov -1, %o2
741: retl 741: retl
75 mov %o2, %o0 75 mov %o2, %o0
76ENDPROC(pci_sun4v_config_get)
76 77
77 /* %o0: devhandle 78 /* %o0: devhandle
78 * %o1: pci_device 79 * %o1: pci_device
@@ -85,14 +86,14 @@ pci_sun4v_config_get:
85 * status will be zero if the operation completed 86 * status will be zero if the operation completed
86 * successfully, else -1 if not 87 * successfully, else -1 if not
87 */ 88 */
88 .globl pci_sun4v_config_put 89ENTRY(pci_sun4v_config_put)
89pci_sun4v_config_put:
90 mov HV_FAST_PCI_CONFIG_PUT, %o5 90 mov HV_FAST_PCI_CONFIG_PUT, %o5
91 ta HV_FAST_TRAP 91 ta HV_FAST_TRAP
92 brnz,a,pn %o1, 1f 92 brnz,a,pn %o1, 1f
93 mov -1, %o1 93 mov -1, %o1
941: retl 941: retl
95 mov %o1, %o0 95 mov %o1, %o0
96ENDPROC(pci_sun4v_config_put)
96 97
97 /* %o0: devhandle 98 /* %o0: devhandle
98 * %o1: msiqid 99 * %o1: msiqid
@@ -104,12 +105,12 @@ pci_sun4v_config_put:
104 * status will be zero if the operation completed 105 * status will be zero if the operation completed
105 * successfully, else -1 if not 106 * successfully, else -1 if not
106 */ 107 */
107 .globl pci_sun4v_msiq_conf 108ENTRY(pci_sun4v_msiq_conf)
108pci_sun4v_msiq_conf:
109 mov HV_FAST_PCI_MSIQ_CONF, %o5 109 mov HV_FAST_PCI_MSIQ_CONF, %o5
110 ta HV_FAST_TRAP 110 ta HV_FAST_TRAP
111 retl 111 retl
112 mov %o0, %o0 112 mov %o0, %o0
113ENDPROC(pci_sun4v_msiq_conf)
113 114
114 /* %o0: devhandle 115 /* %o0: devhandle
115 * %o1: msiqid 116 * %o1: msiqid
@@ -118,8 +119,7 @@ pci_sun4v_msiq_conf:
118 * 119 *
119 * returns %o0: status 120 * returns %o0: status
120 */ 121 */
121 .globl pci_sun4v_msiq_info 122ENTRY(pci_sun4v_msiq_info)
122pci_sun4v_msiq_info:
123 mov %o2, %o4 123 mov %o2, %o4
124 mov HV_FAST_PCI_MSIQ_INFO, %o5 124 mov HV_FAST_PCI_MSIQ_INFO, %o5
125 ta HV_FAST_TRAP 125 ta HV_FAST_TRAP
@@ -127,6 +127,7 @@ pci_sun4v_msiq_info:
127 stx %o2, [%o3] 127 stx %o2, [%o3]
128 retl 128 retl
129 mov %o0, %o0 129 mov %o0, %o0
130ENDPROC(pci_sun4v_msiq_info)
130 131
131 /* %o0: devhandle 132 /* %o0: devhandle
132 * %o1: msiqid 133 * %o1: msiqid
@@ -134,13 +135,13 @@ pci_sun4v_msiq_info:
134 * 135 *
135 * returns %o0: status 136 * returns %o0: status
136 */ 137 */
137 .globl pci_sun4v_msiq_getvalid 138ENTRY(pci_sun4v_msiq_getvalid)
138pci_sun4v_msiq_getvalid:
139 mov HV_FAST_PCI_MSIQ_GETVALID, %o5 139 mov HV_FAST_PCI_MSIQ_GETVALID, %o5
140 ta HV_FAST_TRAP 140 ta HV_FAST_TRAP
141 stx %o1, [%o2] 141 stx %o1, [%o2]
142 retl 142 retl
143 mov %o0, %o0 143 mov %o0, %o0
144ENDPROC(pci_sun4v_msiq_getvalid)
144 145
145 /* %o0: devhandle 146 /* %o0: devhandle
146 * %o1: msiqid 147 * %o1: msiqid
@@ -148,12 +149,12 @@ pci_sun4v_msiq_getvalid:
148 * 149 *
149 * returns %o0: status 150 * returns %o0: status
150 */ 151 */
151 .globl pci_sun4v_msiq_setvalid 152ENTRY(pci_sun4v_msiq_setvalid)
152pci_sun4v_msiq_setvalid:
153 mov HV_FAST_PCI_MSIQ_SETVALID, %o5 153 mov HV_FAST_PCI_MSIQ_SETVALID, %o5
154 ta HV_FAST_TRAP 154 ta HV_FAST_TRAP
155 retl 155 retl
156 mov %o0, %o0 156 mov %o0, %o0
157ENDPROC(pci_sun4v_msiq_setvalid)
157 158
158 /* %o0: devhandle 159 /* %o0: devhandle
159 * %o1: msiqid 160 * %o1: msiqid
@@ -161,13 +162,13 @@ pci_sun4v_msiq_setvalid:
161 * 162 *
162 * returns %o0: status 163 * returns %o0: status
163 */ 164 */
164 .globl pci_sun4v_msiq_getstate 165ENTRY(pci_sun4v_msiq_getstate)
165pci_sun4v_msiq_getstate:
166 mov HV_FAST_PCI_MSIQ_GETSTATE, %o5 166 mov HV_FAST_PCI_MSIQ_GETSTATE, %o5
167 ta HV_FAST_TRAP 167 ta HV_FAST_TRAP
168 stx %o1, [%o2] 168 stx %o1, [%o2]
169 retl 169 retl
170 mov %o0, %o0 170 mov %o0, %o0
171ENDPROC(pci_sun4v_msiq_getstate)
171 172
172 /* %o0: devhandle 173 /* %o0: devhandle
173 * %o1: msiqid 174 * %o1: msiqid
@@ -175,12 +176,12 @@ pci_sun4v_msiq_getstate:
175 * 176 *
176 * returns %o0: status 177 * returns %o0: status
177 */ 178 */
178 .globl pci_sun4v_msiq_setstate 179ENTRY(pci_sun4v_msiq_setstate)
179pci_sun4v_msiq_setstate:
180 mov HV_FAST_PCI_MSIQ_SETSTATE, %o5 180 mov HV_FAST_PCI_MSIQ_SETSTATE, %o5
181 ta HV_FAST_TRAP 181 ta HV_FAST_TRAP
182 retl 182 retl
183 mov %o0, %o0 183 mov %o0, %o0
184ENDPROC(pci_sun4v_msiq_setstate)
184 185
185 /* %o0: devhandle 186 /* %o0: devhandle
186 * %o1: msiqid 187 * %o1: msiqid
@@ -188,13 +189,13 @@ pci_sun4v_msiq_setstate:
188 * 189 *
189 * returns %o0: status 190 * returns %o0: status
190 */ 191 */
191 .globl pci_sun4v_msiq_gethead 192ENTRY(pci_sun4v_msiq_gethead)
192pci_sun4v_msiq_gethead:
193 mov HV_FAST_PCI_MSIQ_GETHEAD, %o5 193 mov HV_FAST_PCI_MSIQ_GETHEAD, %o5
194 ta HV_FAST_TRAP 194 ta HV_FAST_TRAP
195 stx %o1, [%o2] 195 stx %o1, [%o2]
196 retl 196 retl
197 mov %o0, %o0 197 mov %o0, %o0
198ENDPROC(pci_sun4v_msiq_gethead)
198 199
199 /* %o0: devhandle 200 /* %o0: devhandle
200 * %o1: msiqid 201 * %o1: msiqid
@@ -202,12 +203,12 @@ pci_sun4v_msiq_gethead:
202 * 203 *
203 * returns %o0: status 204 * returns %o0: status
204 */ 205 */
205 .globl pci_sun4v_msiq_sethead 206ENTRY(pci_sun4v_msiq_sethead)
206pci_sun4v_msiq_sethead:
207 mov HV_FAST_PCI_MSIQ_SETHEAD, %o5 207 mov HV_FAST_PCI_MSIQ_SETHEAD, %o5
208 ta HV_FAST_TRAP 208 ta HV_FAST_TRAP
209 retl 209 retl
210 mov %o0, %o0 210 mov %o0, %o0
211ENDPROC(pci_sun4v_msiq_sethead)
211 212
212 /* %o0: devhandle 213 /* %o0: devhandle
213 * %o1: msiqid 214 * %o1: msiqid
@@ -215,13 +216,13 @@ pci_sun4v_msiq_sethead:
215 * 216 *
216 * returns %o0: status 217 * returns %o0: status
217 */ 218 */
218 .globl pci_sun4v_msiq_gettail 219ENTRY(pci_sun4v_msiq_gettail)
219pci_sun4v_msiq_gettail:
220 mov HV_FAST_PCI_MSIQ_GETTAIL, %o5 220 mov HV_FAST_PCI_MSIQ_GETTAIL, %o5
221 ta HV_FAST_TRAP 221 ta HV_FAST_TRAP
222 stx %o1, [%o2] 222 stx %o1, [%o2]
223 retl 223 retl
224 mov %o0, %o0 224 mov %o0, %o0
225ENDPROC(pci_sun4v_msiq_gettail)
225 226
226 /* %o0: devhandle 227 /* %o0: devhandle
227 * %o1: msinum 228 * %o1: msinum
@@ -229,13 +230,13 @@ pci_sun4v_msiq_gettail:
229 * 230 *
230 * returns %o0: status 231 * returns %o0: status
231 */ 232 */
232 .globl pci_sun4v_msi_getvalid 233ENTRY(pci_sun4v_msi_getvalid)
233pci_sun4v_msi_getvalid:
234 mov HV_FAST_PCI_MSI_GETVALID, %o5 234 mov HV_FAST_PCI_MSI_GETVALID, %o5
235 ta HV_FAST_TRAP 235 ta HV_FAST_TRAP
236 stx %o1, [%o2] 236 stx %o1, [%o2]
237 retl 237 retl
238 mov %o0, %o0 238 mov %o0, %o0
239ENDPROC(pci_sun4v_msi_getvalid)
239 240
240 /* %o0: devhandle 241 /* %o0: devhandle
241 * %o1: msinum 242 * %o1: msinum
@@ -243,12 +244,12 @@ pci_sun4v_msi_getvalid:
243 * 244 *
244 * returns %o0: status 245 * returns %o0: status
245 */ 246 */
246 .globl pci_sun4v_msi_setvalid 247ENTRY(pci_sun4v_msi_setvalid)
247pci_sun4v_msi_setvalid:
248 mov HV_FAST_PCI_MSI_SETVALID, %o5 248 mov HV_FAST_PCI_MSI_SETVALID, %o5
249 ta HV_FAST_TRAP 249 ta HV_FAST_TRAP
250 retl 250 retl
251 mov %o0, %o0 251 mov %o0, %o0
252ENDPROC(pci_sun4v_msi_setvalid)
252 253
253 /* %o0: devhandle 254 /* %o0: devhandle
254 * %o1: msinum 255 * %o1: msinum
@@ -256,13 +257,13 @@ pci_sun4v_msi_setvalid:
256 * 257 *
257 * returns %o0: status 258 * returns %o0: status
258 */ 259 */
259 .globl pci_sun4v_msi_getmsiq 260ENTRY(pci_sun4v_msi_getmsiq)
260pci_sun4v_msi_getmsiq:
261 mov HV_FAST_PCI_MSI_GETMSIQ, %o5 261 mov HV_FAST_PCI_MSI_GETMSIQ, %o5
262 ta HV_FAST_TRAP 262 ta HV_FAST_TRAP
263 stx %o1, [%o2] 263 stx %o1, [%o2]
264 retl 264 retl
265 mov %o0, %o0 265 mov %o0, %o0
266ENDPROC(pci_sun4v_msi_getmsiq)
266 267
267 /* %o0: devhandle 268 /* %o0: devhandle
268 * %o1: msinum 269 * %o1: msinum
@@ -271,12 +272,12 @@ pci_sun4v_msi_getmsiq:
271 * 272 *
272 * returns %o0: status 273 * returns %o0: status
273 */ 274 */
274 .globl pci_sun4v_msi_setmsiq 275ENTRY(pci_sun4v_msi_setmsiq)
275pci_sun4v_msi_setmsiq:
276 mov HV_FAST_PCI_MSI_SETMSIQ, %o5 276 mov HV_FAST_PCI_MSI_SETMSIQ, %o5
277 ta HV_FAST_TRAP 277 ta HV_FAST_TRAP
278 retl 278 retl
279 mov %o0, %o0 279 mov %o0, %o0
280ENDPROC(pci_sun4v_msi_setmsiq)
280 281
281 /* %o0: devhandle 282 /* %o0: devhandle
282 * %o1: msinum 283 * %o1: msinum
@@ -284,13 +285,13 @@ pci_sun4v_msi_setmsiq:
284 * 285 *
285 * returns %o0: status 286 * returns %o0: status
286 */ 287 */
287 .globl pci_sun4v_msi_getstate 288ENTRY(pci_sun4v_msi_getstate)
288pci_sun4v_msi_getstate:
289 mov HV_FAST_PCI_MSI_GETSTATE, %o5 289 mov HV_FAST_PCI_MSI_GETSTATE, %o5
290 ta HV_FAST_TRAP 290 ta HV_FAST_TRAP
291 stx %o1, [%o2] 291 stx %o1, [%o2]
292 retl 292 retl
293 mov %o0, %o0 293 mov %o0, %o0
294ENDPROC(pci_sun4v_msi_getstate)
294 295
295 /* %o0: devhandle 296 /* %o0: devhandle
296 * %o1: msinum 297 * %o1: msinum
@@ -298,12 +299,12 @@ pci_sun4v_msi_getstate:
298 * 299 *
299 * returns %o0: status 300 * returns %o0: status
300 */ 301 */
301 .globl pci_sun4v_msi_setstate 302ENTRY(pci_sun4v_msi_setstate)
302pci_sun4v_msi_setstate:
303 mov HV_FAST_PCI_MSI_SETSTATE, %o5 303 mov HV_FAST_PCI_MSI_SETSTATE, %o5
304 ta HV_FAST_TRAP 304 ta HV_FAST_TRAP
305 retl 305 retl
306 mov %o0, %o0 306 mov %o0, %o0
307ENDPROC(pci_sun4v_msi_setstate)
307 308
308 /* %o0: devhandle 309 /* %o0: devhandle
309 * %o1: msinum 310 * %o1: msinum
@@ -311,13 +312,13 @@ pci_sun4v_msi_setstate:
311 * 312 *
312 * returns %o0: status 313 * returns %o0: status
313 */ 314 */
314 .globl pci_sun4v_msg_getmsiq 315ENTRY(pci_sun4v_msg_getmsiq)
315pci_sun4v_msg_getmsiq:
316 mov HV_FAST_PCI_MSG_GETMSIQ, %o5 316 mov HV_FAST_PCI_MSG_GETMSIQ, %o5
317 ta HV_FAST_TRAP 317 ta HV_FAST_TRAP
318 stx %o1, [%o2] 318 stx %o1, [%o2]
319 retl 319 retl
320 mov %o0, %o0 320 mov %o0, %o0
321ENDPROC(pci_sun4v_msg_getmsiq)
321 322
322 /* %o0: devhandle 323 /* %o0: devhandle
323 * %o1: msinum 324 * %o1: msinum
@@ -325,12 +326,12 @@ pci_sun4v_msg_getmsiq:
325 * 326 *
326 * returns %o0: status 327 * returns %o0: status
327 */ 328 */
328 .globl pci_sun4v_msg_setmsiq 329ENTRY(pci_sun4v_msg_setmsiq)
329pci_sun4v_msg_setmsiq:
330 mov HV_FAST_PCI_MSG_SETMSIQ, %o5 330 mov HV_FAST_PCI_MSG_SETMSIQ, %o5
331 ta HV_FAST_TRAP 331 ta HV_FAST_TRAP
332 retl 332 retl
333 mov %o0, %o0 333 mov %o0, %o0
334ENDPROC(pci_sun4v_msg_setmsiq)
334 335
335 /* %o0: devhandle 336 /* %o0: devhandle
336 * %o1: msinum 337 * %o1: msinum
@@ -338,13 +339,13 @@ pci_sun4v_msg_setmsiq:
338 * 339 *
339 * returns %o0: status 340 * returns %o0: status
340 */ 341 */
341 .globl pci_sun4v_msg_getvalid 342ENTRY(pci_sun4v_msg_getvalid)
342pci_sun4v_msg_getvalid:
343 mov HV_FAST_PCI_MSG_GETVALID, %o5 343 mov HV_FAST_PCI_MSG_GETVALID, %o5
344 ta HV_FAST_TRAP 344 ta HV_FAST_TRAP
345 stx %o1, [%o2] 345 stx %o1, [%o2]
346 retl 346 retl
347 mov %o0, %o0 347 mov %o0, %o0
348ENDPROC(pci_sun4v_msg_getvalid)
348 349
349 /* %o0: devhandle 350 /* %o0: devhandle
350 * %o1: msinum 351 * %o1: msinum
@@ -352,10 +353,10 @@ pci_sun4v_msg_getvalid:
352 * 353 *
353 * returns %o0: status 354 * returns %o0: status
354 */ 355 */
355 .globl pci_sun4v_msg_setvalid 356ENTRY(pci_sun4v_msg_setvalid)
356pci_sun4v_msg_setvalid:
357 mov HV_FAST_PCI_MSG_SETVALID, %o5 357 mov HV_FAST_PCI_MSG_SETVALID, %o5
358 ta HV_FAST_TRAP 358 ta HV_FAST_TRAP
359 retl 359 retl
360 mov %o0, %o0 360 mov %o0, %o0
361ENDPROC(pci_sun4v_msg_setvalid)
361 362
diff --git a/arch/sparc64/kernel/power.c b/arch/sparc64/kernel/power.c
index 3bb987a6d03c..076cad7f9757 100644
--- a/arch/sparc64/kernel/power.c
+++ b/arch/sparc64/kernel/power.c
@@ -1,34 +1,17 @@
1/* power.c: Power management driver. 1/* power.c: Power management driver.
2 * 2 *
3 * Copyright (C) 1999, 2007 David S. Miller (davem@davemloft.net) 3 * Copyright (C) 1999, 2007, 2008 David S. Miller (davem@davemloft.net)
4 */ 4 */
5 5
6#include <linux/kernel.h> 6#include <linux/kernel.h>
7#include <linux/module.h> 7#include <linux/module.h>
8#include <linux/init.h> 8#include <linux/init.h>
9#include <linux/sched.h>
10#include <linux/signal.h>
11#include <linux/delay.h>
12#include <linux/interrupt.h> 9#include <linux/interrupt.h>
13#include <linux/pm.h>
14#include <linux/syscalls.h>
15#include <linux/reboot.h> 10#include <linux/reboot.h>
16#include <linux/of_device.h> 11#include <linux/of_device.h>
17 12
18#include <asm/system.h>
19#include <asm/auxio.h>
20#include <asm/prom.h> 13#include <asm/prom.h>
21#include <asm/io.h> 14#include <asm/io.h>
22#include <asm/sstate.h>
23#include <asm/reboot.h>
24
25#include <linux/unistd.h>
26
27/*
28 * sysctl - toggle power-off restriction for serial console
29 * systems in machine_power_off()
30 */
31int scons_pwroff = 1;
32 15
33static void __iomem *power_reg; 16static void __iomem *power_reg;
34 17
@@ -40,31 +23,6 @@ static irqreturn_t power_handler(int irq, void *dev_id)
40 return IRQ_HANDLED; 23 return IRQ_HANDLED;
41} 24}
42 25
43static void (*poweroff_method)(void) = machine_alt_power_off;
44
45void machine_power_off(void)
46{
47 sstate_poweroff();
48 if (strcmp(of_console_device->type, "serial") || scons_pwroff) {
49 if (power_reg) {
50 /* Both register bits seem to have the
51 * same effect, so until I figure out
52 * what the difference is...
53 */
54 writel(AUXIO_PCIO_CPWR_OFF | AUXIO_PCIO_SPWR_OFF, power_reg);
55 } else {
56 if (poweroff_method != NULL) {
57 poweroff_method();
58 /* not reached */
59 }
60 }
61 }
62 machine_halt();
63}
64
65void (*pm_power_off)(void) = machine_power_off;
66EXPORT_SYMBOL(pm_power_off);
67
68static int __init has_button_interrupt(unsigned int irq, struct device_node *dp) 26static int __init has_button_interrupt(unsigned int irq, struct device_node *dp)
69{ 27{
70 if (irq == 0xffffffff) 28 if (irq == 0xffffffff)
@@ -85,8 +43,6 @@ static int __devinit power_probe(struct of_device *op, const struct of_device_id
85 printk(KERN_INFO "%s: Control reg at %lx\n", 43 printk(KERN_INFO "%s: Control reg at %lx\n",
86 op->node->name, res->start); 44 op->node->name, res->start);
87 45
88 poweroff_method = machine_halt; /* able to use the standard halt */
89
90 if (has_button_interrupt(irq, op->node)) { 46 if (has_button_interrupt(irq, op->node)) {
91 if (request_irq(irq, 47 if (request_irq(irq,
92 power_handler, 0, "power", NULL) < 0) 48 power_handler, 0, "power", NULL) < 0)
@@ -96,7 +52,7 @@ static int __devinit power_probe(struct of_device *op, const struct of_device_id
96 return 0; 52 return 0;
97} 53}
98 54
99static struct of_device_id power_match[] = { 55static struct of_device_id __initdata power_match[] = {
100 { 56 {
101 .name = "power", 57 .name = "power",
102 }, 58 },
@@ -111,8 +67,9 @@ static struct of_platform_driver power_driver = {
111 }, 67 },
112}; 68};
113 69
114void __init power_init(void) 70static int __init power_init(void)
115{ 71{
116 of_register_driver(&power_driver, &of_platform_bus_type); 72 return of_register_driver(&power_driver, &of_platform_bus_type);
117 return;
118} 73}
74
75device_initcall(power_init);
diff --git a/arch/sparc64/kernel/process.c b/arch/sparc64/kernel/process.c
index 15f4178592e7..11bb6c4612de 100644
--- a/arch/sparc64/kernel/process.c
+++ b/arch/sparc64/kernel/process.c
@@ -22,7 +22,6 @@
22#include <linux/ptrace.h> 22#include <linux/ptrace.h>
23#include <linux/slab.h> 23#include <linux/slab.h>
24#include <linux/user.h> 24#include <linux/user.h>
25#include <linux/reboot.h>
26#include <linux/delay.h> 25#include <linux/delay.h>
27#include <linux/compat.h> 26#include <linux/compat.h>
28#include <linux/tick.h> 27#include <linux/tick.h>
@@ -31,7 +30,6 @@
31#include <linux/elfcore.h> 30#include <linux/elfcore.h>
32#include <linux/sysrq.h> 31#include <linux/sysrq.h>
33 32
34#include <asm/oplib.h>
35#include <asm/uaccess.h> 33#include <asm/uaccess.h>
36#include <asm/system.h> 34#include <asm/system.h>
37#include <asm/page.h> 35#include <asm/page.h>
@@ -46,8 +44,6 @@
46#include <asm/mmu_context.h> 44#include <asm/mmu_context.h>
47#include <asm/unistd.h> 45#include <asm/unistd.h>
48#include <asm/hypervisor.h> 46#include <asm/hypervisor.h>
49#include <asm/sstate.h>
50#include <asm/reboot.h>
51#include <asm/syscalls.h> 47#include <asm/syscalls.h>
52#include <asm/irq_regs.h> 48#include <asm/irq_regs.h>
53#include <asm/smp.h> 49#include <asm/smp.h>
@@ -115,35 +111,6 @@ void cpu_idle(void)
115 } 111 }
116} 112}
117 113
118void machine_halt(void)
119{
120 sstate_halt();
121 prom_halt();
122 panic("Halt failed!");
123}
124
125void machine_alt_power_off(void)
126{
127 sstate_poweroff();
128 prom_halt_power_off();
129 panic("Power-off failed!");
130}
131
132void machine_restart(char * cmd)
133{
134 char *p;
135
136 sstate_reboot();
137 p = strchr (reboot_command, '\n');
138 if (p) *p = 0;
139 if (cmd)
140 prom_reboot(cmd);
141 if (*reboot_command)
142 prom_reboot(reboot_command);
143 prom_reboot("");
144 panic("Reboot failed!");
145}
146
147#ifdef CONFIG_COMPAT 114#ifdef CONFIG_COMPAT
148static void show_regwindow32(struct pt_regs *regs) 115static void show_regwindow32(struct pt_regs *regs)
149{ 116{
diff --git a/arch/sparc64/kernel/prom.c b/arch/sparc64/kernel/prom.c
index 3c048ac4e638..922dd612612e 100644
--- a/arch/sparc64/kernel/prom.c
+++ b/arch/sparc64/kernel/prom.c
@@ -59,6 +59,9 @@ int of_getintprop_default(struct device_node *np, const char *name, int def)
59} 59}
60EXPORT_SYMBOL(of_getintprop_default); 60EXPORT_SYMBOL(of_getintprop_default);
61 61
62DEFINE_MUTEX(of_set_property_mutex);
63EXPORT_SYMBOL(of_set_property_mutex);
64
62int of_set_property(struct device_node *dp, const char *name, void *val, int len) 65int of_set_property(struct device_node *dp, const char *name, void *val, int len)
63{ 66{
64 struct property **prevp; 67 struct property **prevp;
@@ -82,7 +85,10 @@ int of_set_property(struct device_node *dp, const char *name, void *val, int len
82 void *old_val = prop->value; 85 void *old_val = prop->value;
83 int ret; 86 int ret;
84 87
88 mutex_lock(&of_set_property_mutex);
85 ret = prom_setprop(dp->node, name, val, len); 89 ret = prom_setprop(dp->node, name, val, len);
90 mutex_unlock(&of_set_property_mutex);
91
86 err = -EINVAL; 92 err = -EINVAL;
87 if (ret >= 0) { 93 if (ret >= 0) {
88 prop->value = new_val; 94 prop->value = new_val;
diff --git a/arch/sparc64/kernel/ptrace.c b/arch/sparc64/kernel/ptrace.c
index bd578cc4856d..db2ddf2e829e 100644
--- a/arch/sparc64/kernel/ptrace.c
+++ b/arch/sparc64/kernel/ptrace.c
@@ -1050,31 +1050,17 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
1050 return ret; 1050 return ret;
1051} 1051}
1052 1052
1053asmlinkage int syscall_trace(struct pt_regs *regs, int syscall_exit_p) 1053asmlinkage int syscall_trace_enter(struct pt_regs *regs)
1054{ 1054{
1055 int ret = 0; 1055 int ret = 0;
1056 1056
1057 /* do the secure computing check first */ 1057 /* do the secure computing check first */
1058 secure_computing(regs->u_regs[UREG_G1]); 1058 secure_computing(regs->u_regs[UREG_G1]);
1059 1059
1060 if (unlikely(current->audit_context) && syscall_exit_p) { 1060 if (test_thread_flag(TIF_SYSCALL_TRACE))
1061 unsigned long tstate = regs->tstate; 1061 ret = tracehook_report_syscall_entry(regs);
1062 int result = AUDITSC_SUCCESS;
1063
1064 if (unlikely(tstate & (TSTATE_XCARRY | TSTATE_ICARRY)))
1065 result = AUDITSC_FAILURE;
1066
1067 audit_syscall_exit(result, regs->u_regs[UREG_I0]);
1068 }
1069
1070 if (test_thread_flag(TIF_SYSCALL_TRACE)) {
1071 if (syscall_exit_p)
1072 tracehook_report_syscall_exit(regs, 0);
1073 else
1074 ret = tracehook_report_syscall_entry(regs);
1075 }
1076 1062
1077 if (unlikely(current->audit_context) && !syscall_exit_p && !ret) 1063 if (unlikely(current->audit_context) && !ret)
1078 audit_syscall_entry((test_thread_flag(TIF_32BIT) ? 1064 audit_syscall_entry((test_thread_flag(TIF_32BIT) ?
1079 AUDIT_ARCH_SPARC : 1065 AUDIT_ARCH_SPARC :
1080 AUDIT_ARCH_SPARC64), 1066 AUDIT_ARCH_SPARC64),
@@ -1086,3 +1072,19 @@ asmlinkage int syscall_trace(struct pt_regs *regs, int syscall_exit_p)
1086 1072
1087 return ret; 1073 return ret;
1088} 1074}
1075
1076asmlinkage void syscall_trace_leave(struct pt_regs *regs)
1077{
1078 if (unlikely(current->audit_context)) {
1079 unsigned long tstate = regs->tstate;
1080 int result = AUDITSC_SUCCESS;
1081
1082 if (unlikely(tstate & (TSTATE_XCARRY | TSTATE_ICARRY)))
1083 result = AUDITSC_FAILURE;
1084
1085 audit_syscall_exit(result, regs->u_regs[UREG_I0]);
1086 }
1087
1088 if (test_thread_flag(TIF_SYSCALL_TRACE))
1089 tracehook_report_syscall_exit(regs, 0);
1090}
diff --git a/arch/sparc64/kernel/reboot.c b/arch/sparc64/kernel/reboot.c
new file mode 100644
index 000000000000..11f249660630
--- /dev/null
+++ b/arch/sparc64/kernel/reboot.c
@@ -0,0 +1,52 @@
1/* reboot.c: reboot/shutdown/halt/poweroff handling
2 *
3 * Copyright (C) 2008 David S. Miller <davem@davemloft.net>
4 */
5#include <linux/kernel.h>
6#include <linux/reboot.h>
7#include <linux/module.h>
8#include <linux/pm.h>
9
10#include <asm/oplib.h>
11#include <asm/prom.h>
12
13/* sysctl - toggle power-off restriction for serial console
14 * systems in machine_power_off()
15 */
16int scons_pwroff = 1;
17
18/* This isn't actually used, it exists merely to satisfy the
19 * reference in kernel/sys.c
20 */
21void (*pm_power_off)(void) = machine_power_off;
22EXPORT_SYMBOL(pm_power_off);
23
24void machine_power_off(void)
25{
26 if (strcmp(of_console_device->type, "serial") || scons_pwroff)
27 prom_halt_power_off();
28
29 prom_halt();
30}
31
32void machine_halt(void)
33{
34 prom_halt();
35 panic("Halt failed!");
36}
37
38void machine_restart(char *cmd)
39{
40 char *p;
41
42 p = strchr(reboot_command, '\n');
43 if (p)
44 *p = 0;
45 if (cmd)
46 prom_reboot(cmd);
47 if (*reboot_command)
48 prom_reboot(reboot_command);
49 prom_reboot("");
50 panic("Reboot failed!");
51}
52
diff --git a/arch/sparc64/kernel/sbus.c b/arch/sparc64/kernel/sbus.c
index e33a8a660e9e..2ead310066d1 100644
--- a/arch/sparc64/kernel/sbus.c
+++ b/arch/sparc64/kernel/sbus.c
@@ -11,15 +11,17 @@
11#include <linux/slab.h> 11#include <linux/slab.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/interrupt.h> 13#include <linux/interrupt.h>
14#include <linux/of.h>
15#include <linux/of_device.h>
14 16
15#include <asm/page.h> 17#include <asm/page.h>
16#include <asm/sbus.h>
17#include <asm/io.h> 18#include <asm/io.h>
18#include <asm/upa.h> 19#include <asm/upa.h>
19#include <asm/cache.h> 20#include <asm/cache.h>
20#include <asm/dma.h> 21#include <asm/dma.h>
21#include <asm/irq.h> 22#include <asm/irq.h>
22#include <asm/prom.h> 23#include <asm/prom.h>
24#include <asm/oplib.h>
23#include <asm/starfire.h> 25#include <asm/starfire.h>
24 26
25#include "iommu_common.h" 27#include "iommu_common.h"
@@ -52,13 +54,23 @@
52#define STRBUF_TAG_VALID 0x02UL 54#define STRBUF_TAG_VALID 0x02UL
53 55
54/* Enable 64-bit DVMA mode for the given device. */ 56/* Enable 64-bit DVMA mode for the given device. */
55void sbus_set_sbus64(struct sbus_dev *sdev, int bursts) 57void sbus_set_sbus64(struct device *dev, int bursts)
56{ 58{
57 struct iommu *iommu = sdev->ofdev.dev.archdata.iommu; 59 struct iommu *iommu = dev->archdata.iommu;
58 int slot = sdev->slot; 60 struct of_device *op = to_of_device(dev);
61 const struct linux_prom_registers *regs;
59 unsigned long cfg_reg; 62 unsigned long cfg_reg;
63 int slot;
60 u64 val; 64 u64 val;
61 65
66 regs = of_get_property(op->node, "reg", NULL);
67 if (!regs) {
68 printk(KERN_ERR "sbus_set_sbus64: Cannot find regs for %s\n",
69 op->node->full_name);
70 return;
71 }
72 slot = regs->which_io;
73
62 cfg_reg = iommu->write_complete_reg; 74 cfg_reg = iommu->write_complete_reg;
63 switch (slot) { 75 switch (slot) {
64 case 0: 76 case 0:
@@ -191,10 +203,9 @@ static unsigned long sysio_imap_to_iclr(unsigned long imap)
191 return imap + diff; 203 return imap + diff;
192} 204}
193 205
194unsigned int sbus_build_irq(void *buscookie, unsigned int ino) 206static unsigned int sbus_build_irq(struct of_device *op, unsigned int ino)
195{ 207{
196 struct sbus_bus *sbus = (struct sbus_bus *)buscookie; 208 struct iommu *iommu = op->dev.archdata.iommu;
197 struct iommu *iommu = sbus->ofdev.dev.archdata.iommu;
198 unsigned long reg_base = iommu->write_complete_reg - 0x2000UL; 209 unsigned long reg_base = iommu->write_complete_reg - 0x2000UL;
199 unsigned long imap, iclr; 210 unsigned long imap, iclr;
200 int sbus_level = 0; 211 int sbus_level = 0;
@@ -255,12 +266,12 @@ unsigned int sbus_build_irq(void *buscookie, unsigned int ino)
255#define SYSIO_UEAFSR_RESV2 0x0000001fffffffffUL /* Reserved */ 266#define SYSIO_UEAFSR_RESV2 0x0000001fffffffffUL /* Reserved */
256static irqreturn_t sysio_ue_handler(int irq, void *dev_id) 267static irqreturn_t sysio_ue_handler(int irq, void *dev_id)
257{ 268{
258 struct sbus_bus *sbus = dev_id; 269 struct of_device *op = dev_id;
259 struct iommu *iommu = sbus->ofdev.dev.archdata.iommu; 270 struct iommu *iommu = op->dev.archdata.iommu;
260 unsigned long reg_base = iommu->write_complete_reg - 0x2000UL; 271 unsigned long reg_base = iommu->write_complete_reg - 0x2000UL;
261 unsigned long afsr_reg, afar_reg; 272 unsigned long afsr_reg, afar_reg;
262 unsigned long afsr, afar, error_bits; 273 unsigned long afsr, afar, error_bits;
263 int reported; 274 int reported, portid;
264 275
265 afsr_reg = reg_base + SYSIO_UE_AFSR; 276 afsr_reg = reg_base + SYSIO_UE_AFSR;
266 afar_reg = reg_base + SYSIO_UE_AFAR; 277 afar_reg = reg_base + SYSIO_UE_AFAR;
@@ -275,9 +286,11 @@ static irqreturn_t sysio_ue_handler(int irq, void *dev_id)
275 SYSIO_UEAFSR_SPIO | SYSIO_UEAFSR_SDRD | SYSIO_UEAFSR_SDWR); 286 SYSIO_UEAFSR_SPIO | SYSIO_UEAFSR_SDRD | SYSIO_UEAFSR_SDWR);
276 upa_writeq(error_bits, afsr_reg); 287 upa_writeq(error_bits, afsr_reg);
277 288
289 portid = of_getintprop_default(op->node, "portid", -1);
290
278 /* Log the error. */ 291 /* Log the error. */
279 printk("SYSIO[%x]: Uncorrectable ECC Error, primary error type[%s]\n", 292 printk("SYSIO[%x]: Uncorrectable ECC Error, primary error type[%s]\n",
280 sbus->portid, 293 portid,
281 (((error_bits & SYSIO_UEAFSR_PPIO) ? 294 (((error_bits & SYSIO_UEAFSR_PPIO) ?
282 "PIO" : 295 "PIO" :
283 ((error_bits & SYSIO_UEAFSR_PDRD) ? 296 ((error_bits & SYSIO_UEAFSR_PDRD) ?
@@ -285,12 +298,12 @@ static irqreturn_t sysio_ue_handler(int irq, void *dev_id)
285 ((error_bits & SYSIO_UEAFSR_PDWR) ? 298 ((error_bits & SYSIO_UEAFSR_PDWR) ?
286 "DVMA Write" : "???"))))); 299 "DVMA Write" : "???")))));
287 printk("SYSIO[%x]: DOFF[%lx] SIZE[%lx] MID[%lx]\n", 300 printk("SYSIO[%x]: DOFF[%lx] SIZE[%lx] MID[%lx]\n",
288 sbus->portid, 301 portid,
289 (afsr & SYSIO_UEAFSR_DOFF) >> 45UL, 302 (afsr & SYSIO_UEAFSR_DOFF) >> 45UL,
290 (afsr & SYSIO_UEAFSR_SIZE) >> 42UL, 303 (afsr & SYSIO_UEAFSR_SIZE) >> 42UL,
291 (afsr & SYSIO_UEAFSR_MID) >> 37UL); 304 (afsr & SYSIO_UEAFSR_MID) >> 37UL);
292 printk("SYSIO[%x]: AFAR[%016lx]\n", sbus->portid, afar); 305 printk("SYSIO[%x]: AFAR[%016lx]\n", portid, afar);
293 printk("SYSIO[%x]: Secondary UE errors [", sbus->portid); 306 printk("SYSIO[%x]: Secondary UE errors [", portid);
294 reported = 0; 307 reported = 0;
295 if (afsr & SYSIO_UEAFSR_SPIO) { 308 if (afsr & SYSIO_UEAFSR_SPIO) {
296 reported++; 309 reported++;
@@ -327,12 +340,12 @@ static irqreturn_t sysio_ue_handler(int irq, void *dev_id)
327#define SYSIO_CEAFSR_RESV2 0x0000001fffffffffUL /* Reserved */ 340#define SYSIO_CEAFSR_RESV2 0x0000001fffffffffUL /* Reserved */
328static irqreturn_t sysio_ce_handler(int irq, void *dev_id) 341static irqreturn_t sysio_ce_handler(int irq, void *dev_id)
329{ 342{
330 struct sbus_bus *sbus = dev_id; 343 struct of_device *op = dev_id;
331 struct iommu *iommu = sbus->ofdev.dev.archdata.iommu; 344 struct iommu *iommu = op->dev.archdata.iommu;
332 unsigned long reg_base = iommu->write_complete_reg - 0x2000UL; 345 unsigned long reg_base = iommu->write_complete_reg - 0x2000UL;
333 unsigned long afsr_reg, afar_reg; 346 unsigned long afsr_reg, afar_reg;
334 unsigned long afsr, afar, error_bits; 347 unsigned long afsr, afar, error_bits;
335 int reported; 348 int reported, portid;
336 349
337 afsr_reg = reg_base + SYSIO_CE_AFSR; 350 afsr_reg = reg_base + SYSIO_CE_AFSR;
338 afar_reg = reg_base + SYSIO_CE_AFAR; 351 afar_reg = reg_base + SYSIO_CE_AFAR;
@@ -347,8 +360,10 @@ static irqreturn_t sysio_ce_handler(int irq, void *dev_id)
347 SYSIO_CEAFSR_SPIO | SYSIO_CEAFSR_SDRD | SYSIO_CEAFSR_SDWR); 360 SYSIO_CEAFSR_SPIO | SYSIO_CEAFSR_SDRD | SYSIO_CEAFSR_SDWR);
348 upa_writeq(error_bits, afsr_reg); 361 upa_writeq(error_bits, afsr_reg);
349 362
363 portid = of_getintprop_default(op->node, "portid", -1);
364
350 printk("SYSIO[%x]: Correctable ECC Error, primary error type[%s]\n", 365 printk("SYSIO[%x]: Correctable ECC Error, primary error type[%s]\n",
351 sbus->portid, 366 portid,
352 (((error_bits & SYSIO_CEAFSR_PPIO) ? 367 (((error_bits & SYSIO_CEAFSR_PPIO) ?
353 "PIO" : 368 "PIO" :
354 ((error_bits & SYSIO_CEAFSR_PDRD) ? 369 ((error_bits & SYSIO_CEAFSR_PDRD) ?
@@ -360,14 +375,14 @@ static irqreturn_t sysio_ce_handler(int irq, void *dev_id)
360 * XXX UDB CE trap handler does... -DaveM 375 * XXX UDB CE trap handler does... -DaveM
361 */ 376 */
362 printk("SYSIO[%x]: DOFF[%lx] ECC Syndrome[%lx] Size[%lx] MID[%lx]\n", 377 printk("SYSIO[%x]: DOFF[%lx] ECC Syndrome[%lx] Size[%lx] MID[%lx]\n",
363 sbus->portid, 378 portid,
364 (afsr & SYSIO_CEAFSR_DOFF) >> 45UL, 379 (afsr & SYSIO_CEAFSR_DOFF) >> 45UL,
365 (afsr & SYSIO_CEAFSR_ESYND) >> 48UL, 380 (afsr & SYSIO_CEAFSR_ESYND) >> 48UL,
366 (afsr & SYSIO_CEAFSR_SIZE) >> 42UL, 381 (afsr & SYSIO_CEAFSR_SIZE) >> 42UL,
367 (afsr & SYSIO_CEAFSR_MID) >> 37UL); 382 (afsr & SYSIO_CEAFSR_MID) >> 37UL);
368 printk("SYSIO[%x]: AFAR[%016lx]\n", sbus->portid, afar); 383 printk("SYSIO[%x]: AFAR[%016lx]\n", portid, afar);
369 384
370 printk("SYSIO[%x]: Secondary CE errors [", sbus->portid); 385 printk("SYSIO[%x]: Secondary CE errors [", portid);
371 reported = 0; 386 reported = 0;
372 if (afsr & SYSIO_CEAFSR_SPIO) { 387 if (afsr & SYSIO_CEAFSR_SPIO) {
373 reported++; 388 reported++;
@@ -404,11 +419,11 @@ static irqreturn_t sysio_ce_handler(int irq, void *dev_id)
404#define SYSIO_SBAFSR_RESV3 0x0000001fffffffffUL /* Reserved */ 419#define SYSIO_SBAFSR_RESV3 0x0000001fffffffffUL /* Reserved */
405static irqreturn_t sysio_sbus_error_handler(int irq, void *dev_id) 420static irqreturn_t sysio_sbus_error_handler(int irq, void *dev_id)
406{ 421{
407 struct sbus_bus *sbus = dev_id; 422 struct of_device *op = dev_id;
408 struct iommu *iommu = sbus->ofdev.dev.archdata.iommu; 423 struct iommu *iommu = op->dev.archdata.iommu;
409 unsigned long afsr_reg, afar_reg, reg_base; 424 unsigned long afsr_reg, afar_reg, reg_base;
410 unsigned long afsr, afar, error_bits; 425 unsigned long afsr, afar, error_bits;
411 int reported; 426 int reported, portid;
412 427
413 reg_base = iommu->write_complete_reg - 0x2000UL; 428 reg_base = iommu->write_complete_reg - 0x2000UL;
414 afsr_reg = reg_base + SYSIO_SBUS_AFSR; 429 afsr_reg = reg_base + SYSIO_SBUS_AFSR;
@@ -423,9 +438,11 @@ static irqreturn_t sysio_sbus_error_handler(int irq, void *dev_id)
423 SYSIO_SBAFSR_SLE | SYSIO_SBAFSR_STO | SYSIO_SBAFSR_SBERR); 438 SYSIO_SBAFSR_SLE | SYSIO_SBAFSR_STO | SYSIO_SBAFSR_SBERR);
424 upa_writeq(error_bits, afsr_reg); 439 upa_writeq(error_bits, afsr_reg);
425 440
441 portid = of_getintprop_default(op->node, "portid", -1);
442
426 /* Log the error. */ 443 /* Log the error. */
427 printk("SYSIO[%x]: SBUS Error, primary error type[%s] read(%d)\n", 444 printk("SYSIO[%x]: SBUS Error, primary error type[%s] read(%d)\n",
428 sbus->portid, 445 portid,
429 (((error_bits & SYSIO_SBAFSR_PLE) ? 446 (((error_bits & SYSIO_SBAFSR_PLE) ?
430 "Late PIO Error" : 447 "Late PIO Error" :
431 ((error_bits & SYSIO_SBAFSR_PTO) ? 448 ((error_bits & SYSIO_SBAFSR_PTO) ?
@@ -434,11 +451,11 @@ static irqreturn_t sysio_sbus_error_handler(int irq, void *dev_id)
434 "Error Ack" : "???")))), 451 "Error Ack" : "???")))),
435 (afsr & SYSIO_SBAFSR_RD) ? 1 : 0); 452 (afsr & SYSIO_SBAFSR_RD) ? 1 : 0);
436 printk("SYSIO[%x]: size[%lx] MID[%lx]\n", 453 printk("SYSIO[%x]: size[%lx] MID[%lx]\n",
437 sbus->portid, 454 portid,
438 (afsr & SYSIO_SBAFSR_SIZE) >> 42UL, 455 (afsr & SYSIO_SBAFSR_SIZE) >> 42UL,
439 (afsr & SYSIO_SBAFSR_MID) >> 37UL); 456 (afsr & SYSIO_SBAFSR_MID) >> 37UL);
440 printk("SYSIO[%x]: AFAR[%016lx]\n", sbus->portid, afar); 457 printk("SYSIO[%x]: AFAR[%016lx]\n", portid, afar);
441 printk("SYSIO[%x]: Secondary SBUS errors [", sbus->portid); 458 printk("SYSIO[%x]: Secondary SBUS errors [", portid);
442 reported = 0; 459 reported = 0;
443 if (afsr & SYSIO_SBAFSR_SLE) { 460 if (afsr & SYSIO_SBAFSR_SLE) {
444 reported++; 461 reported++;
@@ -470,34 +487,37 @@ static irqreturn_t sysio_sbus_error_handler(int irq, void *dev_id)
470#define SYSIO_CE_INO 0x35 487#define SYSIO_CE_INO 0x35
471#define SYSIO_SBUSERR_INO 0x36 488#define SYSIO_SBUSERR_INO 0x36
472 489
473static void __init sysio_register_error_handlers(struct sbus_bus *sbus) 490static void __init sysio_register_error_handlers(struct of_device *op)
474{ 491{
475 struct iommu *iommu = sbus->ofdev.dev.archdata.iommu; 492 struct iommu *iommu = op->dev.archdata.iommu;
476 unsigned long reg_base = iommu->write_complete_reg - 0x2000UL; 493 unsigned long reg_base = iommu->write_complete_reg - 0x2000UL;
477 unsigned int irq; 494 unsigned int irq;
478 u64 control; 495 u64 control;
496 int portid;
497
498 portid = of_getintprop_default(op->node, "portid", -1);
479 499
480 irq = sbus_build_irq(sbus, SYSIO_UE_INO); 500 irq = sbus_build_irq(op, SYSIO_UE_INO);
481 if (request_irq(irq, sysio_ue_handler, 0, 501 if (request_irq(irq, sysio_ue_handler, 0,
482 "SYSIO_UE", sbus) < 0) { 502 "SYSIO_UE", op) < 0) {
483 prom_printf("SYSIO[%x]: Cannot register UE interrupt.\n", 503 prom_printf("SYSIO[%x]: Cannot register UE interrupt.\n",
484 sbus->portid); 504 portid);
485 prom_halt(); 505 prom_halt();
486 } 506 }
487 507
488 irq = sbus_build_irq(sbus, SYSIO_CE_INO); 508 irq = sbus_build_irq(op, SYSIO_CE_INO);
489 if (request_irq(irq, sysio_ce_handler, 0, 509 if (request_irq(irq, sysio_ce_handler, 0,
490 "SYSIO_CE", sbus) < 0) { 510 "SYSIO_CE", op) < 0) {
491 prom_printf("SYSIO[%x]: Cannot register CE interrupt.\n", 511 prom_printf("SYSIO[%x]: Cannot register CE interrupt.\n",
492 sbus->portid); 512 portid);
493 prom_halt(); 513 prom_halt();
494 } 514 }
495 515
496 irq = sbus_build_irq(sbus, SYSIO_SBUSERR_INO); 516 irq = sbus_build_irq(op, SYSIO_SBUSERR_INO);
497 if (request_irq(irq, sysio_sbus_error_handler, 0, 517 if (request_irq(irq, sysio_sbus_error_handler, 0,
498 "SYSIO_SBERR", sbus) < 0) { 518 "SYSIO_SBERR", op) < 0) {
499 prom_printf("SYSIO[%x]: Cannot register SBUS Error interrupt.\n", 519 prom_printf("SYSIO[%x]: Cannot register SBUS Error interrupt.\n",
500 sbus->portid); 520 portid);
501 prom_halt(); 521 prom_halt();
502 } 522 }
503 523
@@ -513,19 +533,15 @@ static void __init sysio_register_error_handlers(struct sbus_bus *sbus)
513} 533}
514 534
515/* Boot time initialization. */ 535/* Boot time initialization. */
516static void __init sbus_iommu_init(int __node, struct sbus_bus *sbus) 536static void __init sbus_iommu_init(struct of_device *op)
517{ 537{
518 const struct linux_prom64_registers *pr; 538 const struct linux_prom64_registers *pr;
519 struct device_node *dp; 539 struct device_node *dp = op->node;
520 struct iommu *iommu; 540 struct iommu *iommu;
521 struct strbuf *strbuf; 541 struct strbuf *strbuf;
522 unsigned long regs, reg_base; 542 unsigned long regs, reg_base;
543 int i, portid;
523 u64 control; 544 u64 control;
524 int i;
525
526 dp = of_find_node_by_phandle(__node);
527
528 sbus->portid = of_getintprop_default(dp, "upa-portid", -1);
529 545
530 pr = of_get_property(dp, "reg", NULL); 546 pr = of_get_property(dp, "reg", NULL);
531 if (!pr) { 547 if (!pr) {
@@ -542,9 +558,9 @@ static void __init sbus_iommu_init(int __node, struct sbus_bus *sbus)
542 if (!strbuf) 558 if (!strbuf)
543 goto fatal_memory_error; 559 goto fatal_memory_error;
544 560
545 sbus->ofdev.dev.archdata.iommu = iommu; 561 op->dev.archdata.iommu = iommu;
546 sbus->ofdev.dev.archdata.stc = strbuf; 562 op->dev.archdata.stc = strbuf;
547 sbus->ofdev.dev.archdata.numa_node = -1; 563 op->dev.archdata.numa_node = -1;
548 564
549 reg_base = regs + SYSIO_IOMMUREG_BASE; 565 reg_base = regs + SYSIO_IOMMUREG_BASE;
550 iommu->iommu_control = reg_base + IOMMU_CONTROL; 566 iommu->iommu_control = reg_base + IOMMU_CONTROL;
@@ -572,8 +588,9 @@ static void __init sbus_iommu_init(int __node, struct sbus_bus *sbus)
572 */ 588 */
573 iommu->write_complete_reg = regs + 0x2000UL; 589 iommu->write_complete_reg = regs + 0x2000UL;
574 590
575 printk("SYSIO: UPA portID %x, at %016lx\n", 591 portid = of_getintprop_default(op->node, "portid", -1);
576 sbus->portid, regs); 592 printk(KERN_INFO "SYSIO: UPA portID %x, at %016lx\n",
593 portid, regs);
577 594
578 /* Setup for TSB_SIZE=7, TBW_SIZE=0, MMU_DE=1, MMU_EN=1 */ 595 /* Setup for TSB_SIZE=7, TBW_SIZE=0, MMU_DE=1, MMU_EN=1 */
579 if (iommu_table_init(iommu, IO_TSB_SIZE, MAP_BASE, 0xffffffff, -1)) 596 if (iommu_table_init(iommu, IO_TSB_SIZE, MAP_BASE, 0xffffffff, -1))
@@ -631,56 +648,27 @@ static void __init sbus_iommu_init(int __node, struct sbus_bus *sbus)
631 648
632 /* Now some Xfire specific grot... */ 649 /* Now some Xfire specific grot... */
633 if (this_is_starfire) 650 if (this_is_starfire)
634 starfire_hookup(sbus->portid); 651 starfire_hookup(portid);
635 652
636 sysio_register_error_handlers(sbus); 653 sysio_register_error_handlers(op);
637 return; 654 return;
638 655
639fatal_memory_error: 656fatal_memory_error:
640 prom_printf("sbus_iommu_init: Fatal memory allocation error.\n"); 657 prom_printf("sbus_iommu_init: Fatal memory allocation error.\n");
641} 658}
642 659
643void sbus_fill_device_irq(struct sbus_dev *sdev) 660static int __init sbus_init(void)
644{ 661{
645 struct device_node *dp = of_find_node_by_phandle(sdev->prom_node); 662 struct device_node *dp;
646 const struct linux_prom_irqs *irqs;
647
648 irqs = of_get_property(dp, "interrupts", NULL);
649 if (!irqs) {
650 sdev->irqs[0] = 0;
651 sdev->num_irqs = 0;
652 } else {
653 unsigned int pri = irqs[0].pri;
654 663
655 sdev->num_irqs = 1; 664 for_each_node_by_name(dp, "sbus") {
656 if (pri < 0x20) 665 struct of_device *op = of_find_device_by_node(dp);
657 pri += sdev->slot * 8;
658 666
659 sdev->irqs[0] = sbus_build_irq(sdev->bus, pri); 667 sbus_iommu_init(op);
668 of_propagate_archdata(op);
660 } 669 }
661}
662 670
663void __init sbus_arch_bus_ranges_init(struct device_node *pn, struct sbus_bus *sbus)
664{
665}
666
667void __init sbus_setup_iommu(struct sbus_bus *sbus, struct device_node *dp)
668{
669 sbus_iommu_init(dp->node, sbus);
670}
671
672void __init sbus_setup_arch_props(struct sbus_bus *sbus, struct device_node *dp)
673{
674}
675
676int __init sbus_arch_preinit(void)
677{
678 return 0; 671 return 0;
679} 672}
680 673
681void __init sbus_arch_postinit(void) 674subsys_initcall(sbus_init);
682{
683 extern void firetruck_init(void);
684
685 firetruck_init();
686}
diff --git a/arch/sparc64/kernel/sparc64_ksyms.c b/arch/sparc64/kernel/sparc64_ksyms.c
index 0804f71df6cb..30bba8b0a3b0 100644
--- a/arch/sparc64/kernel/sparc64_ksyms.c
+++ b/arch/sparc64/kernel/sparc64_ksyms.c
@@ -36,7 +36,6 @@
36#include <asm/elf.h> 36#include <asm/elf.h>
37#include <asm/head.h> 37#include <asm/head.h>
38#include <asm/smp.h> 38#include <asm/smp.h>
39#include <asm/mostek.h>
40#include <asm/ptrace.h> 39#include <asm/ptrace.h>
41#include <asm/uaccess.h> 40#include <asm/uaccess.h>
42#include <asm/checksum.h> 41#include <asm/checksum.h>
@@ -44,12 +43,8 @@
44#include <asm/pgalloc.h> 43#include <asm/pgalloc.h>
45#include <asm/cacheflush.h> 44#include <asm/cacheflush.h>
46#ifdef CONFIG_SBUS 45#ifdef CONFIG_SBUS
47#include <asm/sbus.h>
48#include <asm/dma.h> 46#include <asm/dma.h>
49#endif 47#endif
50#ifdef CONFIG_PCI
51#include <asm/ebus.h>
52#endif
53#include <asm/ns87303.h> 48#include <asm/ns87303.h>
54#include <asm/timer.h> 49#include <asm/timer.h>
55#include <asm/cpudata.h> 50#include <asm/cpudata.h>
@@ -68,7 +63,6 @@ extern void *__memscan_zero(void *, size_t);
68extern void *__memscan_generic(void *, int, size_t); 63extern void *__memscan_generic(void *, int, size_t);
69extern int __memcmp(const void *, const void *, __kernel_size_t); 64extern int __memcmp(const void *, const void *, __kernel_size_t);
70extern __kernel_size_t strlen(const char *); 65extern __kernel_size_t strlen(const char *);
71extern void syscall_trace(struct pt_regs *, int);
72extern void sys_sigsuspend(void); 66extern void sys_sigsuspend(void);
73extern int compat_sys_ioctl(unsigned int fd, unsigned int cmd, u32 arg); 67extern int compat_sys_ioctl(unsigned int fd, unsigned int cmd, u32 arg);
74extern int (*handle_mathemu)(struct pt_regs *, struct fpustate *); 68extern int (*handle_mathemu)(struct pt_regs *, struct fpustate *);
@@ -154,26 +148,12 @@ EXPORT_SYMBOL(flush_dcache_page);
154EXPORT_SYMBOL(__flush_dcache_range); 148EXPORT_SYMBOL(__flush_dcache_range);
155#endif 149#endif
156 150
157EXPORT_SYMBOL(mostek_lock);
158EXPORT_SYMBOL(mstk48t02_regs);
159#ifdef CONFIG_SUN_AUXIO 151#ifdef CONFIG_SUN_AUXIO
160EXPORT_SYMBOL(auxio_set_led); 152EXPORT_SYMBOL(auxio_set_led);
161EXPORT_SYMBOL(auxio_set_lte); 153EXPORT_SYMBOL(auxio_set_lte);
162#endif 154#endif
163#ifdef CONFIG_SBUS 155#ifdef CONFIG_SBUS
164EXPORT_SYMBOL(sbus_root);
165EXPORT_SYMBOL(dma_chain);
166EXPORT_SYMBOL(sbus_set_sbus64); 156EXPORT_SYMBOL(sbus_set_sbus64);
167EXPORT_SYMBOL(sbus_alloc_consistent);
168EXPORT_SYMBOL(sbus_free_consistent);
169EXPORT_SYMBOL(sbus_map_single);
170EXPORT_SYMBOL(sbus_unmap_single);
171EXPORT_SYMBOL(sbus_map_sg);
172EXPORT_SYMBOL(sbus_unmap_sg);
173EXPORT_SYMBOL(sbus_dma_sync_single_for_cpu);
174EXPORT_SYMBOL(sbus_dma_sync_single_for_device);
175EXPORT_SYMBOL(sbus_dma_sync_sg_for_cpu);
176EXPORT_SYMBOL(sbus_dma_sync_sg_for_device);
177#endif 157#endif
178EXPORT_SYMBOL(outsb); 158EXPORT_SYMBOL(outsb);
179EXPORT_SYMBOL(outsw); 159EXPORT_SYMBOL(outsw);
@@ -182,7 +162,6 @@ EXPORT_SYMBOL(insb);
182EXPORT_SYMBOL(insw); 162EXPORT_SYMBOL(insw);
183EXPORT_SYMBOL(insl); 163EXPORT_SYMBOL(insl);
184#ifdef CONFIG_PCI 164#ifdef CONFIG_PCI
185EXPORT_SYMBOL(ebus_chain);
186EXPORT_SYMBOL(pci_alloc_consistent); 165EXPORT_SYMBOL(pci_alloc_consistent);
187EXPORT_SYMBOL(pci_free_consistent); 166EXPORT_SYMBOL(pci_free_consistent);
188EXPORT_SYMBOL(pci_map_single); 167EXPORT_SYMBOL(pci_map_single);
@@ -300,3 +279,5 @@ EXPORT_SYMBOL(xor_niagara_2);
300EXPORT_SYMBOL(xor_niagara_3); 279EXPORT_SYMBOL(xor_niagara_3);
301EXPORT_SYMBOL(xor_niagara_4); 280EXPORT_SYMBOL(xor_niagara_4);
302EXPORT_SYMBOL(xor_niagara_5); 281EXPORT_SYMBOL(xor_niagara_5);
282
283EXPORT_SYMBOL_GPL(real_hard_smp_processor_id);
diff --git a/arch/sparc64/kernel/sstate.c b/arch/sparc64/kernel/sstate.c
index 5b6e75b7f052..8cdbe5946b43 100644
--- a/arch/sparc64/kernel/sstate.c
+++ b/arch/sparc64/kernel/sstate.c
@@ -1,14 +1,15 @@
1/* sstate.c: System soft state support. 1/* sstate.c: System soft state support.
2 * 2 *
3 * Copyright (C) 2007 David S. Miller <davem@davemloft.net> 3 * Copyright (C) 2007, 2008 David S. Miller <davem@davemloft.net>
4 */ 4 */
5 5
6#include <linux/kernel.h> 6#include <linux/kernel.h>
7#include <linux/notifier.h> 7#include <linux/notifier.h>
8#include <linux/reboot.h>
8#include <linux/init.h> 9#include <linux/init.h>
9 10
10#include <asm/hypervisor.h> 11#include <asm/hypervisor.h>
11#include <asm/sstate.h> 12#include <asm/spitfire.h>
12#include <asm/oplib.h> 13#include <asm/oplib.h>
13#include <asm/head.h> 14#include <asm/head.h>
14#include <asm/io.h> 15#include <asm/io.h>
@@ -50,31 +51,34 @@ static const char rebooting_msg[32] __attribute__((aligned(32))) =
50static const char panicing_msg[32] __attribute__((aligned(32))) = 51static const char panicing_msg[32] __attribute__((aligned(32))) =
51 "Linux panicing"; 52 "Linux panicing";
52 53
53void sstate_booting(void) 54static int sstate_reboot_call(struct notifier_block *np, unsigned long type, void *_unused)
54{ 55{
55 do_set_sstate(HV_SOFT_STATE_TRANSITION, booting_msg); 56 const char *msg;
56}
57 57
58void sstate_running(void) 58 switch (type) {
59{ 59 case SYS_DOWN:
60 do_set_sstate(HV_SOFT_STATE_NORMAL, running_msg); 60 default:
61} 61 msg = rebooting_msg;
62 break;
62 63
63void sstate_halt(void) 64 case SYS_HALT:
64{ 65 msg = halting_msg;
65 do_set_sstate(HV_SOFT_STATE_TRANSITION, halting_msg); 66 break;
66}
67 67
68void sstate_poweroff(void) 68 case SYS_POWER_OFF:
69{ 69 msg = poweroff_msg;
70 do_set_sstate(HV_SOFT_STATE_TRANSITION, poweroff_msg); 70 break;
71} 71 }
72 72
73void sstate_reboot(void) 73 do_set_sstate(HV_SOFT_STATE_TRANSITION, msg);
74{ 74
75 do_set_sstate(HV_SOFT_STATE_TRANSITION, rebooting_msg); 75 return NOTIFY_OK;
76} 76}
77 77
78static struct notifier_block sstate_reboot_notifier = {
79 .notifier_call = sstate_reboot_call,
80};
81
78static int sstate_panic_event(struct notifier_block *n, unsigned long event, void *ptr) 82static int sstate_panic_event(struct notifier_block *n, unsigned long event, void *ptr)
79{ 83{
80 do_set_sstate(HV_SOFT_STATE_TRANSITION, panicing_msg); 84 do_set_sstate(HV_SOFT_STATE_TRANSITION, panicing_msg);
@@ -87,18 +91,37 @@ static struct notifier_block sstate_panic_block = {
87 .priority = INT_MAX, 91 .priority = INT_MAX,
88}; 92};
89 93
90void __init sun4v_sstate_init(void) 94static int __init sstate_init(void)
91{ 95{
92 unsigned long major, minor; 96 unsigned long major, minor;
93 97
98 if (tlb_type != hypervisor)
99 return 0;
100
94 major = 1; 101 major = 1;
95 minor = 0; 102 minor = 0;
96 if (sun4v_hvapi_register(HV_GRP_SOFT_STATE, major, &minor)) 103 if (sun4v_hvapi_register(HV_GRP_SOFT_STATE, major, &minor))
97 return; 104 return 0;
98 105
99 hv_supports_soft_state = 1; 106 hv_supports_soft_state = 1;
100 107
101 prom_sun4v_guest_soft_state(); 108 prom_sun4v_guest_soft_state();
109
110 do_set_sstate(HV_SOFT_STATE_TRANSITION, booting_msg);
111
102 atomic_notifier_chain_register(&panic_notifier_list, 112 atomic_notifier_chain_register(&panic_notifier_list,
103 &sstate_panic_block); 113 &sstate_panic_block);
114 register_reboot_notifier(&sstate_reboot_notifier);
115
116 return 0;
104} 117}
118
119core_initcall(sstate_init);
120
121static int __init sstate_running(void)
122{
123 do_set_sstate(HV_SOFT_STATE_NORMAL, running_msg);
124 return 0;
125}
126
127late_initcall(sstate_running);
diff --git a/arch/sparc64/kernel/starfire.c b/arch/sparc64/kernel/starfire.c
index 7461581b3bb9..060d0f3a6151 100644
--- a/arch/sparc64/kernel/starfire.c
+++ b/arch/sparc64/kernel/starfire.c
@@ -28,11 +28,6 @@ void check_if_starfire(void)
28 this_is_starfire = 1; 28 this_is_starfire = 1;
29} 29}
30 30
31void starfire_cpu_setup(void)
32{
33 /* Currently, nothing to do. */
34}
35
36int starfire_hard_smp_processor_id(void) 31int starfire_hard_smp_processor_id(void)
37{ 32{
38 return upa_readl(0x1fff40000d0UL); 33 return upa_readl(0x1fff40000d0UL);
diff --git a/arch/sparc64/kernel/sys_sparc32.c b/arch/sparc64/kernel/sys_sparc32.c
index 3d118531baff..3320c9d0075f 100644
--- a/arch/sparc64/kernel/sys_sparc32.c
+++ b/arch/sparc64/kernel/sys_sparc32.c
@@ -575,14 +575,6 @@ asmlinkage long sys32_settimeofday(struct compat_timeval __user *tv,
575 return do_sys_settimeofday(tv ? &kts : NULL, tz ? &ktz : NULL); 575 return do_sys_settimeofday(tv ? &kts : NULL, tz ? &ktz : NULL);
576} 576}
577 577
578/* These are here just in case some old sparc32 binary calls it. */
579asmlinkage long sys32_pause(void)
580{
581 current->state = TASK_INTERRUPTIBLE;
582 schedule();
583 return -ERESTARTNOHAND;
584}
585
586asmlinkage compat_ssize_t sys32_pread64(unsigned int fd, 578asmlinkage compat_ssize_t sys32_pread64(unsigned int fd,
587 char __user *ubuf, 579 char __user *ubuf,
588 compat_size_t count, 580 compat_size_t count,
diff --git a/arch/sparc64/kernel/syscalls.S b/arch/sparc64/kernel/syscalls.S
index a2f24270ed8a..7a6786a71363 100644
--- a/arch/sparc64/kernel/syscalls.S
+++ b/arch/sparc64/kernel/syscalls.S
@@ -65,9 +65,8 @@ sys32_rt_sigreturn:
65 andcc %l5, (_TIF_SYSCALL_TRACE|_TIF_SECCOMP|_TIF_SYSCALL_AUDIT), %g0 65 andcc %l5, (_TIF_SYSCALL_TRACE|_TIF_SECCOMP|_TIF_SYSCALL_AUDIT), %g0
66 be,pt %icc, rtrap 66 be,pt %icc, rtrap
67 nop 67 nop
68 add %sp, PTREGS_OFF, %o0 68 call syscall_trace_leave
69 call syscall_trace 69 add %sp, PTREGS_OFF, %o0
70 mov 1, %o1
71 ba,pt %xcc, rtrap 70 ba,pt %xcc, rtrap
72 nop 71 nop
73 72
@@ -159,9 +158,8 @@ linux_sparc_ni_syscall:
159 or %l7, %lo(sys_ni_syscall), %l7 158 or %l7, %lo(sys_ni_syscall), %l7
160 159
161linux_syscall_trace32: 160linux_syscall_trace32:
162 add %sp, PTREGS_OFF, %o0 161 call syscall_trace_enter
163 call syscall_trace 162 add %sp, PTREGS_OFF, %o0
164 clr %o1
165 brnz,pn %o0, 3f 163 brnz,pn %o0, 3f
166 mov -ENOSYS, %o0 164 mov -ENOSYS, %o0
167 srl %i0, 0, %o0 165 srl %i0, 0, %o0
@@ -172,9 +170,8 @@ linux_syscall_trace32:
172 srl %i3, 0, %o3 170 srl %i3, 0, %o3
173 171
174linux_syscall_trace: 172linux_syscall_trace:
175 add %sp, PTREGS_OFF, %o0 173 call syscall_trace_enter
176 call syscall_trace 174 add %sp, PTREGS_OFF, %o0
177 clr %o1
178 brnz,pn %o0, 3f 175 brnz,pn %o0, 3f
179 mov -ENOSYS, %o0 176 mov -ENOSYS, %o0
180 mov %i0, %o0 177 mov %i0, %o0
@@ -275,9 +272,8 @@ ret_sys_call:
275 b,pt %xcc, rtrap 272 b,pt %xcc, rtrap
276 stx %l2, [%sp + PTREGS_OFF + PT_V9_TNPC] 273 stx %l2, [%sp + PTREGS_OFF + PT_V9_TNPC]
277linux_syscall_trace2: 274linux_syscall_trace2:
278 add %sp, PTREGS_OFF, %o0 275 call syscall_trace_leave
279 call syscall_trace 276 add %sp, PTREGS_OFF, %o0
280 mov 1, %o1
281 stx %l1, [%sp + PTREGS_OFF + PT_V9_TPC] 277 stx %l1, [%sp + PTREGS_OFF + PT_V9_TPC]
282 ba,pt %xcc, rtrap 278 ba,pt %xcc, rtrap
283 stx %l2, [%sp + PTREGS_OFF + PT_V9_TNPC] 279 stx %l2, [%sp + PTREGS_OFF + PT_V9_TNPC]
diff --git a/arch/sparc64/kernel/systbls.S b/arch/sparc64/kernel/systbls.S
index 0fdbf3ba956e..5daee4b04dd5 100644
--- a/arch/sparc64/kernel/systbls.S
+++ b/arch/sparc64/kernel/systbls.S
@@ -23,7 +23,7 @@ sys_call_table32:
23/*10*/ .word sys_unlink, sunos_execv, sys_chdir, sys_chown16, sys32_mknod 23/*10*/ .word sys_unlink, sunos_execv, sys_chdir, sys_chown16, sys32_mknod
24/*15*/ .word sys_chmod, sys_lchown16, sparc_brk, sys32_perfctr, sys32_lseek 24/*15*/ .word sys_chmod, sys_lchown16, sparc_brk, sys32_perfctr, sys32_lseek
25/*20*/ .word sys_getpid, sys_capget, sys_capset, sys_setuid16, sys_getuid16 25/*20*/ .word sys_getpid, sys_capget, sys_capset, sys_setuid16, sys_getuid16
26/*25*/ .word sys32_vmsplice, compat_sys_ptrace, sys_alarm, sys32_sigaltstack, sys32_pause 26/*25*/ .word sys32_vmsplice, compat_sys_ptrace, sys_alarm, sys32_sigaltstack, sys_pause
27/*30*/ .word compat_sys_utime, sys_lchown, sys_fchown, sys32_access, sys32_nice 27/*30*/ .word compat_sys_utime, sys_lchown, sys_fchown, sys32_access, sys32_nice
28 .word sys_chown, sys_sync, sys32_kill, compat_sys_newstat, sys32_sendfile 28 .word sys_chown, sys_sync, sys32_kill, compat_sys_newstat, sys32_sendfile
29/*40*/ .word compat_sys_newlstat, sys_dup, sys_pipe, compat_sys_times, sys_getuid 29/*40*/ .word compat_sys_newlstat, sys_dup, sys_pipe, compat_sys_times, sys_getuid
diff --git a/arch/sparc64/kernel/time.c b/arch/sparc64/kernel/time.c
index cc16fdcf98af..226a0042d870 100644
--- a/arch/sparc64/kernel/time.c
+++ b/arch/sparc64/kernel/time.c
@@ -30,13 +30,14 @@
30#include <linux/percpu.h> 30#include <linux/percpu.h>
31#include <linux/miscdevice.h> 31#include <linux/miscdevice.h>
32#include <linux/rtc.h> 32#include <linux/rtc.h>
33#include <linux/rtc/m48t59.h>
33#include <linux/kernel_stat.h> 34#include <linux/kernel_stat.h>
34#include <linux/clockchips.h> 35#include <linux/clockchips.h>
35#include <linux/clocksource.h> 36#include <linux/clocksource.h>
36#include <linux/of_device.h> 37#include <linux/of_device.h>
38#include <linux/platform_device.h>
37 39
38#include <asm/oplib.h> 40#include <asm/oplib.h>
39#include <asm/mostek.h>
40#include <asm/timer.h> 41#include <asm/timer.h>
41#include <asm/irq.h> 42#include <asm/irq.h>
42#include <asm/io.h> 43#include <asm/io.h>
@@ -50,18 +51,7 @@
50 51
51#include "entry.h" 52#include "entry.h"
52 53
53DEFINE_SPINLOCK(mostek_lock);
54DEFINE_SPINLOCK(rtc_lock); 54DEFINE_SPINLOCK(rtc_lock);
55void __iomem *mstk48t02_regs = NULL;
56#ifdef CONFIG_PCI
57unsigned long ds1287_regs = 0UL;
58static void __iomem *bq4802_regs;
59#endif
60
61static void __iomem *mstk48t08_regs;
62static void __iomem *mstk48t59_regs;
63
64static int set_rtc_mmss(unsigned long);
65 55
66#define TICK_PRIV_BIT (1UL << 63) 56#define TICK_PRIV_BIT (1UL << 63)
67#define TICKCMP_IRQ_BIT (1UL << 63) 57#define TICKCMP_IRQ_BIT (1UL << 63)
@@ -405,313 +395,164 @@ static unsigned long timer_ticks_per_nsec_quotient __read_mostly;
405 395
406int update_persistent_clock(struct timespec now) 396int update_persistent_clock(struct timespec now)
407{ 397{
408 return set_rtc_mmss(now.tv_sec); 398 struct rtc_device *rtc = rtc_class_open("rtc0");
409}
410 399
411/* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */ 400 if (rtc)
412static void __init kick_start_clock(void) 401 return rtc_set_mmss(rtc, now.tv_sec);
413{
414 void __iomem *regs = mstk48t02_regs;
415 u8 sec, tmp;
416 int i, count;
417
418 prom_printf("CLOCK: Clock was stopped. Kick start ");
419
420 spin_lock_irq(&mostek_lock);
421
422 /* Turn on the kick start bit to start the oscillator. */
423 tmp = mostek_read(regs + MOSTEK_CREG);
424 tmp |= MSTK_CREG_WRITE;
425 mostek_write(regs + MOSTEK_CREG, tmp);
426 tmp = mostek_read(regs + MOSTEK_SEC);
427 tmp &= ~MSTK_STOP;
428 mostek_write(regs + MOSTEK_SEC, tmp);
429 tmp = mostek_read(regs + MOSTEK_HOUR);
430 tmp |= MSTK_KICK_START;
431 mostek_write(regs + MOSTEK_HOUR, tmp);
432 tmp = mostek_read(regs + MOSTEK_CREG);
433 tmp &= ~MSTK_CREG_WRITE;
434 mostek_write(regs + MOSTEK_CREG, tmp);
435
436 spin_unlock_irq(&mostek_lock);
437
438 /* Delay to allow the clock oscillator to start. */
439 sec = MSTK_REG_SEC(regs);
440 for (i = 0; i < 3; i++) {
441 while (sec == MSTK_REG_SEC(regs))
442 for (count = 0; count < 100000; count++)
443 /* nothing */ ;
444 prom_printf(".");
445 sec = MSTK_REG_SEC(regs);
446 }
447 prom_printf("\n");
448
449 spin_lock_irq(&mostek_lock);
450
451 /* Turn off kick start and set a "valid" time and date. */
452 tmp = mostek_read(regs + MOSTEK_CREG);
453 tmp |= MSTK_CREG_WRITE;
454 mostek_write(regs + MOSTEK_CREG, tmp);
455 tmp = mostek_read(regs + MOSTEK_HOUR);
456 tmp &= ~MSTK_KICK_START;
457 mostek_write(regs + MOSTEK_HOUR, tmp);
458 MSTK_SET_REG_SEC(regs,0);
459 MSTK_SET_REG_MIN(regs,0);
460 MSTK_SET_REG_HOUR(regs,0);
461 MSTK_SET_REG_DOW(regs,5);
462 MSTK_SET_REG_DOM(regs,1);
463 MSTK_SET_REG_MONTH(regs,8);
464 MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO);
465 tmp = mostek_read(regs + MOSTEK_CREG);
466 tmp &= ~MSTK_CREG_WRITE;
467 mostek_write(regs + MOSTEK_CREG, tmp);
468
469 spin_unlock_irq(&mostek_lock);
470
471 /* Ensure the kick start bit is off. If it isn't, turn it off. */
472 while (mostek_read(regs + MOSTEK_HOUR) & MSTK_KICK_START) {
473 prom_printf("CLOCK: Kick start still on!\n");
474
475 spin_lock_irq(&mostek_lock);
476
477 tmp = mostek_read(regs + MOSTEK_CREG);
478 tmp |= MSTK_CREG_WRITE;
479 mostek_write(regs + MOSTEK_CREG, tmp);
480
481 tmp = mostek_read(regs + MOSTEK_HOUR);
482 tmp &= ~MSTK_KICK_START;
483 mostek_write(regs + MOSTEK_HOUR, tmp);
484
485 tmp = mostek_read(regs + MOSTEK_CREG);
486 tmp &= ~MSTK_CREG_WRITE;
487 mostek_write(regs + MOSTEK_CREG, tmp);
488
489 spin_unlock_irq(&mostek_lock);
490 }
491 402
492 prom_printf("CLOCK: Kick start procedure successful.\n"); 403 return -1;
493} 404}
494 405
495/* Return nonzero if the clock chip battery is low. */ 406unsigned long cmos_regs;
496static int __init has_low_battery(void) 407EXPORT_SYMBOL(cmos_regs);
497{
498 void __iomem *regs = mstk48t02_regs;
499 u8 data1, data2;
500
501 spin_lock_irq(&mostek_lock);
502 408
503 data1 = mostek_read(regs + MOSTEK_EEPROM); /* Read some data. */ 409struct resource rtc_cmos_resource;
504 mostek_write(regs + MOSTEK_EEPROM, ~data1); /* Write back the complement. */
505 data2 = mostek_read(regs + MOSTEK_EEPROM); /* Read back the complement. */
506 mostek_write(regs + MOSTEK_EEPROM, data1); /* Restore original value. */
507 410
508 spin_unlock_irq(&mostek_lock); 411static struct platform_device rtc_cmos_device = {
509 412 .name = "rtc_cmos",
510 return (data1 == data2); /* Was the write blocked? */ 413 .id = -1,
511} 414 .resource = &rtc_cmos_resource,
415 .num_resources = 1,
416};
512 417
513static void __init mostek_set_system_time(void __iomem *mregs) 418static int __devinit rtc_probe(struct of_device *op, const struct of_device_id *match)
514{ 419{
515 unsigned int year, mon, day, hour, min, sec; 420 struct resource *r;
516 u8 tmp;
517
518 spin_lock_irq(&mostek_lock);
519 421
520 /* Traditional Mostek chip. */ 422 printk(KERN_INFO "%s: RTC regs at 0x%lx\n",
521 tmp = mostek_read(mregs + MOSTEK_CREG); 423 op->node->full_name, op->resource[0].start);
522 tmp |= MSTK_CREG_READ;
523 mostek_write(mregs + MOSTEK_CREG, tmp);
524 424
525 sec = MSTK_REG_SEC(mregs); 425 /* The CMOS RTC driver only accepts IORESOURCE_IO, so cons
526 min = MSTK_REG_MIN(mregs); 426 * up a fake resource so that the probe works for all cases.
527 hour = MSTK_REG_HOUR(mregs); 427 * When the RTC is behind an ISA bus it will have IORESOURCE_IO
528 day = MSTK_REG_DOM(mregs); 428 * already, whereas when it's behind EBUS is will be IORESOURCE_MEM.
529 mon = MSTK_REG_MONTH(mregs); 429 */
530 year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
531
532 xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
533 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
534 set_normalized_timespec(&wall_to_monotonic,
535 -xtime.tv_sec, -xtime.tv_nsec);
536 430
537 tmp = mostek_read(mregs + MOSTEK_CREG); 431 r = &rtc_cmos_resource;
538 tmp &= ~MSTK_CREG_READ; 432 r->flags = IORESOURCE_IO;
539 mostek_write(mregs + MOSTEK_CREG, tmp); 433 r->name = op->resource[0].name;
434 r->start = op->resource[0].start;
435 r->end = op->resource[0].end;
540 436
541 spin_unlock_irq(&mostek_lock); 437 cmos_regs = op->resource[0].start;
438 return platform_device_register(&rtc_cmos_device);
542} 439}
543 440
544/* Probe for the real time clock chip. */ 441static struct of_device_id __initdata rtc_match[] = {
545static void __init set_system_time(void) 442 {
546{ 443 .name = "rtc",
547 unsigned int year, mon, day, hour, min, sec; 444 .compatible = "m5819",
548 void __iomem *mregs = mstk48t02_regs; 445 },
549#ifdef CONFIG_PCI 446 {
550 unsigned long dregs = ds1287_regs; 447 .name = "rtc",
551 void __iomem *bregs = bq4802_regs; 448 .compatible = "isa-m5819p",
552#else 449 },
553 unsigned long dregs = 0UL; 450 {
554 void __iomem *bregs = 0UL; 451 .name = "rtc",
555#endif 452 .compatible = "isa-m5823p",
556 453 },
557 if (!mregs && !dregs && !bregs) { 454 {
558 prom_printf("Something wrong, clock regs not mapped yet.\n"); 455 .name = "rtc",
559 prom_halt(); 456 .compatible = "ds1287",
560 } 457 },
561 458 {},
562 if (mregs) { 459};
563 mostek_set_system_time(mregs);
564 return;
565 }
566
567 if (bregs) {
568 unsigned char val = readb(bregs + 0x0e);
569 unsigned int century;
570 460
571 /* BQ4802 RTC chip. */ 461static struct of_platform_driver rtc_driver = {
462 .match_table = rtc_match,
463 .probe = rtc_probe,
464 .driver = {
465 .name = "rtc",
466 },
467};
572 468
573 writeb(val | 0x08, bregs + 0x0e); 469static struct platform_device rtc_bq4802_device = {
470 .name = "rtc-bq4802",
471 .id = -1,
472 .num_resources = 1,
473};
574 474
575 sec = readb(bregs + 0x00); 475static int __devinit bq4802_probe(struct of_device *op, const struct of_device_id *match)
576 min = readb(bregs + 0x02); 476{
577 hour = readb(bregs + 0x04);
578 day = readb(bregs + 0x06);
579 mon = readb(bregs + 0x09);
580 year = readb(bregs + 0x0a);
581 century = readb(bregs + 0x0f);
582 477
583 writeb(val, bregs + 0x0e); 478 printk(KERN_INFO "%s: BQ4802 regs at 0x%lx\n",
479 op->node->full_name, op->resource[0].start);
584 480
585 BCD_TO_BIN(sec); 481 rtc_bq4802_device.resource = &op->resource[0];
586 BCD_TO_BIN(min); 482 return platform_device_register(&rtc_bq4802_device);
587 BCD_TO_BIN(hour); 483}
588 BCD_TO_BIN(day);
589 BCD_TO_BIN(mon);
590 BCD_TO_BIN(year);
591 BCD_TO_BIN(century);
592 484
593 year += (century * 100); 485static struct of_device_id __initdata bq4802_match[] = {
594 } else { 486 {
595 /* Dallas 12887 RTC chip. */ 487 .name = "rtc",
596 488 .compatible = "bq4802",
597 do { 489 },
598 sec = CMOS_READ(RTC_SECONDS); 490};
599 min = CMOS_READ(RTC_MINUTES);
600 hour = CMOS_READ(RTC_HOURS);
601 day = CMOS_READ(RTC_DAY_OF_MONTH);
602 mon = CMOS_READ(RTC_MONTH);
603 year = CMOS_READ(RTC_YEAR);
604 } while (sec != CMOS_READ(RTC_SECONDS));
605
606 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
607 BCD_TO_BIN(sec);
608 BCD_TO_BIN(min);
609 BCD_TO_BIN(hour);
610 BCD_TO_BIN(day);
611 BCD_TO_BIN(mon);
612 BCD_TO_BIN(year);
613 }
614 if ((year += 1900) < 1970)
615 year += 100;
616 }
617 491
618 xtime.tv_sec = mktime(year, mon, day, hour, min, sec); 492static struct of_platform_driver bq4802_driver = {
619 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ); 493 .match_table = bq4802_match,
620 set_normalized_timespec(&wall_to_monotonic, 494 .probe = bq4802_probe,
621 -xtime.tv_sec, -xtime.tv_nsec); 495 .driver = {
622} 496 .name = "bq4802",
497 },
498};
623 499
624/* davem suggests we keep this within the 4M locked kernel image */ 500static unsigned char mostek_read_byte(struct device *dev, u32 ofs)
625static u32 starfire_get_time(void)
626{ 501{
627 static char obp_gettod[32]; 502 struct platform_device *pdev = to_platform_device(dev);
628 static u32 unix_tod; 503 struct m48t59_plat_data *pdata = pdev->dev.platform_data;
504 void __iomem *regs;
505 unsigned char val;
629 506
630 sprintf(obp_gettod, "h# %08x unix-gettod", 507 regs = (void __iomem *) pdev->resource[0].start;
631 (unsigned int) (long) &unix_tod); 508 val = readb(regs + ofs);
632 prom_feval(obp_gettod);
633 509
634 return unix_tod; 510 /* the year 0 is 1968 */
511 if (ofs == pdata->offset + M48T59_YEAR) {
512 val += 0x68;
513 if ((val & 0xf) > 9)
514 val += 6;
515 }
516 return val;
635} 517}
636 518
637static int starfire_set_time(u32 val) 519static void mostek_write_byte(struct device *dev, u32 ofs, u8 val)
638{ 520{
639 /* Do nothing, time is set using the service processor 521 struct platform_device *pdev = to_platform_device(dev);
640 * console on this platform. 522 struct m48t59_plat_data *pdata = pdev->dev.platform_data;
641 */ 523 void __iomem *regs;
642 return 0;
643}
644 524
645static u32 hypervisor_get_time(void) 525 regs = (void __iomem *) pdev->resource[0].start;
646{ 526 if (ofs == pdata->offset + M48T59_YEAR) {
647 unsigned long ret, time; 527 if (val < 0x68)
648 int retries = 10000; 528 val += 0x32;
649 529 else
650retry: 530 val -= 0x68;
651 ret = sun4v_tod_get(&time); 531 if ((val & 0xf) > 9)
652 if (ret == HV_EOK) 532 val += 6;
653 return time; 533 if ((val & 0xf0) > 0x9A)
654 if (ret == HV_EWOULDBLOCK) { 534 val += 0x60;
655 if (--retries > 0) {
656 udelay(100);
657 goto retry;
658 }
659 printk(KERN_WARNING "SUN4V: tod_get() timed out.\n");
660 return 0;
661 } 535 }
662 printk(KERN_WARNING "SUN4V: tod_get() not supported.\n"); 536 writeb(val, regs + ofs);
663 return 0;
664} 537}
665 538
666static int hypervisor_set_time(u32 secs) 539static struct m48t59_plat_data m48t59_data = {
667{ 540 .read_byte = mostek_read_byte,
668 unsigned long ret; 541 .write_byte = mostek_write_byte,
669 int retries = 10000; 542};
670
671retry:
672 ret = sun4v_tod_set(secs);
673 if (ret == HV_EOK)
674 return 0;
675 if (ret == HV_EWOULDBLOCK) {
676 if (--retries > 0) {
677 udelay(100);
678 goto retry;
679 }
680 printk(KERN_WARNING "SUN4V: tod_set() timed out.\n");
681 return -EAGAIN;
682 }
683 printk(KERN_WARNING "SUN4V: tod_set() not supported.\n");
684 return -EOPNOTSUPP;
685}
686 543
687static int __init clock_model_matches(const char *model) 544static struct platform_device m48t59_rtc = {
688{ 545 .name = "rtc-m48t59",
689 if (strcmp(model, "mk48t02") && 546 .id = 0,
690 strcmp(model, "mk48t08") && 547 .num_resources = 1,
691 strcmp(model, "mk48t59") && 548 .dev = {
692 strcmp(model, "m5819") && 549 .platform_data = &m48t59_data,
693 strcmp(model, "m5819p") && 550 },
694 strcmp(model, "m5823") && 551};
695 strcmp(model, "ds1287") &&
696 strcmp(model, "bq4802"))
697 return 0;
698
699 return 1;
700}
701 552
702static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match) 553static int __devinit mostek_probe(struct of_device *op, const struct of_device_id *match)
703{ 554{
704 struct device_node *dp = op->node; 555 struct device_node *dp = op->node;
705 const char *model = of_get_property(dp, "model", NULL);
706 const char *compat = of_get_property(dp, "compatible", NULL);
707 unsigned long size, flags;
708 void __iomem *regs;
709
710 if (!model)
711 model = compat;
712
713 if (!model || !clock_model_matches(model))
714 return -ENODEV;
715 556
716 /* On an Enterprise system there can be multiple mostek clocks. 557 /* On an Enterprise system there can be multiple mostek clocks.
717 * We should only match the one that is on the central FHC bus. 558 * We should only match the one that is on the central FHC bus.
@@ -720,88 +561,51 @@ static int __devinit clock_probe(struct of_device *op, const struct of_device_id
720 strcmp(dp->parent->parent->name, "central") != 0) 561 strcmp(dp->parent->parent->name, "central") != 0)
721 return -ENODEV; 562 return -ENODEV;
722 563
723 size = (op->resource[0].end - op->resource[0].start) + 1; 564 printk(KERN_INFO "%s: Mostek regs at 0x%lx\n",
724 regs = of_ioremap(&op->resource[0], 0, size, "clock"); 565 dp->full_name, op->resource[0].start);
725 if (!regs)
726 return -ENOMEM;
727
728#ifdef CONFIG_PCI
729 if (!strcmp(model, "ds1287") ||
730 !strcmp(model, "m5819") ||
731 !strcmp(model, "m5819p") ||
732 !strcmp(model, "m5823")) {
733 ds1287_regs = (unsigned long) regs;
734 } else if (!strcmp(model, "bq4802")) {
735 bq4802_regs = regs;
736 } else
737#endif
738 if (model[5] == '0' && model[6] == '2') {
739 mstk48t02_regs = regs;
740 } else if(model[5] == '0' && model[6] == '8') {
741 mstk48t08_regs = regs;
742 mstk48t02_regs = mstk48t08_regs + MOSTEK_48T08_48T02;
743 } else {
744 mstk48t59_regs = regs;
745 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
746 }
747 566
748 printk(KERN_INFO "%s: Clock regs at %p\n", dp->full_name, regs); 567 m48t59_rtc.resource = &op->resource[0];
749 568 return platform_device_register(&m48t59_rtc);
750 local_irq_save(flags);
751
752 if (mstk48t02_regs != NULL) {
753 /* Report a low battery voltage condition. */
754 if (has_low_battery())
755 prom_printf("NVRAM: Low battery voltage!\n");
756
757 /* Kick start the clock if it is completely stopped. */
758 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
759 kick_start_clock();
760 }
761
762 set_system_time();
763
764 local_irq_restore(flags);
765
766 return 0;
767} 569}
768 570
769static struct of_device_id clock_match[] = { 571static struct of_device_id __initdata mostek_match[] = {
770 { 572 {
771 .name = "eeprom", 573 .name = "eeprom",
772 }, 574 },
773 {
774 .name = "rtc",
775 },
776 {}, 575 {},
777}; 576};
778 577
779static struct of_platform_driver clock_driver = { 578static struct of_platform_driver mostek_driver = {
780 .match_table = clock_match, 579 .match_table = mostek_match,
781 .probe = clock_probe, 580 .probe = mostek_probe,
782 .driver = { 581 .driver = {
783 .name = "clock", 582 .name = "mostek",
784 }, 583 },
785}; 584};
786 585
586static struct platform_device rtc_sun4v_device = {
587 .name = "rtc-sun4v",
588 .id = -1,
589};
590
591static struct platform_device rtc_starfire_device = {
592 .name = "rtc-starfire",
593 .id = -1,
594};
595
787static int __init clock_init(void) 596static int __init clock_init(void)
788{ 597{
789 if (this_is_starfire) { 598 if (this_is_starfire)
790 xtime.tv_sec = starfire_get_time(); 599 return platform_device_register(&rtc_starfire_device);
791 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
792 set_normalized_timespec(&wall_to_monotonic,
793 -xtime.tv_sec, -xtime.tv_nsec);
794 return 0;
795 }
796 if (tlb_type == hypervisor) {
797 xtime.tv_sec = hypervisor_get_time();
798 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
799 set_normalized_timespec(&wall_to_monotonic,
800 -xtime.tv_sec, -xtime.tv_nsec);
801 return 0;
802 }
803 600
804 return of_register_driver(&clock_driver, &of_platform_bus_type); 601 if (tlb_type == hypervisor)
602 return platform_device_register(&rtc_sun4v_device);
603
604 (void) of_register_driver(&rtc_driver, &of_platform_bus_type);
605 (void) of_register_driver(&mostek_driver, &of_platform_bus_type);
606 (void) of_register_driver(&bq4802_driver, &of_platform_bus_type);
607
608 return 0;
805} 609}
806 610
807/* Must be after subsys_initcall() so that busses are probed. Must 611/* Must be after subsys_initcall() so that busses are probed. Must
@@ -1070,672 +874,8 @@ unsigned long long sched_clock(void)
1070 >> SPARC64_NSEC_PER_CYC_SHIFT; 874 >> SPARC64_NSEC_PER_CYC_SHIFT;
1071} 875}
1072 876
1073static int set_rtc_mmss(unsigned long nowtime)
1074{
1075 int real_seconds, real_minutes, chip_minutes;
1076 void __iomem *mregs = mstk48t02_regs;
1077#ifdef CONFIG_PCI
1078 unsigned long dregs = ds1287_regs;
1079 void __iomem *bregs = bq4802_regs;
1080#else
1081 unsigned long dregs = 0UL;
1082 void __iomem *bregs = 0UL;
1083#endif
1084 unsigned long flags;
1085 u8 tmp;
1086
1087 /*
1088 * Not having a register set can lead to trouble.
1089 * Also starfire doesn't have a tod clock.
1090 */
1091 if (!mregs && !dregs && !bregs)
1092 return -1;
1093
1094 if (mregs) {
1095 spin_lock_irqsave(&mostek_lock, flags);
1096
1097 /* Read the current RTC minutes. */
1098 tmp = mostek_read(mregs + MOSTEK_CREG);
1099 tmp |= MSTK_CREG_READ;
1100 mostek_write(mregs + MOSTEK_CREG, tmp);
1101
1102 chip_minutes = MSTK_REG_MIN(mregs);
1103
1104 tmp = mostek_read(mregs + MOSTEK_CREG);
1105 tmp &= ~MSTK_CREG_READ;
1106 mostek_write(mregs + MOSTEK_CREG, tmp);
1107
1108 /*
1109 * since we're only adjusting minutes and seconds,
1110 * don't interfere with hour overflow. This avoids
1111 * messing with unknown time zones but requires your
1112 * RTC not to be off by more than 15 minutes
1113 */
1114 real_seconds = nowtime % 60;
1115 real_minutes = nowtime / 60;
1116 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1117 real_minutes += 30; /* correct for half hour time zone */
1118 real_minutes %= 60;
1119
1120 if (abs(real_minutes - chip_minutes) < 30) {
1121 tmp = mostek_read(mregs + MOSTEK_CREG);
1122 tmp |= MSTK_CREG_WRITE;
1123 mostek_write(mregs + MOSTEK_CREG, tmp);
1124
1125 MSTK_SET_REG_SEC(mregs,real_seconds);
1126 MSTK_SET_REG_MIN(mregs,real_minutes);
1127
1128 tmp = mostek_read(mregs + MOSTEK_CREG);
1129 tmp &= ~MSTK_CREG_WRITE;
1130 mostek_write(mregs + MOSTEK_CREG, tmp);
1131
1132 spin_unlock_irqrestore(&mostek_lock, flags);
1133
1134 return 0;
1135 } else {
1136 spin_unlock_irqrestore(&mostek_lock, flags);
1137
1138 return -1;
1139 }
1140 } else if (bregs) {
1141 int retval = 0;
1142 unsigned char val = readb(bregs + 0x0e);
1143
1144 /* BQ4802 RTC chip. */
1145
1146 writeb(val | 0x08, bregs + 0x0e);
1147
1148 chip_minutes = readb(bregs + 0x02);
1149 BCD_TO_BIN(chip_minutes);
1150 real_seconds = nowtime % 60;
1151 real_minutes = nowtime / 60;
1152 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1153 real_minutes += 30;
1154 real_minutes %= 60;
1155
1156 if (abs(real_minutes - chip_minutes) < 30) {
1157 BIN_TO_BCD(real_seconds);
1158 BIN_TO_BCD(real_minutes);
1159 writeb(real_seconds, bregs + 0x00);
1160 writeb(real_minutes, bregs + 0x02);
1161 } else {
1162 printk(KERN_WARNING
1163 "set_rtc_mmss: can't update from %d to %d\n",
1164 chip_minutes, real_minutes);
1165 retval = -1;
1166 }
1167
1168 writeb(val, bregs + 0x0e);
1169
1170 return retval;
1171 } else {
1172 int retval = 0;
1173 unsigned char save_control, save_freq_select;
1174
1175 /* Stolen from arch/i386/kernel/time.c, see there for
1176 * credits and descriptive comments.
1177 */
1178 spin_lock_irqsave(&rtc_lock, flags);
1179 save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
1180 CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
1181
1182 save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
1183 CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
1184
1185 chip_minutes = CMOS_READ(RTC_MINUTES);
1186 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
1187 BCD_TO_BIN(chip_minutes);
1188 real_seconds = nowtime % 60;
1189 real_minutes = nowtime / 60;
1190 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1191 real_minutes += 30;
1192 real_minutes %= 60;
1193
1194 if (abs(real_minutes - chip_minutes) < 30) {
1195 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
1196 BIN_TO_BCD(real_seconds);
1197 BIN_TO_BCD(real_minutes);
1198 }
1199 CMOS_WRITE(real_seconds,RTC_SECONDS);
1200 CMOS_WRITE(real_minutes,RTC_MINUTES);
1201 } else {
1202 printk(KERN_WARNING
1203 "set_rtc_mmss: can't update from %d to %d\n",
1204 chip_minutes, real_minutes);
1205 retval = -1;
1206 }
1207
1208 CMOS_WRITE(save_control, RTC_CONTROL);
1209 CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
1210 spin_unlock_irqrestore(&rtc_lock, flags);
1211
1212 return retval;
1213 }
1214}
1215
1216#define RTC_IS_OPEN 0x01 /* means /dev/rtc is in use */
1217static unsigned char mini_rtc_status; /* bitmapped status byte. */
1218
1219#define FEBRUARY 2
1220#define STARTOFTIME 1970
1221#define SECDAY 86400L
1222#define SECYR (SECDAY * 365)
1223#define leapyear(year) ((year) % 4 == 0 && \
1224 ((year) % 100 != 0 || (year) % 400 == 0))
1225#define days_in_year(a) (leapyear(a) ? 366 : 365)
1226#define days_in_month(a) (month_days[(a) - 1])
1227
1228static int month_days[12] = {
1229 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
1230};
1231
1232/*
1233 * This only works for the Gregorian calendar - i.e. after 1752 (in the UK)
1234 */
1235static void GregorianDay(struct rtc_time * tm)
1236{
1237 int leapsToDate;
1238 int lastYear;
1239 int day;
1240 int MonthOffset[] = { 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334 };
1241
1242 lastYear = tm->tm_year - 1;
1243
1244 /*
1245 * Number of leap corrections to apply up to end of last year
1246 */
1247 leapsToDate = lastYear / 4 - lastYear / 100 + lastYear / 400;
1248
1249 /*
1250 * This year is a leap year if it is divisible by 4 except when it is
1251 * divisible by 100 unless it is divisible by 400
1252 *
1253 * e.g. 1904 was a leap year, 1900 was not, 1996 is, and 2000 was
1254 */
1255 day = tm->tm_mon > 2 && leapyear(tm->tm_year);
1256
1257 day += lastYear*365 + leapsToDate + MonthOffset[tm->tm_mon-1] +
1258 tm->tm_mday;
1259
1260 tm->tm_wday = day % 7;
1261}
1262
1263static void to_tm(int tim, struct rtc_time *tm)
1264{
1265 register int i;
1266 register long hms, day;
1267
1268 day = tim / SECDAY;
1269 hms = tim % SECDAY;
1270
1271 /* Hours, minutes, seconds are easy */
1272 tm->tm_hour = hms / 3600;
1273 tm->tm_min = (hms % 3600) / 60;
1274 tm->tm_sec = (hms % 3600) % 60;
1275
1276 /* Number of years in days */
1277 for (i = STARTOFTIME; day >= days_in_year(i); i++)
1278 day -= days_in_year(i);
1279 tm->tm_year = i;
1280
1281 /* Number of months in days left */
1282 if (leapyear(tm->tm_year))
1283 days_in_month(FEBRUARY) = 29;
1284 for (i = 1; day >= days_in_month(i); i++)
1285 day -= days_in_month(i);
1286 days_in_month(FEBRUARY) = 28;
1287 tm->tm_mon = i;
1288
1289 /* Days are what is left over (+1) from all that. */
1290 tm->tm_mday = day + 1;
1291
1292 /*
1293 * Determine the day of week
1294 */
1295 GregorianDay(tm);
1296}
1297
1298/* Both Starfire and SUN4V give us seconds since Jan 1st, 1970,
1299 * aka Unix time. So we have to convert to/from rtc_time.
1300 */
1301static void starfire_get_rtc_time(struct rtc_time *time)
1302{
1303 u32 seconds = starfire_get_time();
1304
1305 to_tm(seconds, time);
1306 time->tm_year -= 1900;
1307 time->tm_mon -= 1;
1308}
1309
1310static int starfire_set_rtc_time(struct rtc_time *time)
1311{
1312 u32 seconds = mktime(time->tm_year + 1900, time->tm_mon + 1,
1313 time->tm_mday, time->tm_hour,
1314 time->tm_min, time->tm_sec);
1315
1316 return starfire_set_time(seconds);
1317}
1318
1319static void hypervisor_get_rtc_time(struct rtc_time *time)
1320{
1321 u32 seconds = hypervisor_get_time();
1322
1323 to_tm(seconds, time);
1324 time->tm_year -= 1900;
1325 time->tm_mon -= 1;
1326}
1327
1328static int hypervisor_set_rtc_time(struct rtc_time *time)
1329{
1330 u32 seconds = mktime(time->tm_year + 1900, time->tm_mon + 1,
1331 time->tm_mday, time->tm_hour,
1332 time->tm_min, time->tm_sec);
1333
1334 return hypervisor_set_time(seconds);
1335}
1336
1337#ifdef CONFIG_PCI
1338static void bq4802_get_rtc_time(struct rtc_time *time)
1339{
1340 unsigned char val = readb(bq4802_regs + 0x0e);
1341 unsigned int century;
1342
1343 writeb(val | 0x08, bq4802_regs + 0x0e);
1344
1345 time->tm_sec = readb(bq4802_regs + 0x00);
1346 time->tm_min = readb(bq4802_regs + 0x02);
1347 time->tm_hour = readb(bq4802_regs + 0x04);
1348 time->tm_mday = readb(bq4802_regs + 0x06);
1349 time->tm_mon = readb(bq4802_regs + 0x09);
1350 time->tm_year = readb(bq4802_regs + 0x0a);
1351 time->tm_wday = readb(bq4802_regs + 0x08);
1352 century = readb(bq4802_regs + 0x0f);
1353
1354 writeb(val, bq4802_regs + 0x0e);
1355
1356 BCD_TO_BIN(time->tm_sec);
1357 BCD_TO_BIN(time->tm_min);
1358 BCD_TO_BIN(time->tm_hour);
1359 BCD_TO_BIN(time->tm_mday);
1360 BCD_TO_BIN(time->tm_mon);
1361 BCD_TO_BIN(time->tm_year);
1362 BCD_TO_BIN(time->tm_wday);
1363 BCD_TO_BIN(century);
1364
1365 time->tm_year += (century * 100);
1366 time->tm_year -= 1900;
1367
1368 time->tm_mon--;
1369}
1370
1371static int bq4802_set_rtc_time(struct rtc_time *time)
1372{
1373 unsigned char val = readb(bq4802_regs + 0x0e);
1374 unsigned char sec, min, hrs, day, mon, yrs, century;
1375 unsigned int year;
1376
1377 year = time->tm_year + 1900;
1378 century = year / 100;
1379 yrs = year % 100;
1380
1381 mon = time->tm_mon + 1; /* tm_mon starts at zero */
1382 day = time->tm_mday;
1383 hrs = time->tm_hour;
1384 min = time->tm_min;
1385 sec = time->tm_sec;
1386
1387 BIN_TO_BCD(sec);
1388 BIN_TO_BCD(min);
1389 BIN_TO_BCD(hrs);
1390 BIN_TO_BCD(day);
1391 BIN_TO_BCD(mon);
1392 BIN_TO_BCD(yrs);
1393 BIN_TO_BCD(century);
1394
1395 writeb(val | 0x08, bq4802_regs + 0x0e);
1396
1397 writeb(sec, bq4802_regs + 0x00);
1398 writeb(min, bq4802_regs + 0x02);
1399 writeb(hrs, bq4802_regs + 0x04);
1400 writeb(day, bq4802_regs + 0x06);
1401 writeb(mon, bq4802_regs + 0x09);
1402 writeb(yrs, bq4802_regs + 0x0a);
1403 writeb(century, bq4802_regs + 0x0f);
1404
1405 writeb(val, bq4802_regs + 0x0e);
1406
1407 return 0;
1408}
1409
1410static void cmos_get_rtc_time(struct rtc_time *rtc_tm)
1411{
1412 unsigned char ctrl;
1413
1414 rtc_tm->tm_sec = CMOS_READ(RTC_SECONDS);
1415 rtc_tm->tm_min = CMOS_READ(RTC_MINUTES);
1416 rtc_tm->tm_hour = CMOS_READ(RTC_HOURS);
1417 rtc_tm->tm_mday = CMOS_READ(RTC_DAY_OF_MONTH);
1418 rtc_tm->tm_mon = CMOS_READ(RTC_MONTH);
1419 rtc_tm->tm_year = CMOS_READ(RTC_YEAR);
1420 rtc_tm->tm_wday = CMOS_READ(RTC_DAY_OF_WEEK);
1421
1422 ctrl = CMOS_READ(RTC_CONTROL);
1423 if (!(ctrl & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
1424 BCD_TO_BIN(rtc_tm->tm_sec);
1425 BCD_TO_BIN(rtc_tm->tm_min);
1426 BCD_TO_BIN(rtc_tm->tm_hour);
1427 BCD_TO_BIN(rtc_tm->tm_mday);
1428 BCD_TO_BIN(rtc_tm->tm_mon);
1429 BCD_TO_BIN(rtc_tm->tm_year);
1430 BCD_TO_BIN(rtc_tm->tm_wday);
1431 }
1432
1433 if (rtc_tm->tm_year <= 69)
1434 rtc_tm->tm_year += 100;
1435
1436 rtc_tm->tm_mon--;
1437}
1438
1439static int cmos_set_rtc_time(struct rtc_time *rtc_tm)
1440{
1441 unsigned char mon, day, hrs, min, sec;
1442 unsigned char save_control, save_freq_select;
1443 unsigned int yrs;
1444
1445 yrs = rtc_tm->tm_year;
1446 mon = rtc_tm->tm_mon + 1;
1447 day = rtc_tm->tm_mday;
1448 hrs = rtc_tm->tm_hour;
1449 min = rtc_tm->tm_min;
1450 sec = rtc_tm->tm_sec;
1451
1452 if (yrs >= 100)
1453 yrs -= 100;
1454
1455 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
1456 BIN_TO_BCD(sec);
1457 BIN_TO_BCD(min);
1458 BIN_TO_BCD(hrs);
1459 BIN_TO_BCD(day);
1460 BIN_TO_BCD(mon);
1461 BIN_TO_BCD(yrs);
1462 }
1463
1464 save_control = CMOS_READ(RTC_CONTROL);
1465 CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
1466 save_freq_select = CMOS_READ(RTC_FREQ_SELECT);
1467 CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
1468
1469 CMOS_WRITE(yrs, RTC_YEAR);
1470 CMOS_WRITE(mon, RTC_MONTH);
1471 CMOS_WRITE(day, RTC_DAY_OF_MONTH);
1472 CMOS_WRITE(hrs, RTC_HOURS);
1473 CMOS_WRITE(min, RTC_MINUTES);
1474 CMOS_WRITE(sec, RTC_SECONDS);
1475
1476 CMOS_WRITE(save_control, RTC_CONTROL);
1477 CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
1478
1479 return 0;
1480}
1481#endif /* CONFIG_PCI */
1482
1483static void mostek_get_rtc_time(struct rtc_time *rtc_tm)
1484{
1485 void __iomem *regs = mstk48t02_regs;
1486 u8 tmp;
1487
1488 spin_lock_irq(&mostek_lock);
1489
1490 tmp = mostek_read(regs + MOSTEK_CREG);
1491 tmp |= MSTK_CREG_READ;
1492 mostek_write(regs + MOSTEK_CREG, tmp);
1493
1494 rtc_tm->tm_sec = MSTK_REG_SEC(regs);
1495 rtc_tm->tm_min = MSTK_REG_MIN(regs);
1496 rtc_tm->tm_hour = MSTK_REG_HOUR(regs);
1497 rtc_tm->tm_mday = MSTK_REG_DOM(regs);
1498 rtc_tm->tm_mon = MSTK_REG_MONTH(regs);
1499 rtc_tm->tm_year = MSTK_CVT_YEAR( MSTK_REG_YEAR(regs) );
1500 rtc_tm->tm_wday = MSTK_REG_DOW(regs);
1501
1502 tmp = mostek_read(regs + MOSTEK_CREG);
1503 tmp &= ~MSTK_CREG_READ;
1504 mostek_write(regs + MOSTEK_CREG, tmp);
1505
1506 spin_unlock_irq(&mostek_lock);
1507
1508 rtc_tm->tm_mon--;
1509 rtc_tm->tm_wday--;
1510 rtc_tm->tm_year -= 1900;
1511}
1512
1513static int mostek_set_rtc_time(struct rtc_time *rtc_tm)
1514{
1515 unsigned char mon, day, hrs, min, sec, wday;
1516 void __iomem *regs = mstk48t02_regs;
1517 unsigned int yrs;
1518 u8 tmp;
1519
1520 yrs = rtc_tm->tm_year + 1900;
1521 mon = rtc_tm->tm_mon + 1;
1522 day = rtc_tm->tm_mday;
1523 wday = rtc_tm->tm_wday + 1;
1524 hrs = rtc_tm->tm_hour;
1525 min = rtc_tm->tm_min;
1526 sec = rtc_tm->tm_sec;
1527
1528 spin_lock_irq(&mostek_lock);
1529
1530 tmp = mostek_read(regs + MOSTEK_CREG);
1531 tmp |= MSTK_CREG_WRITE;
1532 mostek_write(regs + MOSTEK_CREG, tmp);
1533
1534 MSTK_SET_REG_SEC(regs, sec);
1535 MSTK_SET_REG_MIN(regs, min);
1536 MSTK_SET_REG_HOUR(regs, hrs);
1537 MSTK_SET_REG_DOW(regs, wday);
1538 MSTK_SET_REG_DOM(regs, day);
1539 MSTK_SET_REG_MONTH(regs, mon);
1540 MSTK_SET_REG_YEAR(regs, yrs - MSTK_YEAR_ZERO);
1541
1542 tmp = mostek_read(regs + MOSTEK_CREG);
1543 tmp &= ~MSTK_CREG_WRITE;
1544 mostek_write(regs + MOSTEK_CREG, tmp);
1545
1546 spin_unlock_irq(&mostek_lock);
1547
1548 return 0;
1549}
1550
1551struct mini_rtc_ops {
1552 void (*get_rtc_time)(struct rtc_time *);
1553 int (*set_rtc_time)(struct rtc_time *);
1554};
1555
1556static struct mini_rtc_ops starfire_rtc_ops = {
1557 .get_rtc_time = starfire_get_rtc_time,
1558 .set_rtc_time = starfire_set_rtc_time,
1559};
1560
1561static struct mini_rtc_ops hypervisor_rtc_ops = {
1562 .get_rtc_time = hypervisor_get_rtc_time,
1563 .set_rtc_time = hypervisor_set_rtc_time,
1564};
1565
1566#ifdef CONFIG_PCI
1567static struct mini_rtc_ops bq4802_rtc_ops = {
1568 .get_rtc_time = bq4802_get_rtc_time,
1569 .set_rtc_time = bq4802_set_rtc_time,
1570};
1571
1572static struct mini_rtc_ops cmos_rtc_ops = {
1573 .get_rtc_time = cmos_get_rtc_time,
1574 .set_rtc_time = cmos_set_rtc_time,
1575};
1576#endif /* CONFIG_PCI */
1577
1578static struct mini_rtc_ops mostek_rtc_ops = {
1579 .get_rtc_time = mostek_get_rtc_time,
1580 .set_rtc_time = mostek_set_rtc_time,
1581};
1582
1583static struct mini_rtc_ops *mini_rtc_ops;
1584
1585static inline void mini_get_rtc_time(struct rtc_time *time)
1586{
1587 unsigned long flags;
1588
1589 spin_lock_irqsave(&rtc_lock, flags);
1590 mini_rtc_ops->get_rtc_time(time);
1591 spin_unlock_irqrestore(&rtc_lock, flags);
1592}
1593
1594static inline int mini_set_rtc_time(struct rtc_time *time)
1595{
1596 unsigned long flags;
1597 int err;
1598
1599 spin_lock_irqsave(&rtc_lock, flags);
1600 err = mini_rtc_ops->set_rtc_time(time);
1601 spin_unlock_irqrestore(&rtc_lock, flags);
1602
1603 return err;
1604}
1605
1606static int mini_rtc_ioctl(struct inode *inode, struct file *file,
1607 unsigned int cmd, unsigned long arg)
1608{
1609 struct rtc_time wtime;
1610 void __user *argp = (void __user *)arg;
1611
1612 switch (cmd) {
1613
1614 case RTC_PLL_GET:
1615 return -EINVAL;
1616
1617 case RTC_PLL_SET:
1618 return -EINVAL;
1619
1620 case RTC_UIE_OFF: /* disable ints from RTC updates. */
1621 return 0;
1622
1623 case RTC_UIE_ON: /* enable ints for RTC updates. */
1624 return -EINVAL;
1625
1626 case RTC_RD_TIME: /* Read the time/date from RTC */
1627 /* this doesn't get week-day, who cares */
1628 memset(&wtime, 0, sizeof(wtime));
1629 mini_get_rtc_time(&wtime);
1630
1631 return copy_to_user(argp, &wtime, sizeof(wtime)) ? -EFAULT : 0;
1632
1633 case RTC_SET_TIME: /* Set the RTC */
1634 {
1635 int year, days;
1636
1637 if (!capable(CAP_SYS_TIME))
1638 return -EACCES;
1639
1640 if (copy_from_user(&wtime, argp, sizeof(wtime)))
1641 return -EFAULT;
1642
1643 year = wtime.tm_year + 1900;
1644 days = month_days[wtime.tm_mon] +
1645 ((wtime.tm_mon == 1) && leapyear(year));
1646
1647 if ((wtime.tm_mon < 0 || wtime.tm_mon > 11) ||
1648 (wtime.tm_mday < 1))
1649 return -EINVAL;
1650
1651 if (wtime.tm_mday < 0 || wtime.tm_mday > days)
1652 return -EINVAL;
1653
1654 if (wtime.tm_hour < 0 || wtime.tm_hour >= 24 ||
1655 wtime.tm_min < 0 || wtime.tm_min >= 60 ||
1656 wtime.tm_sec < 0 || wtime.tm_sec >= 60)
1657 return -EINVAL;
1658
1659 return mini_set_rtc_time(&wtime);
1660 }
1661 }
1662
1663 return -EINVAL;
1664}
1665
1666static int mini_rtc_open(struct inode *inode, struct file *file)
1667{
1668 lock_kernel();
1669 if (mini_rtc_status & RTC_IS_OPEN) {
1670 unlock_kernel();
1671 return -EBUSY;
1672 }
1673
1674 mini_rtc_status |= RTC_IS_OPEN;
1675 unlock_kernel();
1676
1677 return 0;
1678}
1679
1680static int mini_rtc_release(struct inode *inode, struct file *file)
1681{
1682 mini_rtc_status &= ~RTC_IS_OPEN;
1683 return 0;
1684}
1685
1686
1687static const struct file_operations mini_rtc_fops = {
1688 .owner = THIS_MODULE,
1689 .ioctl = mini_rtc_ioctl,
1690 .open = mini_rtc_open,
1691 .release = mini_rtc_release,
1692};
1693
1694static struct miscdevice rtc_mini_dev =
1695{
1696 .minor = RTC_MINOR,
1697 .name = "rtc",
1698 .fops = &mini_rtc_fops,
1699};
1700
1701static int __init rtc_mini_init(void)
1702{
1703 int retval;
1704
1705 if (tlb_type == hypervisor)
1706 mini_rtc_ops = &hypervisor_rtc_ops;
1707 else if (this_is_starfire)
1708 mini_rtc_ops = &starfire_rtc_ops;
1709#ifdef CONFIG_PCI
1710 else if (bq4802_regs)
1711 mini_rtc_ops = &bq4802_rtc_ops;
1712 else if (ds1287_regs)
1713 mini_rtc_ops = &cmos_rtc_ops;
1714#endif /* CONFIG_PCI */
1715 else if (mstk48t02_regs)
1716 mini_rtc_ops = &mostek_rtc_ops;
1717 else
1718 return -ENODEV;
1719
1720 printk(KERN_INFO "Mini RTC Driver\n");
1721
1722 retval = misc_register(&rtc_mini_dev);
1723 if (retval < 0)
1724 return retval;
1725
1726 return 0;
1727}
1728
1729static void __exit rtc_mini_exit(void)
1730{
1731 misc_deregister(&rtc_mini_dev);
1732}
1733
1734int __devinit read_current_timer(unsigned long *timer_val) 877int __devinit read_current_timer(unsigned long *timer_val)
1735{ 878{
1736 *timer_val = tick_ops->get_tick(); 879 *timer_val = tick_ops->get_tick();
1737 return 0; 880 return 0;
1738} 881}
1739
1740module_init(rtc_mini_init);
1741module_exit(rtc_mini_exit);
diff --git a/arch/sparc64/kernel/traps.c b/arch/sparc64/kernel/traps.c
index 3d924121c796..71644da6cad1 100644
--- a/arch/sparc64/kernel/traps.c
+++ b/arch/sparc64/kernel/traps.c
@@ -37,6 +37,7 @@
37#include <asm/timer.h> 37#include <asm/timer.h>
38#include <asm/head.h> 38#include <asm/head.h>
39#include <asm/prom.h> 39#include <asm/prom.h>
40#include <asm/memctrl.h>
40 41
41#include "entry.h" 42#include "entry.h"
42#include "kstack.h" 43#include "kstack.h"
@@ -128,6 +129,56 @@ void do_BUG(const char *file, int line)
128} 129}
129#endif 130#endif
130 131
132static DEFINE_SPINLOCK(dimm_handler_lock);
133static dimm_printer_t dimm_handler;
134
135static int sprintf_dimm(int synd_code, unsigned long paddr, char *buf, int buflen)
136{
137 unsigned long flags;
138 int ret = -ENODEV;
139
140 spin_lock_irqsave(&dimm_handler_lock, flags);
141 if (dimm_handler) {
142 ret = dimm_handler(synd_code, paddr, buf, buflen);
143 } else if (tlb_type == spitfire) {
144 if (prom_getunumber(synd_code, paddr, buf, buflen) == -1)
145 ret = -EINVAL;
146 else
147 ret = 0;
148 } else
149 ret = -ENODEV;
150 spin_unlock_irqrestore(&dimm_handler_lock, flags);
151
152 return ret;
153}
154
155int register_dimm_printer(dimm_printer_t func)
156{
157 unsigned long flags;
158 int ret = 0;
159
160 spin_lock_irqsave(&dimm_handler_lock, flags);
161 if (!dimm_handler)
162 dimm_handler = func;
163 else
164 ret = -EEXIST;
165 spin_unlock_irqrestore(&dimm_handler_lock, flags);
166
167 return ret;
168}
169EXPORT_SYMBOL_GPL(register_dimm_printer);
170
171void unregister_dimm_printer(dimm_printer_t func)
172{
173 unsigned long flags;
174
175 spin_lock_irqsave(&dimm_handler_lock, flags);
176 if (dimm_handler == func)
177 dimm_handler = NULL;
178 spin_unlock_irqrestore(&dimm_handler_lock, flags);
179}
180EXPORT_SYMBOL_GPL(unregister_dimm_printer);
181
131void spitfire_insn_access_exception(struct pt_regs *regs, unsigned long sfsr, unsigned long sfar) 182void spitfire_insn_access_exception(struct pt_regs *regs, unsigned long sfsr, unsigned long sfar)
132{ 183{
133 siginfo_t info; 184 siginfo_t info;
@@ -375,8 +426,7 @@ static void spitfire_log_udb_syndrome(unsigned long afar, unsigned long udbh, un
375 426
376 if (udbl & bit) { 427 if (udbl & bit) {
377 scode = ecc_syndrome_table[udbl & 0xff]; 428 scode = ecc_syndrome_table[udbl & 0xff];
378 if (prom_getunumber(scode, afar, 429 if (sprintf_dimm(scode, afar, memmod_str, sizeof(memmod_str)) < 0)
379 memmod_str, sizeof(memmod_str)) == -1)
380 p = syndrome_unknown; 430 p = syndrome_unknown;
381 else 431 else
382 p = memmod_str; 432 p = memmod_str;
@@ -387,8 +437,7 @@ static void spitfire_log_udb_syndrome(unsigned long afar, unsigned long udbh, un
387 437
388 if (udbh & bit) { 438 if (udbh & bit) {
389 scode = ecc_syndrome_table[udbh & 0xff]; 439 scode = ecc_syndrome_table[udbh & 0xff];
390 if (prom_getunumber(scode, afar, 440 if (sprintf_dimm(scode, afar, memmod_str, sizeof(memmod_str)) < 0)
391 memmod_str, sizeof(memmod_str)) == -1)
392 p = syndrome_unknown; 441 p = syndrome_unknown;
393 else 442 else
394 p = memmod_str; 443 p = memmod_str;
@@ -1061,8 +1110,6 @@ static const char *cheetah_get_string(unsigned long bit)
1061 return "???"; 1110 return "???";
1062} 1111}
1063 1112
1064extern int chmc_getunumber(int, unsigned long, char *, int);
1065
1066static void cheetah_log_errors(struct pt_regs *regs, struct cheetah_err_info *info, 1113static void cheetah_log_errors(struct pt_regs *regs, struct cheetah_err_info *info,
1067 unsigned long afsr, unsigned long afar, int recoverable) 1114 unsigned long afsr, unsigned long afar, int recoverable)
1068{ 1115{
@@ -1104,7 +1151,7 @@ static void cheetah_log_errors(struct pt_regs *regs, struct cheetah_err_info *in
1104 1151
1105 syndrome = (afsr & CHAFSR_E_SYNDROME) >> CHAFSR_E_SYNDROME_SHIFT; 1152 syndrome = (afsr & CHAFSR_E_SYNDROME) >> CHAFSR_E_SYNDROME_SHIFT;
1106 syndrome = cheetah_ecc_syntab[syndrome]; 1153 syndrome = cheetah_ecc_syntab[syndrome];
1107 ret = chmc_getunumber(syndrome, afar, unum, sizeof(unum)); 1154 ret = sprintf_dimm(syndrome, afar, unum, sizeof(unum));
1108 if (ret != -1) 1155 if (ret != -1)
1109 printk("%s" "ERROR(%d): AFAR E-syndrome [%s]\n", 1156 printk("%s" "ERROR(%d): AFAR E-syndrome [%s]\n",
1110 (recoverable ? KERN_WARNING : KERN_CRIT), 1157 (recoverable ? KERN_WARNING : KERN_CRIT),
@@ -1115,7 +1162,7 @@ static void cheetah_log_errors(struct pt_regs *regs, struct cheetah_err_info *in
1115 1162
1116 syndrome = (afsr & CHAFSR_M_SYNDROME) >> CHAFSR_M_SYNDROME_SHIFT; 1163 syndrome = (afsr & CHAFSR_M_SYNDROME) >> CHAFSR_M_SYNDROME_SHIFT;
1117 syndrome = cheetah_mtag_syntab[syndrome]; 1164 syndrome = cheetah_mtag_syntab[syndrome];
1118 ret = chmc_getunumber(syndrome, afar, unum, sizeof(unum)); 1165 ret = sprintf_dimm(syndrome, afar, unum, sizeof(unum));
1119 if (ret != -1) 1166 if (ret != -1)
1120 printk("%s" "ERROR(%d): AFAR M-syndrome [%s]\n", 1167 printk("%s" "ERROR(%d): AFAR M-syndrome [%s]\n",
1121 (recoverable ? KERN_WARNING : KERN_CRIT), 1168 (recoverable ? KERN_WARNING : KERN_CRIT),
diff --git a/arch/sparc64/mm/init.c b/arch/sparc64/mm/init.c
index a41df7bef035..4fb9de00fc8a 100644
--- a/arch/sparc64/mm/init.c
+++ b/arch/sparc64/mm/init.c
@@ -46,7 +46,6 @@
46#include <asm/tsb.h> 46#include <asm/tsb.h>
47#include <asm/hypervisor.h> 47#include <asm/hypervisor.h>
48#include <asm/prom.h> 48#include <asm/prom.h>
49#include <asm/sstate.h>
50#include <asm/mdesc.h> 49#include <asm/mdesc.h>
51#include <asm/cpudata.h> 50#include <asm/cpudata.h>
52#include <asm/irq.h> 51#include <asm/irq.h>
@@ -938,6 +937,10 @@ int of_node_to_nid(struct device_node *dp)
938 int count, nid; 937 int count, nid;
939 u64 grp; 938 u64 grp;
940 939
940 /* This is the right thing to do on currently supported
941 * SUN4U NUMA platforms as well, as the PCI controller does
942 * not sit behind any particular memory controller.
943 */
941 if (!mlgroups) 944 if (!mlgroups)
942 return -1; 945 return -1;
943 946
@@ -1206,8 +1209,44 @@ out:
1206 return err; 1209 return err;
1207} 1210}
1208 1211
1212static int __init numa_parse_jbus(void)
1213{
1214 unsigned long cpu, index;
1215
1216 /* NUMA node id is encoded in bits 36 and higher, and there is
1217 * a 1-to-1 mapping from CPU ID to NUMA node ID.
1218 */
1219 index = 0;
1220 for_each_present_cpu(cpu) {
1221 numa_cpu_lookup_table[cpu] = index;
1222 numa_cpumask_lookup_table[index] = cpumask_of_cpu(cpu);
1223 node_masks[index].mask = ~((1UL << 36UL) - 1UL);
1224 node_masks[index].val = cpu << 36UL;
1225
1226 index++;
1227 }
1228 num_node_masks = index;
1229
1230 add_node_ranges();
1231
1232 for (index = 0; index < num_node_masks; index++) {
1233 allocate_node_data(index);
1234 node_set_online(index);
1235 }
1236
1237 return 0;
1238}
1239
1209static int __init numa_parse_sun4u(void) 1240static int __init numa_parse_sun4u(void)
1210{ 1241{
1242 if (tlb_type == cheetah || tlb_type == cheetah_plus) {
1243 unsigned long ver;
1244
1245 __asm__ ("rdpr %%ver, %0" : "=r" (ver));
1246 if ((ver >> 32UL) == __JALAPENO_ID ||
1247 (ver >> 32UL) == __SERRANO_ID)
1248 return numa_parse_jbus();
1249 }
1211 return -1; 1250 return -1;
1212} 1251}
1213 1252
@@ -1633,8 +1672,6 @@ void __cpuinit sun4v_ktsb_register(void)
1633 1672
1634/* paging_init() sets up the page tables */ 1673/* paging_init() sets up the page tables */
1635 1674
1636extern void central_probe(void);
1637
1638static unsigned long last_valid_pfn; 1675static unsigned long last_valid_pfn;
1639pgd_t swapper_pg_dir[2048]; 1676pgd_t swapper_pg_dir[2048];
1640 1677
@@ -1679,8 +1716,6 @@ void __init paging_init(void)
1679 kern_base = (prom_boot_mapping_phys_low >> 22UL) << 22UL; 1716 kern_base = (prom_boot_mapping_phys_low >> 22UL) << 22UL;
1680 kern_size = (unsigned long)&_end - (unsigned long)KERNBASE; 1717 kern_size = (unsigned long)&_end - (unsigned long)KERNBASE;
1681 1718
1682 sstate_booting();
1683
1684 /* Invalidate both kernel TSBs. */ 1719 /* Invalidate both kernel TSBs. */
1685 memset(swapper_tsb, 0x40, sizeof(swapper_tsb)); 1720 memset(swapper_tsb, 0x40, sizeof(swapper_tsb));
1686#ifndef CONFIG_DEBUG_PAGEALLOC 1721#ifndef CONFIG_DEBUG_PAGEALLOC
@@ -1803,9 +1838,6 @@ void __init paging_init(void)
1803 } 1838 }
1804 1839
1805 printk("Booting Linux...\n"); 1840 printk("Booting Linux...\n");
1806
1807 central_probe();
1808 cpu_probe();
1809} 1841}
1810 1842
1811int __init page_in_phys_avail(unsigned long paddr) 1843int __init page_in_phys_avail(unsigned long paddr)
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-02 22:26:29 -0500