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Diffstat (limited to 'arch/sparc64/lib/mb.S')
| -rw-r--r-- | arch/sparc64/lib/mb.S | 73 |
1 files changed, 0 insertions, 73 deletions
diff --git a/arch/sparc64/lib/mb.S b/arch/sparc64/lib/mb.S deleted file mode 100644 index 4004f748619f..000000000000 --- a/arch/sparc64/lib/mb.S +++ /dev/null | |||
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| 1 | /* mb.S: Out of line memory barriers. | ||
| 2 | * | ||
| 3 | * Copyright (C) 2005 David S. Miller (davem@davemloft.net) | ||
| 4 | */ | ||
| 5 | |||
| 6 | /* These are here in an effort to more fully work around | ||
| 7 | * Spitfire Errata #51. Essentially, if a memory barrier | ||
| 8 | * occurs soon after a mispredicted branch, the chip can stop | ||
| 9 | * executing instructions until a trap occurs. Therefore, if | ||
| 10 | * interrupts are disabled, the chip can hang forever. | ||
| 11 | * | ||
| 12 | * It used to be believed that the memory barrier had to be | ||
| 13 | * right in the delay slot, but a case has been traced | ||
| 14 | * recently wherein the memory barrier was one instruction | ||
| 15 | * after the branch delay slot and the chip still hung. The | ||
| 16 | * offending sequence was the following in sym_wakeup_done() | ||
| 17 | * of the sym53c8xx_2 driver: | ||
| 18 | * | ||
| 19 | * call sym_ccb_from_dsa, 0 | ||
| 20 | * movge %icc, 0, %l0 | ||
| 21 | * brz,pn %o0, .LL1303 | ||
| 22 | * mov %o0, %l2 | ||
| 23 | * membar #LoadLoad | ||
| 24 | * | ||
| 25 | * The branch has to be mispredicted for the bug to occur. | ||
| 26 | * Therefore, we put the memory barrier explicitly into a | ||
| 27 | * "branch always, predicted taken" delay slot to avoid the | ||
| 28 | * problem case. | ||
| 29 | */ | ||
| 30 | |||
| 31 | .text | ||
| 32 | |||
| 33 | 99: retl | ||
| 34 | nop | ||
| 35 | |||
| 36 | .globl mb | ||
| 37 | mb: ba,pt %xcc, 99b | ||
| 38 | membar #LoadLoad | #LoadStore | #StoreStore | #StoreLoad | ||
| 39 | .size mb, .-mb | ||
| 40 | |||
| 41 | .globl rmb | ||
| 42 | rmb: ba,pt %xcc, 99b | ||
| 43 | membar #LoadLoad | ||
| 44 | .size rmb, .-rmb | ||
| 45 | |||
| 46 | .globl wmb | ||
| 47 | wmb: ba,pt %xcc, 99b | ||
| 48 | membar #StoreStore | ||
| 49 | .size wmb, .-wmb | ||
| 50 | |||
| 51 | .globl membar_storeload | ||
| 52 | membar_storeload: | ||
| 53 | ba,pt %xcc, 99b | ||
| 54 | membar #StoreLoad | ||
| 55 | .size membar_storeload, .-membar_storeload | ||
| 56 | |||
| 57 | .globl membar_storeload_storestore | ||
| 58 | membar_storeload_storestore: | ||
| 59 | ba,pt %xcc, 99b | ||
| 60 | membar #StoreLoad | #StoreStore | ||
| 61 | .size membar_storeload_storestore, .-membar_storeload_storestore | ||
| 62 | |||
| 63 | .globl membar_storeload_loadload | ||
| 64 | membar_storeload_loadload: | ||
| 65 | ba,pt %xcc, 99b | ||
| 66 | membar #StoreLoad | #LoadLoad | ||
| 67 | .size membar_storeload_loadload, .-membar_storeload_loadload | ||
| 68 | |||
| 69 | .globl membar_storestore_loadstore | ||
| 70 | membar_storestore_loadstore: | ||
| 71 | ba,pt %xcc, 99b | ||
| 72 | membar #StoreStore | #LoadStore | ||
| 73 | .size membar_storestore_loadstore, .-membar_storestore_loadstore | ||