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-rw-r--r--arch/sparc64/kernel/entry.S309
-rw-r--r--arch/sparc64/kernel/head.S3
-rw-r--r--arch/sparc64/kernel/kprobes.c36
-rw-r--r--arch/sparc64/kernel/pci.c3
-rw-r--r--arch/sparc64/kernel/rtrap.S13
-rw-r--r--arch/sparc64/kernel/setup.c12
-rw-r--r--arch/sparc64/kernel/sparc64_ksyms.c3
-rw-r--r--arch/sparc64/kernel/sunos_ioctl32.c9
-rw-r--r--arch/sparc64/kernel/sys_sparc32.c24
-rw-r--r--arch/sparc64/kernel/time.c2
-rw-r--r--arch/sparc64/kernel/vmlinux.lds.S1
11 files changed, 212 insertions, 203 deletions
diff --git a/arch/sparc64/kernel/entry.S b/arch/sparc64/kernel/entry.S
index cecdc0a7521f..3e0badb820c5 100644
--- a/arch/sparc64/kernel/entry.S
+++ b/arch/sparc64/kernel/entry.S
@@ -927,139 +927,6 @@ __spitfire_insn_access_exception:
927 ba,pt %xcc, rtrap 927 ba,pt %xcc, rtrap
928 clr %l6 928 clr %l6
929 929
930 /* Capture I/D/E-cache state into per-cpu error scoreboard.
931 *
932 * %g1: (TL>=0) ? 1 : 0
933 * %g2: scratch
934 * %g3: scratch
935 * %g4: AFSR
936 * %g5: AFAR
937 * %g6: current thread ptr
938 * %g7: scratch
939 */
940#define CHEETAH_LOG_ERROR \
941 /* Put "TL1" software bit into AFSR. */ \
942 and %g1, 0x1, %g1; \
943 sllx %g1, 63, %g2; \
944 or %g4, %g2, %g4; \
945 /* Get log entry pointer for this cpu at this trap level. */ \
946 BRANCH_IF_JALAPENO(g2,g3,50f) \
947 ldxa [%g0] ASI_SAFARI_CONFIG, %g2; \
948 srlx %g2, 17, %g2; \
949 ba,pt %xcc, 60f; \
950 and %g2, 0x3ff, %g2; \
95150: ldxa [%g0] ASI_JBUS_CONFIG, %g2; \
952 srlx %g2, 17, %g2; \
953 and %g2, 0x1f, %g2; \
95460: sllx %g2, 9, %g2; \
955 sethi %hi(cheetah_error_log), %g3; \
956 ldx [%g3 + %lo(cheetah_error_log)], %g3; \
957 brz,pn %g3, 80f; \
958 nop; \
959 add %g3, %g2, %g3; \
960 sllx %g1, 8, %g1; \
961 add %g3, %g1, %g1; \
962 /* %g1 holds pointer to the top of the logging scoreboard */ \
963 ldx [%g1 + 0x0], %g7; \
964 cmp %g7, -1; \
965 bne,pn %xcc, 80f; \
966 nop; \
967 stx %g4, [%g1 + 0x0]; \
968 stx %g5, [%g1 + 0x8]; \
969 add %g1, 0x10, %g1; \
970 /* %g1 now points to D-cache logging area */ \
971 set 0x3ff8, %g2; /* DC_addr mask */ \
972 and %g5, %g2, %g2; /* DC_addr bits of AFAR */ \
973 srlx %g5, 12, %g3; \
974 or %g3, 1, %g3; /* PHYS tag + valid */ \
97510: ldxa [%g2] ASI_DCACHE_TAG, %g7; \
976 cmp %g3, %g7; /* TAG match? */ \
977 bne,pt %xcc, 13f; \
978 nop; \
979 /* Yep, what we want, capture state. */ \
980 stx %g2, [%g1 + 0x20]; \
981 stx %g7, [%g1 + 0x28]; \
982 /* A membar Sync is required before and after utag access. */ \
983 membar #Sync; \
984 ldxa [%g2] ASI_DCACHE_UTAG, %g7; \
985 membar #Sync; \
986 stx %g7, [%g1 + 0x30]; \
987 ldxa [%g2] ASI_DCACHE_SNOOP_TAG, %g7; \
988 stx %g7, [%g1 + 0x38]; \
989 clr %g3; \
99012: ldxa [%g2 + %g3] ASI_DCACHE_DATA, %g7; \
991 stx %g7, [%g1]; \
992 add %g3, (1 << 5), %g3; \
993 cmp %g3, (4 << 5); \
994 bl,pt %xcc, 12b; \
995 add %g1, 0x8, %g1; \
996 ba,pt %xcc, 20f; \
997 add %g1, 0x20, %g1; \
99813: sethi %hi(1 << 14), %g7; \
999 add %g2, %g7, %g2; \
1000 srlx %g2, 14, %g7; \
1001 cmp %g7, 4; \
1002 bl,pt %xcc, 10b; \
1003 nop; \
1004 add %g1, 0x40, %g1; \
100520: /* %g1 now points to I-cache logging area */ \
1006 set 0x1fe0, %g2; /* IC_addr mask */ \
1007 and %g5, %g2, %g2; /* IC_addr bits of AFAR */ \
1008 sllx %g2, 1, %g2; /* IC_addr[13:6]==VA[12:5] */ \
1009 srlx %g5, (13 - 8), %g3; /* Make PTAG */ \
1010 andn %g3, 0xff, %g3; /* Mask off undefined bits */ \
101121: ldxa [%g2] ASI_IC_TAG, %g7; \
1012 andn %g7, 0xff, %g7; \
1013 cmp %g3, %g7; \
1014 bne,pt %xcc, 23f; \
1015 nop; \
1016 /* Yep, what we want, capture state. */ \
1017 stx %g2, [%g1 + 0x40]; \
1018 stx %g7, [%g1 + 0x48]; \
1019 add %g2, (1 << 3), %g2; \
1020 ldxa [%g2] ASI_IC_TAG, %g7; \
1021 add %g2, (1 << 3), %g2; \
1022 stx %g7, [%g1 + 0x50]; \
1023 ldxa [%g2] ASI_IC_TAG, %g7; \
1024 add %g2, (1 << 3), %g2; \
1025 stx %g7, [%g1 + 0x60]; \
1026 ldxa [%g2] ASI_IC_TAG, %g7; \
1027 stx %g7, [%g1 + 0x68]; \
1028 sub %g2, (3 << 3), %g2; \
1029 ldxa [%g2] ASI_IC_STAG, %g7; \
1030 stx %g7, [%g1 + 0x58]; \
1031 clr %g3; \
1032 srlx %g2, 2, %g2; \
103322: ldxa [%g2 + %g3] ASI_IC_INSTR, %g7; \
1034 stx %g7, [%g1]; \
1035 add %g3, (1 << 3), %g3; \
1036 cmp %g3, (8 << 3); \
1037 bl,pt %xcc, 22b; \
1038 add %g1, 0x8, %g1; \
1039 ba,pt %xcc, 30f; \
1040 add %g1, 0x30, %g1; \
104123: sethi %hi(1 << 14), %g7; \
1042 add %g2, %g7, %g2; \
1043 srlx %g2, 14, %g7; \
1044 cmp %g7, 4; \
1045 bl,pt %xcc, 21b; \
1046 nop; \
1047 add %g1, 0x70, %g1; \
104830: /* %g1 now points to E-cache logging area */ \
1049 andn %g5, (32 - 1), %g2; /* E-cache subblock */ \
1050 stx %g2, [%g1 + 0x20]; \
1051 ldxa [%g2] ASI_EC_TAG_DATA, %g7; \
1052 stx %g7, [%g1 + 0x28]; \
1053 ldxa [%g2] ASI_EC_R, %g0; \
1054 clr %g3; \
105531: ldxa [%g3] ASI_EC_DATA, %g7; \
1056 stx %g7, [%g1 + %g3]; \
1057 add %g3, 0x8, %g3; \
1058 cmp %g3, 0x20; \
1059 bl,pt %xcc, 31b; \
1060 nop; \
106180: /* DONE */
1062
1063 /* These get patched into the trap table at boot time 930 /* These get patched into the trap table at boot time
1064 * once we know we have a cheetah processor. 931 * once we know we have a cheetah processor.
1065 */ 932 */
@@ -1296,6 +1163,170 @@ dcpe_icpe_tl1_common:
1296 membar #Sync 1163 membar #Sync
1297 retry 1164 retry
1298 1165
1166 /* Capture I/D/E-cache state into per-cpu error scoreboard.
1167 *
1168 * %g1: (TL>=0) ? 1 : 0
1169 * %g2: scratch
1170 * %g3: scratch
1171 * %g4: AFSR
1172 * %g5: AFAR
1173 * %g6: current thread ptr
1174 * %g7: scratch
1175 */
1176__cheetah_log_error:
1177 /* Put "TL1" software bit into AFSR. */
1178 and %g1, 0x1, %g1
1179 sllx %g1, 63, %g2
1180 or %g4, %g2, %g4
1181
1182 /* Get log entry pointer for this cpu at this trap level. */
1183 BRANCH_IF_JALAPENO(g2,g3,50f)
1184 ldxa [%g0] ASI_SAFARI_CONFIG, %g2
1185 srlx %g2, 17, %g2
1186 ba,pt %xcc, 60f
1187 and %g2, 0x3ff, %g2
1188
118950: ldxa [%g0] ASI_JBUS_CONFIG, %g2
1190 srlx %g2, 17, %g2
1191 and %g2, 0x1f, %g2
1192
119360: sllx %g2, 9, %g2
1194 sethi %hi(cheetah_error_log), %g3
1195 ldx [%g3 + %lo(cheetah_error_log)], %g3
1196 brz,pn %g3, 80f
1197 nop
1198
1199 add %g3, %g2, %g3
1200 sllx %g1, 8, %g1
1201 add %g3, %g1, %g1
1202
1203 /* %g1 holds pointer to the top of the logging scoreboard */
1204 ldx [%g1 + 0x0], %g7
1205 cmp %g7, -1
1206 bne,pn %xcc, 80f
1207 nop
1208
1209 stx %g4, [%g1 + 0x0]
1210 stx %g5, [%g1 + 0x8]
1211 add %g1, 0x10, %g1
1212
1213 /* %g1 now points to D-cache logging area */
1214 set 0x3ff8, %g2 /* DC_addr mask */
1215 and %g5, %g2, %g2 /* DC_addr bits of AFAR */
1216 srlx %g5, 12, %g3
1217 or %g3, 1, %g3 /* PHYS tag + valid */
1218
121910: ldxa [%g2] ASI_DCACHE_TAG, %g7
1220 cmp %g3, %g7 /* TAG match? */
1221 bne,pt %xcc, 13f
1222 nop
1223
1224 /* Yep, what we want, capture state. */
1225 stx %g2, [%g1 + 0x20]
1226 stx %g7, [%g1 + 0x28]
1227
1228 /* A membar Sync is required before and after utag access. */
1229 membar #Sync
1230 ldxa [%g2] ASI_DCACHE_UTAG, %g7
1231 membar #Sync
1232 stx %g7, [%g1 + 0x30]
1233 ldxa [%g2] ASI_DCACHE_SNOOP_TAG, %g7
1234 stx %g7, [%g1 + 0x38]
1235 clr %g3
1236
123712: ldxa [%g2 + %g3] ASI_DCACHE_DATA, %g7
1238 stx %g7, [%g1]
1239 add %g3, (1 << 5), %g3
1240 cmp %g3, (4 << 5)
1241 bl,pt %xcc, 12b
1242 add %g1, 0x8, %g1
1243
1244 ba,pt %xcc, 20f
1245 add %g1, 0x20, %g1
1246
124713: sethi %hi(1 << 14), %g7
1248 add %g2, %g7, %g2
1249 srlx %g2, 14, %g7
1250 cmp %g7, 4
1251 bl,pt %xcc, 10b
1252 nop
1253
1254 add %g1, 0x40, %g1
1255
1256 /* %g1 now points to I-cache logging area */
125720: set 0x1fe0, %g2 /* IC_addr mask */
1258 and %g5, %g2, %g2 /* IC_addr bits of AFAR */
1259 sllx %g2, 1, %g2 /* IC_addr[13:6]==VA[12:5] */
1260 srlx %g5, (13 - 8), %g3 /* Make PTAG */
1261 andn %g3, 0xff, %g3 /* Mask off undefined bits */
1262
126321: ldxa [%g2] ASI_IC_TAG, %g7
1264 andn %g7, 0xff, %g7
1265 cmp %g3, %g7
1266 bne,pt %xcc, 23f
1267 nop
1268
1269 /* Yep, what we want, capture state. */
1270 stx %g2, [%g1 + 0x40]
1271 stx %g7, [%g1 + 0x48]
1272 add %g2, (1 << 3), %g2
1273 ldxa [%g2] ASI_IC_TAG, %g7
1274 add %g2, (1 << 3), %g2
1275 stx %g7, [%g1 + 0x50]
1276 ldxa [%g2] ASI_IC_TAG, %g7
1277 add %g2, (1 << 3), %g2
1278 stx %g7, [%g1 + 0x60]
1279 ldxa [%g2] ASI_IC_TAG, %g7
1280 stx %g7, [%g1 + 0x68]
1281 sub %g2, (3 << 3), %g2
1282 ldxa [%g2] ASI_IC_STAG, %g7
1283 stx %g7, [%g1 + 0x58]
1284 clr %g3
1285 srlx %g2, 2, %g2
1286
128722: ldxa [%g2 + %g3] ASI_IC_INSTR, %g7
1288 stx %g7, [%g1]
1289 add %g3, (1 << 3), %g3
1290 cmp %g3, (8 << 3)
1291 bl,pt %xcc, 22b
1292 add %g1, 0x8, %g1
1293
1294 ba,pt %xcc, 30f
1295 add %g1, 0x30, %g1
1296
129723: sethi %hi(1 << 14), %g7
1298 add %g2, %g7, %g2
1299 srlx %g2, 14, %g7
1300 cmp %g7, 4
1301 bl,pt %xcc, 21b
1302 nop
1303
1304 add %g1, 0x70, %g1
1305
1306 /* %g1 now points to E-cache logging area */
130730: andn %g5, (32 - 1), %g2
1308 stx %g2, [%g1 + 0x20]
1309 ldxa [%g2] ASI_EC_TAG_DATA, %g7
1310 stx %g7, [%g1 + 0x28]
1311 ldxa [%g2] ASI_EC_R, %g0
1312 clr %g3
1313
131431: ldxa [%g3] ASI_EC_DATA, %g7
1315 stx %g7, [%g1 + %g3]
1316 add %g3, 0x8, %g3
1317 cmp %g3, 0x20
1318
1319 bl,pt %xcc, 31b
1320 nop
132180:
1322 rdpr %tt, %g2
1323 cmp %g2, 0x70
1324 be c_fast_ecc
1325 cmp %g2, 0x63
1326 be c_cee
1327 nop
1328 ba,pt %xcc, c_deferred
1329
1299 /* Cheetah FECC trap handling, we get here from tl{0,1}_fecc 1330 /* Cheetah FECC trap handling, we get here from tl{0,1}_fecc
1300 * in the trap table. That code has done a memory barrier 1331 * in the trap table. That code has done a memory barrier
1301 * and has disabled both the I-cache and D-cache in the DCU 1332 * and has disabled both the I-cache and D-cache in the DCU
@@ -1321,8 +1352,10 @@ cheetah_fast_ecc:
1321 stxa %g4, [%g0] ASI_AFSR 1352 stxa %g4, [%g0] ASI_AFSR
1322 membar #Sync 1353 membar #Sync
1323 1354
1324 CHEETAH_LOG_ERROR 1355 ba,pt %xcc, __cheetah_log_error
1356 nop
1325 1357
1358c_fast_ecc:
1326 rdpr %pil, %g2 1359 rdpr %pil, %g2
1327 wrpr %g0, 15, %pil 1360 wrpr %g0, 15, %pil
1328 ba,pt %xcc, etrap_irq 1361 ba,pt %xcc, etrap_irq
@@ -1347,8 +1380,10 @@ cheetah_cee:
1347 stxa %g4, [%g0] ASI_AFSR 1380 stxa %g4, [%g0] ASI_AFSR
1348 membar #Sync 1381 membar #Sync
1349 1382
1350 CHEETAH_LOG_ERROR 1383 ba,pt %xcc, __cheetah_log_error
1384 nop
1351 1385
1386c_cee:
1352 rdpr %pil, %g2 1387 rdpr %pil, %g2
1353 wrpr %g0, 15, %pil 1388 wrpr %g0, 15, %pil
1354 ba,pt %xcc, etrap_irq 1389 ba,pt %xcc, etrap_irq
@@ -1373,8 +1408,10 @@ cheetah_deferred_trap:
1373 stxa %g4, [%g0] ASI_AFSR 1408 stxa %g4, [%g0] ASI_AFSR
1374 membar #Sync 1409 membar #Sync
1375 1410
1376 CHEETAH_LOG_ERROR 1411 ba,pt %xcc, __cheetah_log_error
1412 nop
1377 1413
1414c_deferred:
1378 rdpr %pil, %g2 1415 rdpr %pil, %g2
1379 wrpr %g0, 15, %pil 1416 wrpr %g0, 15, %pil
1380 ba,pt %xcc, etrap_irq 1417 ba,pt %xcc, etrap_irq
diff --git a/arch/sparc64/kernel/head.S b/arch/sparc64/kernel/head.S
index 8104a56ca2d8..1fa06c4e3bdb 100644
--- a/arch/sparc64/kernel/head.S
+++ b/arch/sparc64/kernel/head.S
@@ -538,11 +538,12 @@ cheetah_tlb_fixup:
538 nop 538 nop
539 call cheetah_plus_patch_winfixup 539 call cheetah_plus_patch_winfixup
540 nop 540 nop
541
542 541
5432: /* Patch copy/page operations to cheetah optimized versions. */ 5422: /* Patch copy/page operations to cheetah optimized versions. */
544 call cheetah_patch_copyops 543 call cheetah_patch_copyops
545 nop 544 nop
545 call cheetah_patch_copy_page
546 nop
546 call cheetah_patch_cachetlbops 547 call cheetah_patch_cachetlbops
547 nop 548 nop
548 549
diff --git a/arch/sparc64/kernel/kprobes.c b/arch/sparc64/kernel/kprobes.c
index bbf11f85dab1..0d66d07c8c6e 100644
--- a/arch/sparc64/kernel/kprobes.c
+++ b/arch/sparc64/kernel/kprobes.c
@@ -8,6 +8,7 @@
8#include <linux/kprobes.h> 8#include <linux/kprobes.h>
9#include <asm/kdebug.h> 9#include <asm/kdebug.h>
10#include <asm/signal.h> 10#include <asm/signal.h>
11#include <asm/cacheflush.h>
11 12
12/* We do not have hardware single-stepping on sparc64. 13/* We do not have hardware single-stepping on sparc64.
13 * So we implement software single-stepping with breakpoint 14 * So we implement software single-stepping with breakpoint
@@ -37,31 +38,31 @@
37 * - Mark that we are no longer actively in a kprobe. 38 * - Mark that we are no longer actively in a kprobe.
38 */ 39 */
39 40
40int arch_prepare_kprobe(struct kprobe *p) 41int __kprobes arch_prepare_kprobe(struct kprobe *p)
41{ 42{
42 return 0; 43 return 0;
43} 44}
44 45
45void arch_copy_kprobe(struct kprobe *p) 46void __kprobes arch_copy_kprobe(struct kprobe *p)
46{ 47{
47 p->ainsn.insn[0] = *p->addr; 48 p->ainsn.insn[0] = *p->addr;
48 p->ainsn.insn[1] = BREAKPOINT_INSTRUCTION_2; 49 p->ainsn.insn[1] = BREAKPOINT_INSTRUCTION_2;
49 p->opcode = *p->addr; 50 p->opcode = *p->addr;
50} 51}
51 52
52void arch_arm_kprobe(struct kprobe *p) 53void __kprobes arch_arm_kprobe(struct kprobe *p)
53{ 54{
54 *p->addr = BREAKPOINT_INSTRUCTION; 55 *p->addr = BREAKPOINT_INSTRUCTION;
55 flushi(p->addr); 56 flushi(p->addr);
56} 57}
57 58
58void arch_disarm_kprobe(struct kprobe *p) 59void __kprobes arch_disarm_kprobe(struct kprobe *p)
59{ 60{
60 *p->addr = p->opcode; 61 *p->addr = p->opcode;
61 flushi(p->addr); 62 flushi(p->addr);
62} 63}
63 64
64void arch_remove_kprobe(struct kprobe *p) 65void __kprobes arch_remove_kprobe(struct kprobe *p)
65{ 66{
66} 67}
67 68
@@ -111,7 +112,7 @@ static inline void prepare_singlestep(struct kprobe *p, struct pt_regs *regs)
111 } 112 }
112} 113}
113 114
114static int kprobe_handler(struct pt_regs *regs) 115static int __kprobes kprobe_handler(struct pt_regs *regs)
115{ 116{
116 struct kprobe *p; 117 struct kprobe *p;
117 void *addr = (void *) regs->tpc; 118 void *addr = (void *) regs->tpc;
@@ -191,8 +192,9 @@ no_kprobe:
191 * The original INSN location was REAL_PC, it actually 192 * The original INSN location was REAL_PC, it actually
192 * executed at PC and produced destination address NPC. 193 * executed at PC and produced destination address NPC.
193 */ 194 */
194static unsigned long relbranch_fixup(u32 insn, unsigned long real_pc, 195static unsigned long __kprobes relbranch_fixup(u32 insn, unsigned long real_pc,
195 unsigned long pc, unsigned long npc) 196 unsigned long pc,
197 unsigned long npc)
196{ 198{
197 /* Branch not taken, no mods necessary. */ 199 /* Branch not taken, no mods necessary. */
198 if (npc == pc + 0x4UL) 200 if (npc == pc + 0x4UL)
@@ -217,7 +219,8 @@ static unsigned long relbranch_fixup(u32 insn, unsigned long real_pc,
217/* If INSN is an instruction which writes it's PC location 219/* If INSN is an instruction which writes it's PC location
218 * into a destination register, fix that up. 220 * into a destination register, fix that up.
219 */ 221 */
220static void retpc_fixup(struct pt_regs *regs, u32 insn, unsigned long real_pc) 222static void __kprobes retpc_fixup(struct pt_regs *regs, u32 insn,
223 unsigned long real_pc)
221{ 224{
222 unsigned long *slot = NULL; 225 unsigned long *slot = NULL;
223 226
@@ -257,7 +260,7 @@ static void retpc_fixup(struct pt_regs *regs, u32 insn, unsigned long real_pc)
257 * This function prepares to return from the post-single-step 260 * This function prepares to return from the post-single-step
258 * breakpoint trap. 261 * breakpoint trap.
259 */ 262 */
260static void resume_execution(struct kprobe *p, struct pt_regs *regs) 263static void __kprobes resume_execution(struct kprobe *p, struct pt_regs *regs)
261{ 264{
262 u32 insn = p->ainsn.insn[0]; 265 u32 insn = p->ainsn.insn[0];
263 266
@@ -315,8 +318,8 @@ static inline int kprobe_fault_handler(struct pt_regs *regs, int trapnr)
315/* 318/*
316 * Wrapper routine to for handling exceptions. 319 * Wrapper routine to for handling exceptions.
317 */ 320 */
318int kprobe_exceptions_notify(struct notifier_block *self, unsigned long val, 321int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
319 void *data) 322 unsigned long val, void *data)
320{ 323{
321 struct die_args *args = (struct die_args *)data; 324 struct die_args *args = (struct die_args *)data;
322 switch (val) { 325 switch (val) {
@@ -344,7 +347,8 @@ int kprobe_exceptions_notify(struct notifier_block *self, unsigned long val,
344 return NOTIFY_DONE; 347 return NOTIFY_DONE;
345} 348}
346 349
347asmlinkage void kprobe_trap(unsigned long trap_level, struct pt_regs *regs) 350asmlinkage void __kprobes kprobe_trap(unsigned long trap_level,
351 struct pt_regs *regs)
348{ 352{
349 BUG_ON(trap_level != 0x170 && trap_level != 0x171); 353 BUG_ON(trap_level != 0x170 && trap_level != 0x171);
350 354
@@ -368,7 +372,7 @@ static struct pt_regs jprobe_saved_regs;
368static struct pt_regs *jprobe_saved_regs_location; 372static struct pt_regs *jprobe_saved_regs_location;
369static struct sparc_stackf jprobe_saved_stack; 373static struct sparc_stackf jprobe_saved_stack;
370 374
371int setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs) 375int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs)
372{ 376{
373 struct jprobe *jp = container_of(p, struct jprobe, kp); 377 struct jprobe *jp = container_of(p, struct jprobe, kp);
374 378
@@ -390,7 +394,7 @@ int setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs)
390 return 1; 394 return 1;
391} 395}
392 396
393void jprobe_return(void) 397void __kprobes jprobe_return(void)
394{ 398{
395 preempt_enable_no_resched(); 399 preempt_enable_no_resched();
396 __asm__ __volatile__( 400 __asm__ __volatile__(
@@ -403,7 +407,7 @@ extern void jprobe_return_trap_instruction(void);
403 407
404extern void __show_regs(struct pt_regs * regs); 408extern void __show_regs(struct pt_regs * regs);
405 409
406int longjmp_break_handler(struct kprobe *p, struct pt_regs *regs) 410int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
407{ 411{
408 u32 *addr = (u32 *) regs->tpc; 412 u32 *addr = (u32 *) regs->tpc;
409 413
diff --git a/arch/sparc64/kernel/pci.c b/arch/sparc64/kernel/pci.c
index f21c993f8856..ec8bf4012c0c 100644
--- a/arch/sparc64/kernel/pci.c
+++ b/arch/sparc64/kernel/pci.c
@@ -736,8 +736,7 @@ static void __pci_mmap_set_flags(struct pci_dev *dev, struct vm_area_struct *vma
736static void __pci_mmap_set_pgprot(struct pci_dev *dev, struct vm_area_struct *vma, 736static void __pci_mmap_set_pgprot(struct pci_dev *dev, struct vm_area_struct *vma,
737 enum pci_mmap_state mmap_state) 737 enum pci_mmap_state mmap_state)
738{ 738{
739 /* Our io_remap_page_range/io_remap_pfn_range takes care of this, 739 /* Our io_remap_pfn_range takes care of this, do nothing. */
740 do nothing. */
741} 740}
742 741
743/* Perform the actual remap of the pages for a PCI device mapping, as appropriate 742/* Perform the actual remap of the pages for a PCI device mapping, as appropriate
diff --git a/arch/sparc64/kernel/rtrap.S b/arch/sparc64/kernel/rtrap.S
index 0696ed4b9d64..fafd227735fa 100644
--- a/arch/sparc64/kernel/rtrap.S
+++ b/arch/sparc64/kernel/rtrap.S
@@ -153,11 +153,14 @@ __handle_signal:
153rtrap_irq: 153rtrap_irq:
154rtrap_clr_l6: clr %l6 154rtrap_clr_l6: clr %l6
155rtrap: 155rtrap:
156 ldub [%g6 + TI_CPU], %l0 156#ifndef CONFIG_SMP
157 sethi %hi(irq_stat), %l2 ! &softirq_active 157 sethi %hi(per_cpu____cpu_data), %l0
158 or %l2, %lo(irq_stat), %l2 ! &softirq_active 158 lduw [%l0 + %lo(per_cpu____cpu_data)], %l1
159irqsz_patchme: sllx %l0, 0, %l0 159#else
160 lduw [%l2 + %l0], %l1 ! softirq_pending 160 sethi %hi(per_cpu____cpu_data), %l0
161 or %l0, %lo(per_cpu____cpu_data), %l0
162 lduw [%l0 + %g5], %l1
163#endif
161 cmp %l1, 0 164 cmp %l1, 0
162 165
163 /* mm/ultra.S:xcall_report_regs KNOWS about this load. */ 166 /* mm/ultra.S:xcall_report_regs KNOWS about this load. */
diff --git a/arch/sparc64/kernel/setup.c b/arch/sparc64/kernel/setup.c
index fbdfed3798d8..ddbed3341a23 100644
--- a/arch/sparc64/kernel/setup.c
+++ b/arch/sparc64/kernel/setup.c
@@ -511,18 +511,6 @@ void __init setup_arch(char **cmdline_p)
511 conswitchp = &prom_con; 511 conswitchp = &prom_con;
512#endif 512#endif
513 513
514#ifdef CONFIG_SMP
515 i = (unsigned long)&irq_stat[1] - (unsigned long)&irq_stat[0];
516 if ((i == SMP_CACHE_BYTES) || (i == (2 * SMP_CACHE_BYTES))) {
517 extern unsigned int irqsz_patchme[1];
518 irqsz_patchme[0] |= ((i == SMP_CACHE_BYTES) ? SMP_CACHE_BYTES_SHIFT : \
519 SMP_CACHE_BYTES_SHIFT + 1);
520 flushi((long)&irqsz_patchme[0]);
521 } else {
522 prom_printf("Unexpected size of irq_stat[] elements\n");
523 prom_halt();
524 }
525#endif
526 /* Work out if we are starfire early on */ 514 /* Work out if we are starfire early on */
527 check_if_starfire(); 515 check_if_starfire();
528 516
diff --git a/arch/sparc64/kernel/sparc64_ksyms.c b/arch/sparc64/kernel/sparc64_ksyms.c
index a3ea697f1adb..d89fc24808d3 100644
--- a/arch/sparc64/kernel/sparc64_ksyms.c
+++ b/arch/sparc64/kernel/sparc64_ksyms.c
@@ -88,8 +88,6 @@ extern int svr4_setcontext(svr4_ucontext_t *uc, struct pt_regs *regs);
88extern int compat_sys_ioctl(unsigned int fd, unsigned int cmd, u32 arg); 88extern int compat_sys_ioctl(unsigned int fd, unsigned int cmd, u32 arg);
89extern int (*handle_mathemu)(struct pt_regs *, struct fpustate *); 89extern int (*handle_mathemu)(struct pt_regs *, struct fpustate *);
90extern long sparc32_open(const char __user * filename, int flags, int mode); 90extern long sparc32_open(const char __user * filename, int flags, int mode);
91extern int io_remap_page_range(struct vm_area_struct *vma, unsigned long from,
92 unsigned long offset, unsigned long size, pgprot_t prot, int space);
93extern int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from, 91extern int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from,
94 unsigned long pfn, unsigned long size, pgprot_t prot); 92 unsigned long pfn, unsigned long size, pgprot_t prot);
95extern void (*prom_palette)(int); 93extern void (*prom_palette)(int);
@@ -245,7 +243,6 @@ EXPORT_SYMBOL(pci_dma_supported);
245#endif 243#endif
246 244
247/* I/O device mmaping on Sparc64. */ 245/* I/O device mmaping on Sparc64. */
248EXPORT_SYMBOL(io_remap_page_range);
249EXPORT_SYMBOL(io_remap_pfn_range); 246EXPORT_SYMBOL(io_remap_pfn_range);
250 247
251/* Solaris/SunOS binary compatibility */ 248/* Solaris/SunOS binary compatibility */
diff --git a/arch/sparc64/kernel/sunos_ioctl32.c b/arch/sparc64/kernel/sunos_ioctl32.c
index 87c1aeb02220..7654b8a7f03a 100644
--- a/arch/sparc64/kernel/sunos_ioctl32.c
+++ b/arch/sparc64/kernel/sunos_ioctl32.c
@@ -152,11 +152,12 @@ asmlinkage int sunos_ioctl (int fd, u32 cmd, u32 arg)
152 ret = compat_sys_ioctl(fd, SIOCGIFCONF, arg); 152 ret = compat_sys_ioctl(fd, SIOCGIFCONF, arg);
153 goto out; 153 goto out;
154 154
155 case _IOW('i', 21, struct ifreq): /* SIOCSIFMTU */ 155 case _IOW('i', 21, struct ifreq32):
156 ret = sys_ioctl(fd, SIOCSIFMTU, arg); 156 ret = compat_sys_ioctl(fd, SIOCSIFMTU, arg);
157 goto out; 157 goto out;
158 case _IOWR('i', 22, struct ifreq): /* SIOCGIFMTU */ 158
159 ret = sys_ioctl(fd, SIOCGIFMTU, arg); 159 case _IOWR('i', 22, struct ifreq32):
160 ret = compat_sys_ioctl(fd, SIOCGIFMTU, arg);
160 goto out; 161 goto out;
161 162
162 case _IOWR('i', 23, struct ifreq32): 163 case _IOWR('i', 23, struct ifreq32):
diff --git a/arch/sparc64/kernel/sys_sparc32.c b/arch/sparc64/kernel/sys_sparc32.c
index 1d3aa588df8a..7f6239ed2521 100644
--- a/arch/sparc64/kernel/sys_sparc32.c
+++ b/arch/sparc64/kernel/sys_sparc32.c
@@ -1002,29 +1002,7 @@ asmlinkage long sys32_adjtimex(struct timex32 __user *utp)
1002asmlinkage long sparc32_open(const char __user *filename, 1002asmlinkage long sparc32_open(const char __user *filename,
1003 int flags, int mode) 1003 int flags, int mode)
1004{ 1004{
1005 char * tmp; 1005 return do_sys_open(filename, flags, mode);
1006 int fd, error;
1007
1008 tmp = getname(filename);
1009 fd = PTR_ERR(tmp);
1010 if (!IS_ERR(tmp)) {
1011 fd = get_unused_fd();
1012 if (fd >= 0) {
1013 struct file * f = filp_open(tmp, flags, mode);
1014 error = PTR_ERR(f);
1015 if (IS_ERR(f))
1016 goto out_error;
1017 fd_install(fd, f);
1018 }
1019out:
1020 putname(tmp);
1021 }
1022 return fd;
1023
1024out_error:
1025 put_unused_fd(fd);
1026 fd = error;
1027 goto out;
1028} 1006}
1029 1007
1030extern unsigned long do_mremap(unsigned long addr, 1008extern unsigned long do_mremap(unsigned long addr,
diff --git a/arch/sparc64/kernel/time.c b/arch/sparc64/kernel/time.c
index 362b9c26871b..3f08a32f51a1 100644
--- a/arch/sparc64/kernel/time.c
+++ b/arch/sparc64/kernel/time.c
@@ -449,7 +449,7 @@ static inline void timer_check_rtc(void)
449 static long last_rtc_update; 449 static long last_rtc_update;
450 450
451 /* Determine when to update the Mostek clock. */ 451 /* Determine when to update the Mostek clock. */
452 if ((time_status & STA_UNSYNC) == 0 && 452 if (ntp_synced() &&
453 xtime.tv_sec > last_rtc_update + 660 && 453 xtime.tv_sec > last_rtc_update + 660 &&
454 (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 && 454 (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
455 (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) { 455 (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
diff --git a/arch/sparc64/kernel/vmlinux.lds.S b/arch/sparc64/kernel/vmlinux.lds.S
index 950423da8a6a..f47d0be39378 100644
--- a/arch/sparc64/kernel/vmlinux.lds.S
+++ b/arch/sparc64/kernel/vmlinux.lds.S
@@ -17,6 +17,7 @@ SECTIONS
17 *(.text) 17 *(.text)
18 SCHED_TEXT 18 SCHED_TEXT
19 LOCK_TEXT 19 LOCK_TEXT
20 KPROBES_TEXT
20 *(.gnu.warning) 21 *(.gnu.warning)
21 } =0 22 } =0
22 _etext = .; 23 _etext = .;
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-04 21:10:02 -0500