diff options
Diffstat (limited to 'arch/sparc64/kernel/sun4v_tlb_miss.S')
-rw-r--r-- | arch/sparc64/kernel/sun4v_tlb_miss.S | 39 |
1 files changed, 22 insertions, 17 deletions
diff --git a/arch/sparc64/kernel/sun4v_tlb_miss.S b/arch/sparc64/kernel/sun4v_tlb_miss.S index ab23ddb7116e..b731881224e8 100644 --- a/arch/sparc64/kernel/sun4v_tlb_miss.S +++ b/arch/sparc64/kernel/sun4v_tlb_miss.S | |||
@@ -29,15 +29,15 @@ | |||
29 | * | 29 | * |
30 | * index_mask = (512 << (tsb_reg & 0x7UL)) - 1UL; | 30 | * index_mask = (512 << (tsb_reg & 0x7UL)) - 1UL; |
31 | * tsb_base = tsb_reg & ~0x7UL; | 31 | * tsb_base = tsb_reg & ~0x7UL; |
32 | * tsb_index = ((vaddr >> PAGE_SHIFT) & tsb_mask); | 32 | * tsb_index = ((vaddr >> HASH_SHIFT) & tsb_mask); |
33 | * tsb_ptr = tsb_base + (tsb_index * 16); | 33 | * tsb_ptr = tsb_base + (tsb_index * 16); |
34 | */ | 34 | */ |
35 | #define COMPUTE_TSB_PTR(TSB_PTR, VADDR, TMP1, TMP2) \ | 35 | #define COMPUTE_TSB_PTR(TSB_PTR, VADDR, HASH_SHIFT, TMP1, TMP2) \ |
36 | and TSB_PTR, 0x7, TMP1; \ | 36 | and TSB_PTR, 0x7, TMP1; \ |
37 | mov 512, TMP2; \ | 37 | mov 512, TMP2; \ |
38 | andn TSB_PTR, 0x7, TSB_PTR; \ | 38 | andn TSB_PTR, 0x7, TSB_PTR; \ |
39 | sllx TMP2, TMP1, TMP2; \ | 39 | sllx TMP2, TMP1, TMP2; \ |
40 | srlx VADDR, PAGE_SHIFT, TMP1; \ | 40 | srlx VADDR, HASH_SHIFT, TMP1; \ |
41 | sub TMP2, 1, TMP2; \ | 41 | sub TMP2, 1, TMP2; \ |
42 | and TMP1, TMP2, TMP1; \ | 42 | and TMP1, TMP2, TMP1; \ |
43 | sllx TMP1, 4, TMP1; \ | 43 | sllx TMP1, 4, TMP1; \ |
@@ -53,7 +53,7 @@ sun4v_itlb_miss: | |||
53 | 53 | ||
54 | LOAD_ITLB_INFO(%g2, %g4, %g5) | 54 | LOAD_ITLB_INFO(%g2, %g4, %g5) |
55 | COMPUTE_TAG_TARGET(%g6, %g4, %g5, kvmap_itlb_4v) | 55 | COMPUTE_TAG_TARGET(%g6, %g4, %g5, kvmap_itlb_4v) |
56 | COMPUTE_TSB_PTR(%g1, %g4, %g3, %g7) | 56 | COMPUTE_TSB_PTR(%g1, %g4, PAGE_SHIFT, %g3, %g7) |
57 | 57 | ||
58 | /* Load TSB tag/pte into %g2/%g3 and compare the tag. */ | 58 | /* Load TSB tag/pte into %g2/%g3 and compare the tag. */ |
59 | ldda [%g1] ASI_QUAD_LDD_PHYS_4V, %g2 | 59 | ldda [%g1] ASI_QUAD_LDD_PHYS_4V, %g2 |
@@ -99,7 +99,7 @@ sun4v_dtlb_miss: | |||
99 | 99 | ||
100 | LOAD_DTLB_INFO(%g2, %g4, %g5) | 100 | LOAD_DTLB_INFO(%g2, %g4, %g5) |
101 | COMPUTE_TAG_TARGET(%g6, %g4, %g5, kvmap_dtlb_4v) | 101 | COMPUTE_TAG_TARGET(%g6, %g4, %g5, kvmap_dtlb_4v) |
102 | COMPUTE_TSB_PTR(%g1, %g4, %g3, %g7) | 102 | COMPUTE_TSB_PTR(%g1, %g4, PAGE_SHIFT, %g3, %g7) |
103 | 103 | ||
104 | /* Load TSB tag/pte into %g2/%g3 and compare the tag. */ | 104 | /* Load TSB tag/pte into %g2/%g3 and compare the tag. */ |
105 | ldda [%g1] ASI_QUAD_LDD_PHYS_4V, %g2 | 105 | ldda [%g1] ASI_QUAD_LDD_PHYS_4V, %g2 |
@@ -171,21 +171,26 @@ sun4v_dtsb_miss: | |||
171 | 171 | ||
172 | /* fallthrough */ | 172 | /* fallthrough */ |
173 | 173 | ||
174 | /* Create TSB pointer into %g1. This is something like: | ||
175 | * | ||
176 | * index_mask = (512 << (tsb_reg & 0x7UL)) - 1UL; | ||
177 | * tsb_base = tsb_reg & ~0x7UL; | ||
178 | * tsb_index = ((vaddr >> PAGE_SHIFT) & tsb_mask); | ||
179 | * tsb_ptr = tsb_base + (tsb_index * 16); | ||
180 | */ | ||
181 | sun4v_tsb_miss_common: | 174 | sun4v_tsb_miss_common: |
182 | COMPUTE_TSB_PTR(%g1, %g4, %g5, %g7) | 175 | COMPUTE_TSB_PTR(%g1, %g4, PAGE_SHIFT, %g5, %g7) |
183 | 176 | ||
184 | /* Branch directly to page table lookup. We have SCRATCHPAD_MMU_MISS | ||
185 | * still in %g2, so it's quite trivial to get at the PGD PHYS value | ||
186 | * so we can preload it into %g7. | ||
187 | */ | ||
188 | sub %g2, TRAP_PER_CPU_FAULT_INFO, %g2 | 177 | sub %g2, TRAP_PER_CPU_FAULT_INFO, %g2 |
178 | |||
179 | #ifdef CONFIG_HUGETLB_PAGE | ||
180 | mov SCRATCHPAD_UTSBREG2, %g5 | ||
181 | ldxa [%g5] ASI_SCRATCHPAD, %g5 | ||
182 | cmp %g5, -1 | ||
183 | be,pt %xcc, 80f | ||
184 | nop | ||
185 | COMPUTE_TSB_PTR(%g5, %g4, HPAGE_SHIFT, %g2, %g7) | ||
186 | |||
187 | /* That clobbered %g2, reload it. */ | ||
188 | ldxa [%g0] ASI_SCRATCHPAD, %g2 | ||
189 | sub %g2, TRAP_PER_CPU_FAULT_INFO, %g2 | ||
190 | |||
191 | 80: stx %g5, [%g2 + TRAP_PER_CPU_TSB_HUGE_TEMP] | ||
192 | #endif | ||
193 | |||
189 | ba,pt %xcc, tsb_miss_page_table_walk_sun4v_fastpath | 194 | ba,pt %xcc, tsb_miss_page_table_walk_sun4v_fastpath |
190 | ldx [%g2 + TRAP_PER_CPU_PGD_PADDR], %g7 | 195 | ldx [%g2 + TRAP_PER_CPU_PGD_PADDR], %g7 |
191 | 196 | ||