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Diffstat (limited to 'arch/sparc64/kernel/pci_sabre.c')
-rw-r--r--arch/sparc64/kernel/pci_sabre.c36
1 files changed, 18 insertions, 18 deletions
diff --git a/arch/sparc64/kernel/pci_sabre.c b/arch/sparc64/kernel/pci_sabre.c
index 52bf3431a422..0ee6bd5b9ac6 100644
--- a/arch/sparc64/kernel/pci_sabre.c
+++ b/arch/sparc64/kernel/pci_sabre.c
@@ -554,7 +554,7 @@ static unsigned char sabre_pil_table[] = {
554/*0x32*/15, /* Power Management */ 554/*0x32*/15, /* Power Management */
555}; 555};
556 556
557static int __init sabre_ino_to_pil(struct pci_dev *pdev, unsigned int ino) 557static int sabre_ino_to_pil(struct pci_dev *pdev, unsigned int ino)
558{ 558{
559 int ret; 559 int ret;
560 560
@@ -612,9 +612,9 @@ static void sabre_wsync_handler(struct ino_bucket *bucket, void *_arg1, void *_a
612 sabre_read(sync_reg); 612 sabre_read(sync_reg);
613} 613}
614 614
615static unsigned int __init sabre_irq_build(struct pci_pbm_info *pbm, 615static unsigned int sabre_irq_build(struct pci_pbm_info *pbm,
616 struct pci_dev *pdev, 616 struct pci_dev *pdev,
617 unsigned int ino) 617 unsigned int ino)
618{ 618{
619 struct ino_bucket *bucket; 619 struct ino_bucket *bucket;
620 unsigned long imap, iclr; 620 unsigned long imap, iclr;
@@ -1009,7 +1009,7 @@ static irqreturn_t sabre_pcierr_intr(int irq, void *dev_id, struct pt_regs *regs
1009#define SABRE_UE_INO 0x2e 1009#define SABRE_UE_INO 0x2e
1010#define SABRE_CE_INO 0x2f 1010#define SABRE_CE_INO 0x2f
1011#define SABRE_PCIERR_INO 0x30 1011#define SABRE_PCIERR_INO 0x30
1012static void __init sabre_register_error_handlers(struct pci_controller_info *p) 1012static void sabre_register_error_handlers(struct pci_controller_info *p)
1013{ 1013{
1014 struct pci_pbm_info *pbm = &p->pbm_A; /* arbitrary */ 1014 struct pci_pbm_info *pbm = &p->pbm_A; /* arbitrary */
1015 unsigned long base = pbm->controller_regs; 1015 unsigned long base = pbm->controller_regs;
@@ -1056,9 +1056,9 @@ static void __init sabre_register_error_handlers(struct pci_controller_info *p)
1056 sabre_write(base + SABRE_PCICTRL, tmp); 1056 sabre_write(base + SABRE_PCICTRL, tmp);
1057} 1057}
1058 1058
1059static void __init sabre_resource_adjust(struct pci_dev *pdev, 1059static void sabre_resource_adjust(struct pci_dev *pdev,
1060 struct resource *res, 1060 struct resource *res,
1061 struct resource *root) 1061 struct resource *root)
1062{ 1062{
1063 struct pci_pbm_info *pbm = pdev->bus->sysdata; 1063 struct pci_pbm_info *pbm = pdev->bus->sysdata;
1064 unsigned long base; 1064 unsigned long base;
@@ -1072,7 +1072,7 @@ static void __init sabre_resource_adjust(struct pci_dev *pdev,
1072 res->end += base; 1072 res->end += base;
1073} 1073}
1074 1074
1075static void __init sabre_base_address_update(struct pci_dev *pdev, int resource) 1075static void sabre_base_address_update(struct pci_dev *pdev, int resource)
1076{ 1076{
1077 struct pcidev_cookie *pcp = pdev->sysdata; 1077 struct pcidev_cookie *pcp = pdev->sysdata;
1078 struct pci_pbm_info *pbm = pcp->pbm; 1078 struct pci_pbm_info *pbm = pcp->pbm;
@@ -1118,7 +1118,7 @@ static void __init sabre_base_address_update(struct pci_dev *pdev, int resource)
1118 pci_write_config_dword(pdev, where + 4, 0); 1118 pci_write_config_dword(pdev, where + 4, 0);
1119} 1119}
1120 1120
1121static void __init apb_init(struct pci_controller_info *p, struct pci_bus *sabre_bus) 1121static void apb_init(struct pci_controller_info *p, struct pci_bus *sabre_bus)
1122{ 1122{
1123 struct pci_dev *pdev; 1123 struct pci_dev *pdev;
1124 1124
@@ -1181,7 +1181,7 @@ static struct pcidev_cookie *alloc_bridge_cookie(struct pci_pbm_info *pbm)
1181 return cookie; 1181 return cookie;
1182} 1182}
1183 1183
1184static void __init sabre_scan_bus(struct pci_controller_info *p) 1184static void sabre_scan_bus(struct pci_controller_info *p)
1185{ 1185{
1186 static int once; 1186 static int once;
1187 struct pci_bus *sabre_bus, *pbus; 1187 struct pci_bus *sabre_bus, *pbus;
@@ -1262,9 +1262,9 @@ static void __init sabre_scan_bus(struct pci_controller_info *p)
1262 sabre_register_error_handlers(p); 1262 sabre_register_error_handlers(p);
1263} 1263}
1264 1264
1265static void __init sabre_iommu_init(struct pci_controller_info *p, 1265static void sabre_iommu_init(struct pci_controller_info *p,
1266 int tsbsize, unsigned long dvma_offset, 1266 int tsbsize, unsigned long dvma_offset,
1267 u32 dma_mask) 1267 u32 dma_mask)
1268{ 1268{
1269 struct pci_iommu *iommu = p->pbm_A.iommu; 1269 struct pci_iommu *iommu = p->pbm_A.iommu;
1270 unsigned long tsbbase, i, order; 1270 unsigned long tsbbase, i, order;
@@ -1345,8 +1345,8 @@ static void __init sabre_iommu_init(struct pci_controller_info *p,
1345 } 1345 }
1346} 1346}
1347 1347
1348static void __init pbm_register_toplevel_resources(struct pci_controller_info *p, 1348static void pbm_register_toplevel_resources(struct pci_controller_info *p,
1349 struct pci_pbm_info *pbm) 1349 struct pci_pbm_info *pbm)
1350{ 1350{
1351 char *name = pbm->name; 1351 char *name = pbm->name;
1352 unsigned long ibase = p->pbm_A.controller_regs + SABRE_IOSPACE; 1352 unsigned long ibase = p->pbm_A.controller_regs + SABRE_IOSPACE;
@@ -1415,7 +1415,7 @@ static void __init pbm_register_toplevel_resources(struct pci_controller_info *p
1415 &pbm->mem_space); 1415 &pbm->mem_space);
1416} 1416}
1417 1417
1418static void __init sabre_pbm_init(struct pci_controller_info *p, int sabre_node, u32 dma_begin) 1418static void sabre_pbm_init(struct pci_controller_info *p, int sabre_node, u32 dma_begin)
1419{ 1419{
1420 struct pci_pbm_info *pbm; 1420 struct pci_pbm_info *pbm;
1421 char namebuf[128]; 1421 char namebuf[128];
@@ -1552,7 +1552,7 @@ static void __init sabre_pbm_init(struct pci_controller_info *p, int sabre_node,
1552 } 1552 }
1553} 1553}
1554 1554
1555void __init sabre_init(int pnode, char *model_name) 1555void sabre_init(int pnode, char *model_name)
1556{ 1556{
1557 struct linux_prom64_registers pr_regs[2]; 1557 struct linux_prom64_registers pr_regs[2];
1558 struct pci_controller_info *p; 1558 struct pci_controller_info *p;