1 files changed, 22 insertions, 13 deletions

diff --git a/arch/sparc64/kernel/pci_sabre.c b/arch/sparc64/kernel/pci_sabre.c
index 22e1be5c7489..fba67c3d8809 100644
--- a/arch/sparc64/kernel/pci_sabre.c
+++ b/arch/sparc64/kernel/pci_sabre.c
@@ -672,18 +672,20 @@ static void sabre_scan_bus(struct pci_pbm_info *pbm)
         sabre_register_error_handlers(pbm);
 }
 
-static void sabre_iommu_init(struct pci_pbm_info *pbm,
-                             int tsbsize, unsigned long dvma_offset,
-                             u32 dma_mask)
+static int sabre_iommu_init(struct pci_pbm_info *pbm,
+                            int tsbsize, unsigned long dvma_offset,
+                            u32 dma_mask)
 {
         struct iommu *iommu = pbm->iommu;
         unsigned long i;
         u64 control;
+        int err;
 
         /* Register addresses. */
         iommu->iommu_control  = pbm->controller_regs + SABRE_IOMMU_CONTROL;
         iommu->iommu_tsbbase  = pbm->controller_regs + SABRE_IOMMU_TSBBASE;
         iommu->iommu_flush    = pbm->controller_regs + SABRE_IOMMU_FLUSH;
+        iommu->iommu_tags     = iommu->iommu_flush + (0xa580UL - 0x0210UL);
         iommu->write_complete_reg = pbm->controller_regs + SABRE_WRSYNC;
         /* Sabre's IOMMU lacks ctx flushing. */
         iommu->iommu_ctxflush = 0;
@@ -701,7 +703,10 @@ static void sabre_iommu_init(struct pci_pbm_info *pbm,
         /* Leave diag mode enabled for full-flushing done
          * in pci_iommu.c
          */
-        pci_iommu_table_init(iommu, tsbsize * 1024 * 8, dvma_offset, dma_mask);
+        err = iommu_table_init(iommu, tsbsize * 1024 * 8,
+                               dvma_offset, dma_mask);
+        if (err)
+                return err;
 
         sabre_write(pbm->controller_regs + SABRE_IOMMU_TSBBASE,
                     __pa(iommu->page_table));
@@ -722,6 +727,8 @@ static void sabre_iommu_init(struct pci_pbm_info *pbm,
                 break;
         }
         sabre_write(pbm->controller_regs + SABRE_IOMMU_CONTROL, control);
+
+        return 0;
 }
 
 static void sabre_pbm_init(struct pci_controller_info *p, struct pci_pbm_info *pbm, struct device_node *dp)
@@ -775,16 +782,12 @@ void sabre_init(struct device_node *dp, char *model_name)
         }
 
         p = kzalloc(sizeof(*p), GFP_ATOMIC);
-        if (!p) {
-                prom_printf("SABRE: Error, kmalloc(pci_controller_info) failed.\n");
-                prom_halt();
-        }
+        if (!p)
+                goto fatal_memory_error;
 
         iommu = kzalloc(sizeof(*iommu), GFP_ATOMIC);
-        if (!iommu) {
-                prom_printf("SABRE: Error, kmalloc(pci_iommu) failed.\n");
-                prom_halt();
-        }
+        if (!iommu)
+                goto fatal_memory_error;
         pbm = &p->pbm_A;
         pbm->iommu = iommu;
 
@@ -847,10 +850,16 @@ void sabre_init(struct device_node *dp, char *model_name)
                         prom_halt();
         }
 
-        sabre_iommu_init(pbm, tsbsize, vdma[0], dma_mask);
+        if (sabre_iommu_init(pbm, tsbsize, vdma[0], dma_mask))
+                goto fatal_memory_error;
 
         /*
          * Look for APB underneath.
          */
         sabre_pbm_init(p, pbm, dp);
+        return;
+
+fatal_memory_error:
+        prom_printf("SABRE: Fatal memory allocation error.\n");
+        prom_halt();
 }