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Diffstat (limited to 'arch/sparc64/kernel/pci_psycho.c')
-rw-r--r--arch/sparc64/kernel/pci_psycho.c264
1 files changed, 127 insertions, 137 deletions
diff --git a/arch/sparc64/kernel/pci_psycho.c b/arch/sparc64/kernel/pci_psycho.c
index 253d40ec2245..2edcb1dd13c3 100644
--- a/arch/sparc64/kernel/pci_psycho.c
+++ b/arch/sparc64/kernel/pci_psycho.c
@@ -12,12 +12,12 @@
12#include <linux/slab.h> 12#include <linux/slab.h>
13#include <linux/interrupt.h> 13#include <linux/interrupt.h>
14 14
15#include <asm/pbm.h>
16#include <asm/iommu.h> 15#include <asm/iommu.h>
17#include <asm/irq.h> 16#include <asm/irq.h>
18#include <asm/starfire.h> 17#include <asm/starfire.h>
19#include <asm/prom.h> 18#include <asm/prom.h>
20#include <asm/of_device.h> 19#include <asm/of_device.h>
20#include <asm/oplib.h>
21 21
22#include "pci_impl.h" 22#include "pci_impl.h"
23#include "iommu_common.h" 23#include "iommu_common.h"
@@ -98,13 +98,8 @@ static int psycho_out_of_range(struct pci_pbm_info *pbm,
98 unsigned char bus, 98 unsigned char bus,
99 unsigned char devfn) 99 unsigned char devfn)
100{ 100{
101 return ((pbm->parent == 0) || 101 return ((bus == pbm->pci_first_busno) &&
102 ((pbm == &pbm->parent->pbm_B) && 102 PCI_SLOT(devfn) > 8);
103 (bus == pbm->pci_first_busno) &&
104 PCI_SLOT(devfn) > 8) ||
105 ((pbm == &pbm->parent->pbm_A) &&
106 (bus == pbm->pci_first_busno) &&
107 PCI_SLOT(devfn) > 8));
108} 103}
109 104
110/* PSYCHO PCI configuration space accessors. */ 105/* PSYCHO PCI configuration space accessors. */
@@ -265,12 +260,11 @@ static unsigned long stc_error_buf[128];
265static unsigned long stc_tag_buf[16]; 260static unsigned long stc_tag_buf[16];
266static unsigned long stc_line_buf[16]; 261static unsigned long stc_line_buf[16];
267 262
268static void __psycho_check_one_stc(struct pci_controller_info *p, 263static void __psycho_check_one_stc(struct pci_pbm_info *pbm,
269 struct pci_pbm_info *pbm,
270 int is_pbm_a) 264 int is_pbm_a)
271{ 265{
272 struct strbuf *strbuf = &pbm->stc; 266 struct strbuf *strbuf = &pbm->stc;
273 unsigned long regbase = p->pbm_A.controller_regs; 267 unsigned long regbase = pbm->controller_regs;
274 unsigned long err_base, tag_base, line_base; 268 unsigned long err_base, tag_base, line_base;
275 u64 control; 269 u64 control;
276 int i; 270 int i;
@@ -326,9 +320,8 @@ static void __psycho_check_one_stc(struct pci_controller_info *p,
326 unsigned long errval = stc_error_buf[j]; 320 unsigned long errval = stc_error_buf[j];
327 if (errval != 0) { 321 if (errval != 0) {
328 saw_error++; 322 saw_error++;
329 printk("PSYCHO%d(PBM%c): STC_ERR(%d)[wr(%d)rd(%d)]\n", 323 printk("%s: STC_ERR(%d)[wr(%d)rd(%d)]\n",
330 p->index, 324 pbm->name,
331 (is_pbm_a ? 'A' : 'B'),
332 j, 325 j,
333 (errval & PSYCHO_STCERR_WRITE) ? 1 : 0, 326 (errval & PSYCHO_STCERR_WRITE) ? 1 : 0,
334 (errval & PSYCHO_STCERR_READ) ? 1 : 0); 327 (errval & PSYCHO_STCERR_READ) ? 1 : 0);
@@ -337,18 +330,16 @@ static void __psycho_check_one_stc(struct pci_controller_info *p,
337 if (saw_error != 0) { 330 if (saw_error != 0) {
338 unsigned long tagval = stc_tag_buf[i]; 331 unsigned long tagval = stc_tag_buf[i];
339 unsigned long lineval = stc_line_buf[i]; 332 unsigned long lineval = stc_line_buf[i];
340 printk("PSYCHO%d(PBM%c): STC_TAG(%d)[PA(%016lx)VA(%08lx)V(%d)W(%d)]\n", 333 printk("%s: STC_TAG(%d)[PA(%016lx)VA(%08lx)V(%d)W(%d)]\n",
341 p->index, 334 pbm->name,
342 (is_pbm_a ? 'A' : 'B'),
343 i, 335 i,
344 ((tagval & PSYCHO_STCTAG_PPN) >> 19UL), 336 ((tagval & PSYCHO_STCTAG_PPN) >> 19UL),
345 (tagval & PSYCHO_STCTAG_VPN), 337 (tagval & PSYCHO_STCTAG_VPN),
346 ((tagval & PSYCHO_STCTAG_VALID) ? 1 : 0), 338 ((tagval & PSYCHO_STCTAG_VALID) ? 1 : 0),
347 ((tagval & PSYCHO_STCTAG_WRITE) ? 1 : 0)); 339 ((tagval & PSYCHO_STCTAG_WRITE) ? 1 : 0));
348 printk("PSYCHO%d(PBM%c): STC_LINE(%d)[LIDX(%lx)SP(%lx)LADDR(%lx)EP(%lx)" 340 printk("%s: STC_LINE(%d)[LIDX(%lx)SP(%lx)LADDR(%lx)EP(%lx)"
349 "V(%d)FOFN(%d)]\n", 341 "V(%d)FOFN(%d)]\n",
350 p->index, 342 pbm->name,
351 (is_pbm_a ? 'A' : 'B'),
352 i, 343 i,
353 ((lineval & PSYCHO_STCLINE_LINDX) >> 21UL), 344 ((lineval & PSYCHO_STCLINE_LINDX) >> 21UL),
354 ((lineval & PSYCHO_STCLINE_SPTR) >> 15UL), 345 ((lineval & PSYCHO_STCLINE_SPTR) >> 15UL),
@@ -362,20 +353,13 @@ static void __psycho_check_one_stc(struct pci_controller_info *p,
362 spin_unlock(&stc_buf_lock); 353 spin_unlock(&stc_buf_lock);
363} 354}
364 355
365static void __psycho_check_stc_error(struct pci_controller_info *p, 356static void __psycho_check_stc_error(struct pci_pbm_info *pbm,
366 unsigned long afsr, 357 unsigned long afsr,
367 unsigned long afar, 358 unsigned long afar,
368 enum psycho_error_type type) 359 enum psycho_error_type type)
369{ 360{
370 struct pci_pbm_info *pbm; 361 __psycho_check_one_stc(pbm,
371 362 (pbm == &pbm->parent->pbm_A));
372 pbm = &p->pbm_A;
373 if (pbm->stc.strbuf_enabled)
374 __psycho_check_one_stc(p, pbm, 1);
375
376 pbm = &p->pbm_B;
377 if (pbm->stc.strbuf_enabled)
378 __psycho_check_one_stc(p, pbm, 0);
379} 363}
380 364
381/* When an Uncorrectable Error or a PCI Error happens, we 365/* When an Uncorrectable Error or a PCI Error happens, we
@@ -413,12 +397,12 @@ static void __psycho_check_stc_error(struct pci_controller_info *p,
413#define PSYCHO_IOMMU_DATA_VALID (1UL << 30UL) 397#define PSYCHO_IOMMU_DATA_VALID (1UL << 30UL)
414#define PSYCHO_IOMMU_DATA_CACHE (1UL << 28UL) 398#define PSYCHO_IOMMU_DATA_CACHE (1UL << 28UL)
415#define PSYCHO_IOMMU_DATA_PPAGE 0xfffffffUL 399#define PSYCHO_IOMMU_DATA_PPAGE 0xfffffffUL
416static void psycho_check_iommu_error(struct pci_controller_info *p, 400static void psycho_check_iommu_error(struct pci_pbm_info *pbm,
417 unsigned long afsr, 401 unsigned long afsr,
418 unsigned long afar, 402 unsigned long afar,
419 enum psycho_error_type type) 403 enum psycho_error_type type)
420{ 404{
421 struct iommu *iommu = p->pbm_A.iommu; 405 struct iommu *iommu = pbm->iommu;
422 unsigned long iommu_tag[16]; 406 unsigned long iommu_tag[16];
423 unsigned long iommu_data[16]; 407 unsigned long iommu_data[16];
424 unsigned long flags; 408 unsigned long flags;
@@ -449,8 +433,8 @@ static void psycho_check_iommu_error(struct pci_controller_info *p,
449 type_string = "ECC Error"; 433 type_string = "ECC Error";
450 break; 434 break;
451 }; 435 };
452 printk("PSYCHO%d: IOMMU Error, type[%s]\n", 436 printk("%s: IOMMU Error, type[%s]\n",
453 p->index, type_string); 437 pbm->name, type_string);
454 438
455 /* Put the IOMMU into diagnostic mode and probe 439 /* Put the IOMMU into diagnostic mode and probe
456 * it's TLB for entries with error status. 440 * it's TLB for entries with error status.
@@ -465,7 +449,7 @@ static void psycho_check_iommu_error(struct pci_controller_info *p,
465 psycho_write(iommu->iommu_control, 449 psycho_write(iommu->iommu_control,
466 control | PSYCHO_IOMMU_CTRL_DENAB); 450 control | PSYCHO_IOMMU_CTRL_DENAB);
467 for (i = 0; i < 16; i++) { 451 for (i = 0; i < 16; i++) {
468 unsigned long base = p->pbm_A.controller_regs; 452 unsigned long base = pbm->controller_regs;
469 453
470 iommu_tag[i] = 454 iommu_tag[i] =
471 psycho_read(base + PSYCHO_IOMMU_TAG + (i * 8UL)); 455 psycho_read(base + PSYCHO_IOMMU_TAG + (i * 8UL));
@@ -503,20 +487,20 @@ static void psycho_check_iommu_error(struct pci_controller_info *p,
503 type_string = "ECC Error"; 487 type_string = "ECC Error";
504 break; 488 break;
505 }; 489 };
506 printk("PSYCHO%d: IOMMU TAG(%d)[error(%s) wr(%d) str(%d) sz(%dK) vpg(%08lx)]\n", 490 printk("%s: IOMMU TAG(%d)[error(%s) wr(%d) str(%d) sz(%dK) vpg(%08lx)]\n",
507 p->index, i, type_string, 491 pbm->name, i, type_string,
508 ((tag & PSYCHO_IOMMU_TAG_WRITE) ? 1 : 0), 492 ((tag & PSYCHO_IOMMU_TAG_WRITE) ? 1 : 0),
509 ((tag & PSYCHO_IOMMU_TAG_STREAM) ? 1 : 0), 493 ((tag & PSYCHO_IOMMU_TAG_STREAM) ? 1 : 0),
510 ((tag & PSYCHO_IOMMU_TAG_SIZE) ? 64 : 8), 494 ((tag & PSYCHO_IOMMU_TAG_SIZE) ? 64 : 8),
511 (tag & PSYCHO_IOMMU_TAG_VPAGE) << IOMMU_PAGE_SHIFT); 495 (tag & PSYCHO_IOMMU_TAG_VPAGE) << IOMMU_PAGE_SHIFT);
512 printk("PSYCHO%d: IOMMU DATA(%d)[valid(%d) cache(%d) ppg(%016lx)]\n", 496 printk("%s: IOMMU DATA(%d)[valid(%d) cache(%d) ppg(%016lx)]\n",
513 p->index, i, 497 pbm->name, i,
514 ((data & PSYCHO_IOMMU_DATA_VALID) ? 1 : 0), 498 ((data & PSYCHO_IOMMU_DATA_VALID) ? 1 : 0),
515 ((data & PSYCHO_IOMMU_DATA_CACHE) ? 1 : 0), 499 ((data & PSYCHO_IOMMU_DATA_CACHE) ? 1 : 0),
516 (data & PSYCHO_IOMMU_DATA_PPAGE) << IOMMU_PAGE_SHIFT); 500 (data & PSYCHO_IOMMU_DATA_PPAGE) << IOMMU_PAGE_SHIFT);
517 } 501 }
518 } 502 }
519 __psycho_check_stc_error(p, afsr, afar, type); 503 __psycho_check_stc_error(pbm, afsr, afar, type);
520 spin_unlock_irqrestore(&iommu->lock, flags); 504 spin_unlock_irqrestore(&iommu->lock, flags);
521} 505}
522 506
@@ -541,9 +525,10 @@ static void psycho_check_iommu_error(struct pci_controller_info *p,
541 525
542static irqreturn_t psycho_ue_intr(int irq, void *dev_id) 526static irqreturn_t psycho_ue_intr(int irq, void *dev_id)
543{ 527{
544 struct pci_controller_info *p = dev_id; 528 struct pci_pbm_info *pbm = dev_id;
545 unsigned long afsr_reg = p->pbm_A.controller_regs + PSYCHO_UE_AFSR; 529 struct pci_controller_info *p = pbm->parent;
546 unsigned long afar_reg = p->pbm_A.controller_regs + PSYCHO_UE_AFAR; 530 unsigned long afsr_reg = pbm->controller_regs + PSYCHO_UE_AFSR;
531 unsigned long afar_reg = pbm->controller_regs + PSYCHO_UE_AFAR;
547 unsigned long afsr, afar, error_bits; 532 unsigned long afsr, afar, error_bits;
548 int reported; 533 int reported;
549 534
@@ -560,22 +545,22 @@ static irqreturn_t psycho_ue_intr(int irq, void *dev_id)
560 psycho_write(afsr_reg, error_bits); 545 psycho_write(afsr_reg, error_bits);
561 546
562 /* Log the error. */ 547 /* Log the error. */
563 printk("PSYCHO%d: Uncorrectable Error, primary error type[%s]\n", 548 printk("%s: Uncorrectable Error, primary error type[%s]\n",
564 p->index, 549 pbm->name,
565 (((error_bits & PSYCHO_UEAFSR_PPIO) ? 550 (((error_bits & PSYCHO_UEAFSR_PPIO) ?
566 "PIO" : 551 "PIO" :
567 ((error_bits & PSYCHO_UEAFSR_PDRD) ? 552 ((error_bits & PSYCHO_UEAFSR_PDRD) ?
568 "DMA Read" : 553 "DMA Read" :
569 ((error_bits & PSYCHO_UEAFSR_PDWR) ? 554 ((error_bits & PSYCHO_UEAFSR_PDWR) ?
570 "DMA Write" : "???"))))); 555 "DMA Write" : "???")))));
571 printk("PSYCHO%d: bytemask[%04lx] dword_offset[%lx] UPA_MID[%02lx] was_block(%d)\n", 556 printk("%s: bytemask[%04lx] dword_offset[%lx] UPA_MID[%02lx] was_block(%d)\n",
572 p->index, 557 pbm->name,
573 (afsr & PSYCHO_UEAFSR_BMSK) >> 32UL, 558 (afsr & PSYCHO_UEAFSR_BMSK) >> 32UL,
574 (afsr & PSYCHO_UEAFSR_DOFF) >> 29UL, 559 (afsr & PSYCHO_UEAFSR_DOFF) >> 29UL,
575 (afsr & PSYCHO_UEAFSR_MID) >> 24UL, 560 (afsr & PSYCHO_UEAFSR_MID) >> 24UL,
576 ((afsr & PSYCHO_UEAFSR_BLK) ? 1 : 0)); 561 ((afsr & PSYCHO_UEAFSR_BLK) ? 1 : 0));
577 printk("PSYCHO%d: UE AFAR [%016lx]\n", p->index, afar); 562 printk("%s: UE AFAR [%016lx]\n", pbm->name, afar);
578 printk("PSYCHO%d: UE Secondary errors [", p->index); 563 printk("%s: UE Secondary errors [", pbm->name);
579 reported = 0; 564 reported = 0;
580 if (afsr & PSYCHO_UEAFSR_SPIO) { 565 if (afsr & PSYCHO_UEAFSR_SPIO) {
581 reported++; 566 reported++;
@@ -593,8 +578,9 @@ static irqreturn_t psycho_ue_intr(int irq, void *dev_id)
593 printk("(none)"); 578 printk("(none)");
594 printk("]\n"); 579 printk("]\n");
595 580
596 /* Interrogate IOMMU for error status. */ 581 /* Interrogate both IOMMUs for error status. */
597 psycho_check_iommu_error(p, afsr, afar, UE_ERR); 582 psycho_check_iommu_error(&p->pbm_A, afsr, afar, UE_ERR);
583 psycho_check_iommu_error(&p->pbm_B, afsr, afar, UE_ERR);
598 584
599 return IRQ_HANDLED; 585 return IRQ_HANDLED;
600} 586}
@@ -618,9 +604,9 @@ static irqreturn_t psycho_ue_intr(int irq, void *dev_id)
618 604
619static irqreturn_t psycho_ce_intr(int irq, void *dev_id) 605static irqreturn_t psycho_ce_intr(int irq, void *dev_id)
620{ 606{
621 struct pci_controller_info *p = dev_id; 607 struct pci_pbm_info *pbm = dev_id;
622 unsigned long afsr_reg = p->pbm_A.controller_regs + PSYCHO_CE_AFSR; 608 unsigned long afsr_reg = pbm->controller_regs + PSYCHO_CE_AFSR;
623 unsigned long afar_reg = p->pbm_A.controller_regs + PSYCHO_CE_AFAR; 609 unsigned long afar_reg = pbm->controller_regs + PSYCHO_CE_AFAR;
624 unsigned long afsr, afar, error_bits; 610 unsigned long afsr, afar, error_bits;
625 int reported; 611 int reported;
626 612
@@ -637,8 +623,8 @@ static irqreturn_t psycho_ce_intr(int irq, void *dev_id)
637 psycho_write(afsr_reg, error_bits); 623 psycho_write(afsr_reg, error_bits);
638 624
639 /* Log the error. */ 625 /* Log the error. */
640 printk("PSYCHO%d: Correctable Error, primary error type[%s]\n", 626 printk("%s: Correctable Error, primary error type[%s]\n",
641 p->index, 627 pbm->name,
642 (((error_bits & PSYCHO_CEAFSR_PPIO) ? 628 (((error_bits & PSYCHO_CEAFSR_PPIO) ?
643 "PIO" : 629 "PIO" :
644 ((error_bits & PSYCHO_CEAFSR_PDRD) ? 630 ((error_bits & PSYCHO_CEAFSR_PDRD) ?
@@ -649,16 +635,16 @@ static irqreturn_t psycho_ce_intr(int irq, void *dev_id)
649 /* XXX Use syndrome and afar to print out module string just like 635 /* XXX Use syndrome and afar to print out module string just like
650 * XXX UDB CE trap handler does... -DaveM 636 * XXX UDB CE trap handler does... -DaveM
651 */ 637 */
652 printk("PSYCHO%d: syndrome[%02lx] bytemask[%04lx] dword_offset[%lx] " 638 printk("%s: syndrome[%02lx] bytemask[%04lx] dword_offset[%lx] "
653 "UPA_MID[%02lx] was_block(%d)\n", 639 "UPA_MID[%02lx] was_block(%d)\n",
654 p->index, 640 pbm->name,
655 (afsr & PSYCHO_CEAFSR_ESYND) >> 48UL, 641 (afsr & PSYCHO_CEAFSR_ESYND) >> 48UL,
656 (afsr & PSYCHO_CEAFSR_BMSK) >> 32UL, 642 (afsr & PSYCHO_CEAFSR_BMSK) >> 32UL,
657 (afsr & PSYCHO_CEAFSR_DOFF) >> 29UL, 643 (afsr & PSYCHO_CEAFSR_DOFF) >> 29UL,
658 (afsr & PSYCHO_CEAFSR_MID) >> 24UL, 644 (afsr & PSYCHO_CEAFSR_MID) >> 24UL,
659 ((afsr & PSYCHO_CEAFSR_BLK) ? 1 : 0)); 645 ((afsr & PSYCHO_CEAFSR_BLK) ? 1 : 0));
660 printk("PSYCHO%d: CE AFAR [%016lx]\n", p->index, afar); 646 printk("%s: CE AFAR [%016lx]\n", pbm->name, afar);
661 printk("PSYCHO%d: CE Secondary errors [", p->index); 647 printk("%s: CE Secondary errors [", pbm->name);
662 reported = 0; 648 reported = 0;
663 if (afsr & PSYCHO_CEAFSR_SPIO) { 649 if (afsr & PSYCHO_CEAFSR_SPIO) {
664 reported++; 650 reported++;
@@ -773,8 +759,8 @@ static irqreturn_t psycho_pcierr_intr(int irq, void *dev_id)
773 psycho_write(afsr_reg, error_bits); 759 psycho_write(afsr_reg, error_bits);
774 760
775 /* Log the error. */ 761 /* Log the error. */
776 printk("PSYCHO%d(PBM%c): PCI Error, primary error type[%s]\n", 762 printk("%s: PCI Error, primary error type[%s]\n",
777 p->index, (is_pbm_a ? 'A' : 'B'), 763 pbm->name,
778 (((error_bits & PSYCHO_PCIAFSR_PMA) ? 764 (((error_bits & PSYCHO_PCIAFSR_PMA) ?
779 "Master Abort" : 765 "Master Abort" :
780 ((error_bits & PSYCHO_PCIAFSR_PTA) ? 766 ((error_bits & PSYCHO_PCIAFSR_PTA) ?
@@ -783,15 +769,13 @@ static irqreturn_t psycho_pcierr_intr(int irq, void *dev_id)
783 "Excessive Retries" : 769 "Excessive Retries" :
784 ((error_bits & PSYCHO_PCIAFSR_PPERR) ? 770 ((error_bits & PSYCHO_PCIAFSR_PPERR) ?
785 "Parity Error" : "???")))))); 771 "Parity Error" : "???"))))));
786 printk("PSYCHO%d(PBM%c): bytemask[%04lx] UPA_MID[%02lx] was_block(%d)\n", 772 printk("%s: bytemask[%04lx] UPA_MID[%02lx] was_block(%d)\n",
787 p->index, (is_pbm_a ? 'A' : 'B'), 773 pbm->name,
788 (afsr & PSYCHO_PCIAFSR_BMSK) >> 32UL, 774 (afsr & PSYCHO_PCIAFSR_BMSK) >> 32UL,
789 (afsr & PSYCHO_PCIAFSR_MID) >> 25UL, 775 (afsr & PSYCHO_PCIAFSR_MID) >> 25UL,
790 (afsr & PSYCHO_PCIAFSR_BLK) ? 1 : 0); 776 (afsr & PSYCHO_PCIAFSR_BLK) ? 1 : 0);
791 printk("PSYCHO%d(PBM%c): PCI AFAR [%016lx]\n", 777 printk("%s: PCI AFAR [%016lx]\n", pbm->name, afar);
792 p->index, (is_pbm_a ? 'A' : 'B'), afar); 778 printk("%s: PCI Secondary errors [", pbm->name);
793 printk("PSYCHO%d(PBM%c): PCI Secondary errors [",
794 p->index, (is_pbm_a ? 'A' : 'B'));
795 reported = 0; 779 reported = 0;
796 if (afsr & PSYCHO_PCIAFSR_SMA) { 780 if (afsr & PSYCHO_PCIAFSR_SMA) {
797 reported++; 781 reported++;
@@ -823,11 +807,11 @@ static irqreturn_t psycho_pcierr_intr(int irq, void *dev_id)
823 * a bug in the IOMMU support code or a PCI device driver. 807 * a bug in the IOMMU support code or a PCI device driver.
824 */ 808 */
825 if (error_bits & (PSYCHO_PCIAFSR_PTA | PSYCHO_PCIAFSR_STA)) { 809 if (error_bits & (PSYCHO_PCIAFSR_PTA | PSYCHO_PCIAFSR_STA)) {
826 psycho_check_iommu_error(p, afsr, afar, PCI_ERR); 810 psycho_check_iommu_error(pbm, afsr, afar, PCI_ERR);
827 pci_scan_for_target_abort(p, pbm, pbm->pci_bus); 811 pci_scan_for_target_abort(pbm, pbm->pci_bus);
828 } 812 }
829 if (error_bits & (PSYCHO_PCIAFSR_PMA | PSYCHO_PCIAFSR_SMA)) 813 if (error_bits & (PSYCHO_PCIAFSR_PMA | PSYCHO_PCIAFSR_SMA))
830 pci_scan_for_master_abort(p, pbm, pbm->pci_bus); 814 pci_scan_for_master_abort(pbm, pbm->pci_bus);
831 815
832 /* For excessive retries, PSYCHO/PBM will abort the device 816 /* For excessive retries, PSYCHO/PBM will abort the device
833 * and there is no way to specifically check for excessive 817 * and there is no way to specifically check for excessive
@@ -837,7 +821,7 @@ static irqreturn_t psycho_pcierr_intr(int irq, void *dev_id)
837 */ 821 */
838 822
839 if (error_bits & (PSYCHO_PCIAFSR_PPERR | PSYCHO_PCIAFSR_SPERR)) 823 if (error_bits & (PSYCHO_PCIAFSR_PPERR | PSYCHO_PCIAFSR_SPERR))
840 pci_scan_for_parity_error(p, pbm, pbm->pci_bus); 824 pci_scan_for_parity_error(pbm, pbm->pci_bus);
841 825
842 return IRQ_HANDLED; 826 return IRQ_HANDLED;
843} 827}
@@ -847,34 +831,49 @@ static irqreturn_t psycho_pcierr_intr(int irq, void *dev_id)
847#define PSYCHO_ECCCTRL_EE 0x8000000000000000UL /* Enable ECC Checking */ 831#define PSYCHO_ECCCTRL_EE 0x8000000000000000UL /* Enable ECC Checking */
848#define PSYCHO_ECCCTRL_UE 0x4000000000000000UL /* Enable UE Interrupts */ 832#define PSYCHO_ECCCTRL_UE 0x4000000000000000UL /* Enable UE Interrupts */
849#define PSYCHO_ECCCTRL_CE 0x2000000000000000UL /* Enable CE INterrupts */ 833#define PSYCHO_ECCCTRL_CE 0x2000000000000000UL /* Enable CE INterrupts */
850static void psycho_register_error_handlers(struct pci_controller_info *p) 834static void psycho_register_error_handlers(struct pci_pbm_info *pbm)
851{ 835{
852 struct pci_pbm_info *pbm = &p->pbm_A; /* arbitrary */
853 struct of_device *op = of_find_device_by_node(pbm->prom_node); 836 struct of_device *op = of_find_device_by_node(pbm->prom_node);
854 unsigned long base = p->pbm_A.controller_regs; 837 unsigned long base = pbm->controller_regs;
855 u64 tmp; 838 u64 tmp;
839 int err;
856 840
857 if (!op) 841 if (!op)
858 return; 842 return;
859 843
860 /* Psycho interrupt property order is: 844 /* Psycho interrupt property order is:
861 * 0: PCIERR PBM B INO 845 * 0: PCIERR INO for this PBM
862 * 1: UE ERR 846 * 1: UE ERR
863 * 2: CE ERR 847 * 2: CE ERR
864 * 3: POWER FAIL 848 * 3: POWER FAIL
865 * 4: SPARE HARDWARE 849 * 4: SPARE HARDWARE
866 * 5: PCIERR PBM A INO 850 * 5: POWER MANAGEMENT
867 */ 851 */
868 852
869 if (op->num_irqs < 6) 853 if (op->num_irqs < 6)
870 return; 854 return;
871 855
872 request_irq(op->irqs[1], psycho_ue_intr, IRQF_SHARED, "PSYCHO UE", p); 856 /* We really mean to ignore the return result here. Two
873 request_irq(op->irqs[2], psycho_ce_intr, IRQF_SHARED, "PSYCHO CE", p); 857 * PCI controller share the same interrupt numbers and
874 request_irq(op->irqs[5], psycho_pcierr_intr, IRQF_SHARED, 858 * drive the same front-end hardware. Whichever of the
875 "PSYCHO PCIERR-A", &p->pbm_A); 859 * two get in here first will register the IRQ handler
876 request_irq(op->irqs[0], psycho_pcierr_intr, IRQF_SHARED, 860 * the second will just error out since we do not pass in
877 "PSYCHO PCIERR-B", &p->pbm_B); 861 * IRQF_SHARED.
862 */
863 err = request_irq(op->irqs[1], psycho_ue_intr, 0,
864 "PSYCHO_UE", pbm);
865 err = request_irq(op->irqs[2], psycho_ce_intr, 0,
866 "PSYCHO_CE", pbm);
867
868 /* This one, however, ought not to fail. We can just warn
869 * about it since the system can still operate properly even
870 * if this fails.
871 */
872 err = request_irq(op->irqs[0], psycho_pcierr_intr, 0,
873 "PSYCHO_PCIERR", pbm);
874 if (err)
875 printk(KERN_WARNING "%s: Could not register PCIERR, "
876 "err=%d\n", pbm->name, err);
878 877
879 /* Enable UE and CE interrupts for controller. */ 878 /* Enable UE and CE interrupts for controller. */
880 psycho_write(base + PSYCHO_ECC_CTRL, 879 psycho_write(base + PSYCHO_ECC_CTRL,
@@ -918,54 +917,45 @@ static void pbm_config_busmastering(struct pci_pbm_info *pbm)
918 pci_config_write8(addr, 64); 917 pci_config_write8(addr, 64);
919} 918}
920 919
921static void pbm_scan_bus(struct pci_controller_info *p, 920static void psycho_scan_bus(struct pci_pbm_info *pbm)
922 struct pci_pbm_info *pbm)
923{ 921{
922 pbm_config_busmastering(pbm);
923 pbm->is_66mhz_capable = 0;
924 pbm->pci_bus = pci_scan_one_pbm(pbm); 924 pbm->pci_bus = pci_scan_one_pbm(pbm);
925}
926
927static void psycho_scan_bus(struct pci_controller_info *p)
928{
929 pbm_config_busmastering(&p->pbm_B);
930 p->pbm_B.is_66mhz_capable = 0;
931 pbm_config_busmastering(&p->pbm_A);
932 p->pbm_A.is_66mhz_capable = 1;
933 pbm_scan_bus(p, &p->pbm_B);
934 pbm_scan_bus(p, &p->pbm_A);
935 925
936 /* After the PCI bus scan is complete, we can register 926 /* After the PCI bus scan is complete, we can register
937 * the error interrupt handlers. 927 * the error interrupt handlers.
938 */ 928 */
939 psycho_register_error_handlers(p); 929 psycho_register_error_handlers(pbm);
940} 930}
941 931
942static void psycho_iommu_init(struct pci_controller_info *p) 932static void psycho_iommu_init(struct pci_pbm_info *pbm)
943{ 933{
944 struct iommu *iommu = p->pbm_A.iommu; 934 struct iommu *iommu = pbm->iommu;
945 unsigned long i; 935 unsigned long i;
946 u64 control; 936 u64 control;
947 937
948 /* Register addresses. */ 938 /* Register addresses. */
949 iommu->iommu_control = p->pbm_A.controller_regs + PSYCHO_IOMMU_CONTROL; 939 iommu->iommu_control = pbm->controller_regs + PSYCHO_IOMMU_CONTROL;
950 iommu->iommu_tsbbase = p->pbm_A.controller_regs + PSYCHO_IOMMU_TSBBASE; 940 iommu->iommu_tsbbase = pbm->controller_regs + PSYCHO_IOMMU_TSBBASE;
951 iommu->iommu_flush = p->pbm_A.controller_regs + PSYCHO_IOMMU_FLUSH; 941 iommu->iommu_flush = pbm->controller_regs + PSYCHO_IOMMU_FLUSH;
952 /* PSYCHO's IOMMU lacks ctx flushing. */ 942 /* PSYCHO's IOMMU lacks ctx flushing. */
953 iommu->iommu_ctxflush = 0; 943 iommu->iommu_ctxflush = 0;
954 944
955 /* We use the main control register of PSYCHO as the write 945 /* We use the main control register of PSYCHO as the write
956 * completion register. 946 * completion register.
957 */ 947 */
958 iommu->write_complete_reg = p->pbm_A.controller_regs + PSYCHO_CONTROL; 948 iommu->write_complete_reg = pbm->controller_regs + PSYCHO_CONTROL;
959 949
960 /* 950 /*
961 * Invalidate TLB Entries. 951 * Invalidate TLB Entries.
962 */ 952 */
963 control = psycho_read(p->pbm_A.controller_regs + PSYCHO_IOMMU_CONTROL); 953 control = psycho_read(pbm->controller_regs + PSYCHO_IOMMU_CONTROL);
964 control |= PSYCHO_IOMMU_CTRL_DENAB; 954 control |= PSYCHO_IOMMU_CTRL_DENAB;
965 psycho_write(p->pbm_A.controller_regs + PSYCHO_IOMMU_CONTROL, control); 955 psycho_write(pbm->controller_regs + PSYCHO_IOMMU_CONTROL, control);
966 for(i = 0; i < 16; i++) { 956 for(i = 0; i < 16; i++) {
967 psycho_write(p->pbm_A.controller_regs + PSYCHO_IOMMU_TAG + (i * 8UL), 0); 957 psycho_write(pbm->controller_regs + PSYCHO_IOMMU_TAG + (i * 8UL), 0);
968 psycho_write(p->pbm_A.controller_regs + PSYCHO_IOMMU_DATA + (i * 8UL), 0); 958 psycho_write(pbm->controller_regs + PSYCHO_IOMMU_DATA + (i * 8UL), 0);
969 } 959 }
970 960
971 /* Leave diag mode enabled for full-flushing done 961 /* Leave diag mode enabled for full-flushing done
@@ -973,17 +963,17 @@ static void psycho_iommu_init(struct pci_controller_info *p)
973 */ 963 */
974 pci_iommu_table_init(iommu, IO_TSB_SIZE, 0xc0000000, 0xffffffff); 964 pci_iommu_table_init(iommu, IO_TSB_SIZE, 0xc0000000, 0xffffffff);
975 965
976 psycho_write(p->pbm_A.controller_regs + PSYCHO_IOMMU_TSBBASE, 966 psycho_write(pbm->controller_regs + PSYCHO_IOMMU_TSBBASE,
977 __pa(iommu->page_table)); 967 __pa(iommu->page_table));
978 968
979 control = psycho_read(p->pbm_A.controller_regs + PSYCHO_IOMMU_CONTROL); 969 control = psycho_read(pbm->controller_regs + PSYCHO_IOMMU_CONTROL);
980 control &= ~(PSYCHO_IOMMU_CTRL_TSBSZ | PSYCHO_IOMMU_CTRL_TBWSZ); 970 control &= ~(PSYCHO_IOMMU_CTRL_TSBSZ | PSYCHO_IOMMU_CTRL_TBWSZ);
981 control |= (PSYCHO_IOMMU_TSBSZ_128K | PSYCHO_IOMMU_CTRL_ENAB); 971 control |= (PSYCHO_IOMMU_TSBSZ_128K | PSYCHO_IOMMU_CTRL_ENAB);
982 psycho_write(p->pbm_A.controller_regs + PSYCHO_IOMMU_CONTROL, control); 972 psycho_write(pbm->controller_regs + PSYCHO_IOMMU_CONTROL, control);
983 973
984 /* If necessary, hook us up for starfire IRQ translations. */ 974 /* If necessary, hook us up for starfire IRQ translations. */
985 if (this_is_starfire) 975 if (this_is_starfire)
986 starfire_hookup(p->pbm_A.portid); 976 starfire_hookup(pbm->portid);
987} 977}
988 978
989#define PSYCHO_IRQ_RETRY 0x1a00UL 979#define PSYCHO_IRQ_RETRY 0x1a00UL
@@ -998,36 +988,35 @@ static void psycho_iommu_init(struct pci_controller_info *p)
998#define PSYCHO_PCIDIAG_IPAPAR 0x0000000000000002UL /* Invert PIO address parity */ 988#define PSYCHO_PCIDIAG_IPAPAR 0x0000000000000002UL /* Invert PIO address parity */
999#define PSYCHO_PCIDIAG_LPBACK 0x0000000000000001UL /* Enable loopback mode */ 989#define PSYCHO_PCIDIAG_LPBACK 0x0000000000000001UL /* Enable loopback mode */
1000 990
1001static void psycho_controller_hwinit(struct pci_controller_info *p) 991static void psycho_controller_hwinit(struct pci_pbm_info *pbm)
1002{ 992{
1003 u64 tmp; 993 u64 tmp;
1004 994
1005 psycho_write(p->pbm_A.controller_regs + PSYCHO_IRQ_RETRY, 5); 995 psycho_write(pbm->controller_regs + PSYCHO_IRQ_RETRY, 5);
1006 996
1007 /* Enable arbiter for all PCI slots. */ 997 /* Enable arbiter for all PCI slots. */
1008 tmp = psycho_read(p->pbm_A.controller_regs + PSYCHO_PCIA_CTRL); 998 tmp = psycho_read(pbm->controller_regs + PSYCHO_PCIA_CTRL);
1009 tmp |= PSYCHO_PCICTRL_AEN; 999 tmp |= PSYCHO_PCICTRL_AEN;
1010 psycho_write(p->pbm_A.controller_regs + PSYCHO_PCIA_CTRL, tmp); 1000 psycho_write(pbm->controller_regs + PSYCHO_PCIA_CTRL, tmp);
1011 1001
1012 tmp = psycho_read(p->pbm_A.controller_regs + PSYCHO_PCIB_CTRL); 1002 tmp = psycho_read(pbm->controller_regs + PSYCHO_PCIB_CTRL);
1013 tmp |= PSYCHO_PCICTRL_AEN; 1003 tmp |= PSYCHO_PCICTRL_AEN;
1014 psycho_write(p->pbm_A.controller_regs + PSYCHO_PCIB_CTRL, tmp); 1004 psycho_write(pbm->controller_regs + PSYCHO_PCIB_CTRL, tmp);
1015 1005
1016 /* Disable DMA write / PIO read synchronization on 1006 /* Disable DMA write / PIO read synchronization on
1017 * both PCI bus segments. 1007 * both PCI bus segments.
1018 * [ U2P Erratum 1243770, STP2223BGA data sheet ] 1008 * [ U2P Erratum 1243770, STP2223BGA data sheet ]
1019 */ 1009 */
1020 tmp = psycho_read(p->pbm_A.controller_regs + PSYCHO_PCIA_DIAG); 1010 tmp = psycho_read(pbm->controller_regs + PSYCHO_PCIA_DIAG);
1021 tmp |= PSYCHO_PCIDIAG_DDWSYNC; 1011 tmp |= PSYCHO_PCIDIAG_DDWSYNC;
1022 psycho_write(p->pbm_A.controller_regs + PSYCHO_PCIA_DIAG, tmp); 1012 psycho_write(pbm->controller_regs + PSYCHO_PCIA_DIAG, tmp);
1023 1013
1024 tmp = psycho_read(p->pbm_A.controller_regs + PSYCHO_PCIB_DIAG); 1014 tmp = psycho_read(pbm->controller_regs + PSYCHO_PCIB_DIAG);
1025 tmp |= PSYCHO_PCIDIAG_DDWSYNC; 1015 tmp |= PSYCHO_PCIDIAG_DDWSYNC;
1026 psycho_write(p->pbm_A.controller_regs + PSYCHO_PCIB_DIAG, tmp); 1016 psycho_write(pbm->controller_regs + PSYCHO_PCIB_DIAG, tmp);
1027} 1017}
1028 1018
1029static void psycho_pbm_strbuf_init(struct pci_controller_info *p, 1019static void psycho_pbm_strbuf_init(struct pci_pbm_info *pbm,
1030 struct pci_pbm_info *pbm,
1031 int is_pbm_a) 1020 int is_pbm_a)
1032{ 1021{
1033 unsigned long base = pbm->controller_regs; 1022 unsigned long base = pbm->controller_regs;
@@ -1088,7 +1077,6 @@ static void psycho_pbm_strbuf_init(struct pci_controller_info *p,
1088static void psycho_pbm_init(struct pci_controller_info *p, 1077static void psycho_pbm_init(struct pci_controller_info *p,
1089 struct device_node *dp, int is_pbm_a) 1078 struct device_node *dp, int is_pbm_a)
1090{ 1079{
1091 unsigned int *busrange;
1092 struct property *prop; 1080 struct property *prop;
1093 struct pci_pbm_info *pbm; 1081 struct pci_pbm_info *pbm;
1094 1082
@@ -1097,6 +1085,14 @@ static void psycho_pbm_init(struct pci_controller_info *p,
1097 else 1085 else
1098 pbm = &p->pbm_B; 1086 pbm = &p->pbm_B;
1099 1087
1088 pbm->next = pci_pbm_root;
1089 pci_pbm_root = pbm;
1090
1091 pbm->scan_bus = psycho_scan_bus;
1092 pbm->pci_ops = &psycho_ops;
1093
1094 pbm->index = pci_num_pbms++;
1095
1100 pbm->chip_type = PBM_CHIP_TYPE_PSYCHO; 1096 pbm->chip_type = PBM_CHIP_TYPE_PSYCHO;
1101 pbm->chip_version = 0; 1097 pbm->chip_version = 0;
1102 prop = of_find_property(dp, "version#", NULL); 1098 prop = of_find_property(dp, "version#", NULL);
@@ -1117,12 +1113,9 @@ static void psycho_pbm_init(struct pci_controller_info *p,
1117 1113
1118 pci_determine_mem_io_space(pbm); 1114 pci_determine_mem_io_space(pbm);
1119 1115
1120 prop = of_find_property(dp, "bus-range", NULL); 1116 pci_get_pbm_props(pbm);
1121 busrange = prop->value;
1122 pbm->pci_first_busno = busrange[0];
1123 pbm->pci_last_busno = busrange[1];
1124 1117
1125 psycho_pbm_strbuf_init(p, pbm, is_pbm_a); 1118 psycho_pbm_strbuf_init(pbm, is_pbm_a);
1126} 1119}
1127 1120
1128#define PSYCHO_CONFIGSPACE 0x001000000UL 1121#define PSYCHO_CONFIGSPACE 0x001000000UL
@@ -1131,6 +1124,7 @@ void psycho_init(struct device_node *dp, char *model_name)
1131{ 1124{
1132 struct linux_prom64_registers *pr_regs; 1125 struct linux_prom64_registers *pr_regs;
1133 struct pci_controller_info *p; 1126 struct pci_controller_info *p;
1127 struct pci_pbm_info *pbm;
1134 struct iommu *iommu; 1128 struct iommu *iommu;
1135 struct property *prop; 1129 struct property *prop;
1136 u32 upa_portid; 1130 u32 upa_portid;
@@ -1141,7 +1135,9 @@ void psycho_init(struct device_node *dp, char *model_name)
1141 if (prop) 1135 if (prop)
1142 upa_portid = *(u32 *) prop->value; 1136 upa_portid = *(u32 *) prop->value;
1143 1137
1144 for(p = pci_controller_root; p; p = p->next) { 1138 for (pbm = pci_pbm_root; pbm; pbm = pbm->next) {
1139 struct pci_controller_info *p = pbm->parent;
1140
1145 if (p->pbm_A.portid == upa_portid) { 1141 if (p->pbm_A.portid == upa_portid) {
1146 is_pbm_a = (p->pbm_A.prom_node == NULL); 1142 is_pbm_a = (p->pbm_A.prom_node == NULL);
1147 psycho_pbm_init(p, dp, is_pbm_a); 1143 psycho_pbm_init(p, dp, is_pbm_a);
@@ -1161,14 +1157,8 @@ void psycho_init(struct device_node *dp, char *model_name)
1161 } 1157 }
1162 p->pbm_A.iommu = p->pbm_B.iommu = iommu; 1158 p->pbm_A.iommu = p->pbm_B.iommu = iommu;
1163 1159
1164 p->next = pci_controller_root;
1165 pci_controller_root = p;
1166
1167 p->pbm_A.portid = upa_portid; 1160 p->pbm_A.portid = upa_portid;
1168 p->pbm_B.portid = upa_portid; 1161 p->pbm_B.portid = upa_portid;
1169 p->index = pci_num_controllers++;
1170 p->scan_bus = psycho_scan_bus;
1171 p->pci_ops = &psycho_ops;
1172 1162
1173 prop = of_find_property(dp, "reg", NULL); 1163 prop = of_find_property(dp, "reg", NULL);
1174 pr_regs = prop->value; 1164 pr_regs = prop->value;
@@ -1185,9 +1175,9 @@ void psycho_init(struct device_node *dp, char *model_name)
1185 */ 1175 */
1186 pci_memspace_mask = 0x7fffffffUL; 1176 pci_memspace_mask = 0x7fffffffUL;
1187 1177
1188 psycho_controller_hwinit(p); 1178 psycho_controller_hwinit(&p->pbm_A);
1189 1179
1190 psycho_iommu_init(p); 1180 psycho_iommu_init(&p->pbm_A);
1191 1181
1192 is_pbm_a = ((pr_regs[0].phys_addr & 0x6000) == 0x2000); 1182 is_pbm_a = ((pr_regs[0].phys_addr & 0x6000) == 0x2000);
1193 psycho_pbm_init(p, dp, is_pbm_a); 1183 psycho_pbm_init(p, dp, is_pbm_a);