diff options
Diffstat (limited to 'arch/sparc64/kernel/itlb_miss.S')
| -rw-r--r-- | arch/sparc64/kernel/itlb_miss.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/sparc64/kernel/itlb_miss.S b/arch/sparc64/kernel/itlb_miss.S index ad46e2024f4b..5a8377b54955 100644 --- a/arch/sparc64/kernel/itlb_miss.S +++ b/arch/sparc64/kernel/itlb_miss.S | |||
| @@ -11,12 +11,12 @@ | |||
| 11 | /* ITLB ** ICACHE line 2: TSB compare and TLB load */ | 11 | /* ITLB ** ICACHE line 2: TSB compare and TLB load */ |
| 12 | bne,pn %xcc, tsb_miss_itlb ! Miss | 12 | bne,pn %xcc, tsb_miss_itlb ! Miss |
| 13 | mov FAULT_CODE_ITLB, %g3 | 13 | mov FAULT_CODE_ITLB, %g3 |
| 14 | andcc %g5, _PAGE_EXEC_4U, %g0 ! Executable? | 14 | sethi %hi(_PAGE_EXEC_4U), %g4 |
| 15 | andcc %g5, %g4, %g0 ! Executable? | ||
| 15 | be,pn %xcc, tsb_do_fault | 16 | be,pn %xcc, tsb_do_fault |
| 16 | nop ! Delay slot, fill me | 17 | nop ! Delay slot, fill me |
| 17 | stxa %g5, [%g0] ASI_ITLB_DATA_IN ! Load TLB | 18 | stxa %g5, [%g0] ASI_ITLB_DATA_IN ! Load TLB |
| 18 | retry ! Trap done | 19 | retry ! Trap done |
| 19 | nop | ||
| 20 | 20 | ||
| 21 | /* ITLB ** ICACHE line 3: */ | 21 | /* ITLB ** ICACHE line 3: */ |
| 22 | nop | 22 | nop |