diff options
Diffstat (limited to 'arch/sparc64/kernel/itlb_miss.S')
-rw-r--r-- | arch/sparc64/kernel/itlb_miss.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/sparc64/kernel/itlb_miss.S b/arch/sparc64/kernel/itlb_miss.S index 97facce27aad..730caa4a1506 100644 --- a/arch/sparc64/kernel/itlb_miss.S +++ b/arch/sparc64/kernel/itlb_miss.S | |||
@@ -6,9 +6,10 @@ | |||
6 | nop ! Delay slot (fill me) | 6 | nop ! Delay slot (fill me) |
7 | TSB_LOAD_QUAD(%g1, %g4) ! Load TSB entry | 7 | TSB_LOAD_QUAD(%g1, %g4) ! Load TSB entry |
8 | cmp %g4, %g6 ! Compare TAG | 8 | cmp %g4, %g6 ! Compare TAG |
9 | sethi %hi(_PAGE_EXEC), %g4 ! Setup exec check | 9 | sethi %hi(PAGE_EXEC), %g4 ! Setup exec check |
10 | 10 | ||
11 | /* ITLB ** ICACHE line 2: TSB compare and TLB load */ | 11 | /* ITLB ** ICACHE line 2: TSB compare and TLB load */ |
12 | ldx [%g4 + %lo(PAGE_EXEC)], %g4 | ||
12 | bne,pn %xcc, tsb_miss_itlb ! Miss | 13 | bne,pn %xcc, tsb_miss_itlb ! Miss |
13 | mov FAULT_CODE_ITLB, %g3 | 14 | mov FAULT_CODE_ITLB, %g3 |
14 | andcc %g5, %g4, %g0 ! Executable? | 15 | andcc %g5, %g4, %g0 ! Executable? |
@@ -16,7 +17,6 @@ | |||
16 | nop ! Delay slot, fill me | 17 | nop ! Delay slot, fill me |
17 | stxa %g5, [%g0] ASI_ITLB_DATA_IN ! Load TLB | 18 | stxa %g5, [%g0] ASI_ITLB_DATA_IN ! Load TLB |
18 | retry ! Trap done | 19 | retry ! Trap done |
19 | nop | ||
20 | 20 | ||
21 | /* ITLB ** ICACHE line 3: */ | 21 | /* ITLB ** ICACHE line 3: */ |
22 | nop | 22 | nop |