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-rw-r--r--arch/sparc64/kernel/head.S69
1 files changed, 32 insertions, 37 deletions
diff --git a/arch/sparc64/kernel/head.S b/arch/sparc64/kernel/head.S
index f1dcdf8f7433..b49dcd4504b0 100644
--- a/arch/sparc64/kernel/head.S
+++ b/arch/sparc64/kernel/head.S
@@ -28,19 +28,14 @@
28#include <asm/mmu.h> 28#include <asm/mmu.h>
29 29
30/* This section from from _start to sparc64_boot_end should fit into 30/* This section from from _start to sparc64_boot_end should fit into
31 * 0x0000.0000.0040.4000 to 0x0000.0000.0040.8000 and will be sharing space 31 * 0x0000000000404000 to 0x0000000000408000.
32 * with bootup_user_stack, which is from 0x0000.0000.0040.4000 to
33 * 0x0000.0000.0040.6000 and empty_bad_page, which is from
34 * 0x0000.0000.0040.6000 to 0x0000.0000.0040.8000.
35 */ 32 */
36
37 .text 33 .text
38 .globl start, _start, stext, _stext 34 .globl start, _start, stext, _stext
39_start: 35_start:
40start: 36start:
41_stext: 37_stext:
42stext: 38stext:
43bootup_user_stack:
44! 0x0000000000404000 39! 0x0000000000404000
45 b sparc64_boot 40 b sparc64_boot
46 flushw /* Flush register file. */ 41 flushw /* Flush register file. */
@@ -191,8 +186,9 @@ prom_boot_mapping_phys_low:
191 stx %l3, [%sp + 2047 + 128 + 0x10] ! num_rets, 5 186 stx %l3, [%sp + 2047 + 128 + 0x10] ! num_rets, 5
192 stx %l2, [%sp + 2047 + 128 + 0x18] ! arg1: "translate" 187 stx %l2, [%sp + 2047 + 128 + 0x18] ! arg1: "translate"
193 stx %l5, [%sp + 2047 + 128 + 0x20] ! arg2: prom_mmu_ihandle_cache 188 stx %l5, [%sp + 2047 + 128 + 0x20] ! arg2: prom_mmu_ihandle_cache
194 srlx %l0, 22, %l3 189 /* PAGE align */
195 sllx %l3, 22, %l3 190 srlx %l0, 13, %l3
191 sllx %l3, 13, %l3
196 stx %l3, [%sp + 2047 + 128 + 0x28] ! arg3: vaddr, our PC 192 stx %l3, [%sp + 2047 + 128 + 0x28] ! arg3: vaddr, our PC
197 stx %g0, [%sp + 2047 + 128 + 0x30] ! res1 193 stx %g0, [%sp + 2047 + 128 + 0x30] ! res1
198 stx %g0, [%sp + 2047 + 128 + 0x38] ! res2 194 stx %g0, [%sp + 2047 + 128 + 0x38] ! res2
@@ -211,6 +207,9 @@ prom_boot_mapping_phys_low:
211 ldx [%sp + 2047 + 128 + 0x48], %l2 ! physaddr high 207 ldx [%sp + 2047 + 128 + 0x48], %l2 ! physaddr high
212 stx %l2, [%l4 + 0x0] 208 stx %l2, [%l4 + 0x0]
213 ldx [%sp + 2047 + 128 + 0x50], %l3 ! physaddr low 209 ldx [%sp + 2047 + 128 + 0x50], %l3 ! physaddr low
210 /* 4MB align */
211 srlx %l3, 22, %l3
212 sllx %l3, 22, %l3
214 stx %l3, [%l4 + 0x8] 213 stx %l3, [%l4 + 0x8]
215 214
216 /* Leave service as-is, "call-method" */ 215 /* Leave service as-is, "call-method" */
@@ -388,31 +387,30 @@ tlb_fixup_done:
388 * former does use this code, the latter does not yet due 387 * former does use this code, the latter does not yet due
389 * to some complexities. That should be fixed up at some 388 * to some complexities. That should be fixed up at some
390 * point. 389 * point.
390 *
391 * There used to be enormous complexity wrt. transferring
392 * over from the firwmare's trap table to the Linux kernel's.
393 * For example, there was a chicken & egg problem wrt. building
394 * the OBP page tables, yet needing to be on the Linux kernel
395 * trap table (to translate PAGE_OFFSET addresses) in order to
396 * do that.
397 *
398 * We now handle OBP tlb misses differently, via linear lookups
399 * into the prom_trans[] array. So that specific problem no
400 * longer exists. Yet, unfortunately there are still some issues
401 * preventing trampoline.S from using this code... ho hum.
391 */ 402 */
392 .globl setup_trap_table 403 .globl setup_trap_table
393setup_trap_table: 404setup_trap_table:
394 save %sp, -192, %sp 405 save %sp, -192, %sp
395 406
396 /* Force interrupts to be disabled. Transferring over to 407 /* Force interrupts to be disabled. */
397 * the Linux trap table is a very delicate operation.
398 * Until we are actually on the Linux trap table, we cannot
399 * get the PAGE_OFFSET linear mappings translated. We need
400 * that mapping to be setup in order to initialize the firmware
401 * page tables.
402 *
403 * So there is this window of time, from the return from
404 * prom_set_trap_table() until inherit_prom_mappings_post()
405 * (in arch/sparc64/mm/init.c) completes, during which no
406 * firmware address space accesses can be made.
407 */
408 rdpr %pstate, %o1 408 rdpr %pstate, %o1
409 andn %o1, PSTATE_IE, %o1 409 andn %o1, PSTATE_IE, %o1
410 wrpr %o1, 0x0, %pstate 410 wrpr %o1, 0x0, %pstate
411 wrpr %g0, 15, %pil 411 wrpr %g0, 15, %pil
412 412
413 /* Ok, now make the final valid firmware call to jump over 413 /* Make the firmware call to jump over to the Linux trap table. */
414 * to the Linux trap table.
415 */
416 call prom_set_trap_table 414 call prom_set_trap_table
417 sethi %hi(sparc64_ttable_tl0), %o0 415 sethi %hi(sparc64_ttable_tl0), %o0
418 416
@@ -536,15 +534,21 @@ setup_tba: /* i0 = is_starfire */
536 534
537 ret 535 ret
538 restore 536 restore
537sparc64_boot_end:
538
539#include "systbls.S"
540#include "ktlb.S"
541#include "etrap.S"
542#include "rtrap.S"
543#include "winfixup.S"
544#include "entry.S"
539 545
540/* 546/*
541 * The following skips make sure the trap table in ttable.S is aligned 547 * The following skip makes sure the trap table in ttable.S is aligned
542 * on a 32K boundary as required by the v9 specs for TBA register. 548 * on a 32K boundary as required by the v9 specs for TBA register.
543 */ 549 */
544sparc64_boot_end: 5501:
545 .skip 0x2000 + _start - sparc64_boot_end 551 .skip 0x4000 + _start - 1b
546bootup_user_stack_end:
547 .skip 0x2000
548 552
549#ifdef CONFIG_SBUS 553#ifdef CONFIG_SBUS
550/* This is just a hack to fool make depend config.h discovering 554/* This is just a hack to fool make depend config.h discovering
@@ -556,15 +560,6 @@ bootup_user_stack_end:
556! 0x0000000000408000 560! 0x0000000000408000
557 561
558#include "ttable.S" 562#include "ttable.S"
559#include "systbls.S"
560#include "ktlb.S"
561#include "etrap.S"
562#include "rtrap.S"
563#include "winfixup.S"
564#include "entry.S"
565
566 /* This is just anal retentiveness on my part... */
567 .align 16384
568 563
569 .data 564 .data
570 .align 8 565 .align 8