5 files changed, 319 insertions, 2 deletions

diff --git a/arch/sparc/mm/Makefile b/arch/sparc/mm/Makefile
index 681abe0a4594..79836a7dd00c 100644
--- a/arch/sparc/mm/Makefile
+++ b/arch/sparc/mm/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_SPARC32)   += loadmmu.o
 obj-y                   += generic_$(BITS).o
 obj-$(CONFIG_SPARC32)   += extable.o btfixup.o srmmu.o iommu.o io-unit.o
 obj-$(CONFIG_SPARC32)   += hypersparc.o viking.o tsunami.o swift.o
+obj-$(CONFIG_SPARC_LEON)+= leon_mm.o
 
 # Only used by sparc64
 obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
diff --git a/arch/sparc/mm/init_32.c b/arch/sparc/mm/init_32.c
index 26bb3919ff1f..dc7c3b17a15f 100644
--- a/arch/sparc/mm/init_32.c
+++ b/arch/sparc/mm/init_32.c
@@ -34,6 +34,7 @@
 #include <asm/pgalloc.h>        /* bug in asm-generic/tlb.h: check_pgt_cache */
 #include <asm/tlb.h>
 #include <asm/prom.h>
+#include <asm/leon.h>
 
 DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
 
@@ -326,6 +327,9 @@ void __init paging_init(void)
                 sparc_unmapped_base = 0xe0000000;
                 BTFIXUPSET_SETHI(sparc_unmapped_base, 0xe0000000);
                 break;
+        case sparc_leon:
+                leon_init();
+                /* fall through */
         case sun4m:
         case sun4d:
                 srmmu_paging_init();
@@ -468,7 +472,7 @@ void __init mem_init(void)
                         reservedpages++;
 
         printk(KERN_INFO "Memory: %luk/%luk available (%dk kernel code, %dk reserved, %dk data, %dk init, %ldk highmem)\n",
-               (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
+               nr_free_pages() << (PAGE_SHIFT-10),
                num_physpages << (PAGE_SHIFT - 10),
                codepages << (PAGE_SHIFT-10),
                reservedpages << (PAGE_SHIFT - 10),
diff --git a/arch/sparc/mm/leon_mm.c b/arch/sparc/mm/leon_mm.c
new file mode 100644
index 000000000000..c0e01297e64e
--- /dev/null
+++ b/arch/sparc/mm/leon_mm.c
@@ -0,0 +1,260 @@
+/*
+ *  linux/arch/sparc/mm/leon_m.c
+ *
+ * Copyright (C) 2004 Konrad Eisele (eiselekd@web.de, konrad@gaisler.com) Gaisler Research
+ * Copyright (C) 2009 Daniel Hellstrom (daniel@gaisler.com) Aeroflex Gaisler AB
+ * Copyright (C) 2009 Konrad Eisele (konrad@gaisler.com) Aeroflex Gaisler AB
+ *
+ * do srmmu probe in software
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <asm/asi.h>
+#include <asm/leon.h>
+#include <asm/tlbflush.h>
+
+int leon_flush_during_switch = 1;
+int srmmu_swprobe_trace;
+
+unsigned long srmmu_swprobe(unsigned long vaddr, unsigned long *paddr)
+{
+
+        unsigned int ctxtbl;
+        unsigned int pgd, pmd, ped;
+        unsigned int ptr;
+        unsigned int lvl, pte, paddrbase;
+        unsigned int ctx;
+        unsigned int paddr_calc;
+
+        paddrbase = 0;
+
+        if (srmmu_swprobe_trace)
+                printk(KERN_INFO "swprobe: trace on\n");
+
+        ctxtbl = srmmu_get_ctable_ptr();
+        if (!(ctxtbl)) {
+                if (srmmu_swprobe_trace)
+                        printk(KERN_INFO "swprobe: srmmu_get_ctable_ptr returned 0=>0\n");
+                return 0;
+        }
+        if (!_pfn_valid(PFN(ctxtbl))) {
+                if (srmmu_swprobe_trace)
+                        printk(KERN_INFO
+                               "swprobe: !_pfn_valid(%x)=>0\n",
+                               PFN(ctxtbl));
+                return 0;
+        }
+
+        ctx = srmmu_get_context();
+        if (srmmu_swprobe_trace)
+                printk(KERN_INFO "swprobe:  --- ctx (%x) ---\n", ctx);
+
+        pgd = LEON_BYPASS_LOAD_PA(ctxtbl + (ctx * 4));
+
+        if (((pgd & SRMMU_ET_MASK) == SRMMU_ET_PTE)) {
+                if (srmmu_swprobe_trace)
+                        printk(KERN_INFO "swprobe: pgd is entry level 3\n");
+                lvl = 3;
+                pte = pgd;
+                paddrbase = pgd & _SRMMU_PTE_PMASK_LEON;
+                goto ready;
+        }
+        if (((pgd & SRMMU_ET_MASK) != SRMMU_ET_PTD)) {
+                if (srmmu_swprobe_trace)
+                        printk(KERN_INFO "swprobe: pgd is invalid => 0\n");
+                return 0;
+        }
+
+        if (srmmu_swprobe_trace)
+                printk(KERN_INFO "swprobe:  --- pgd (%x) ---\n", pgd);
+
+        ptr = (pgd & SRMMU_PTD_PMASK) << 4;
+        ptr += ((((vaddr) >> LEON_PGD_SH) & LEON_PGD_M) * 4);
+        if (!_pfn_valid(PFN(ptr)))
+                return 0;
+
+        pmd = LEON_BYPASS_LOAD_PA(ptr);
+        if (((pmd & SRMMU_ET_MASK) == SRMMU_ET_PTE)) {
+                if (srmmu_swprobe_trace)
+                        printk(KERN_INFO "swprobe: pmd is entry level 2\n");
+                lvl = 2;
+                pte = pmd;
+                paddrbase = pmd & _SRMMU_PTE_PMASK_LEON;
+                goto ready;
+        }
+        if (((pmd & SRMMU_ET_MASK) != SRMMU_ET_PTD)) {
+                if (srmmu_swprobe_trace)
+                        printk(KERN_INFO "swprobe: pmd is invalid => 0\n");
+                return 0;
+        }
+
+        if (srmmu_swprobe_trace)
+                printk(KERN_INFO "swprobe:  --- pmd (%x) ---\n", pmd);
+
+        ptr = (pmd & SRMMU_PTD_PMASK) << 4;
+        ptr += (((vaddr >> LEON_PMD_SH) & LEON_PMD_M) * 4);
+        if (!_pfn_valid(PFN(ptr))) {
+                if (srmmu_swprobe_trace)
+                        printk(KERN_INFO "swprobe: !_pfn_valid(%x)=>0\n",
+                               PFN(ptr));
+                return 0;
+        }
+
+        ped = LEON_BYPASS_LOAD_PA(ptr);
+
+        if (((ped & SRMMU_ET_MASK) == SRMMU_ET_PTE)) {
+                if (srmmu_swprobe_trace)
+                        printk(KERN_INFO "swprobe: ped is entry level 1\n");
+                lvl = 1;
+                pte = ped;
+                paddrbase = ped & _SRMMU_PTE_PMASK_LEON;
+                goto ready;
+        }
+        if (((ped & SRMMU_ET_MASK) != SRMMU_ET_PTD)) {
+                if (srmmu_swprobe_trace)
+                        printk(KERN_INFO "swprobe: ped is invalid => 0\n");
+                return 0;
+        }
+
+        if (srmmu_swprobe_trace)
+                printk(KERN_INFO "swprobe:  --- ped (%x) ---\n", ped);
+
+        ptr = (ped & SRMMU_PTD_PMASK) << 4;
+        ptr += (((vaddr >> LEON_PTE_SH) & LEON_PTE_M) * 4);
+        if (!_pfn_valid(PFN(ptr)))
+                return 0;
+
+        ptr = LEON_BYPASS_LOAD_PA(ptr);
+        if (((ptr & SRMMU_ET_MASK) == SRMMU_ET_PTE)) {
+                if (srmmu_swprobe_trace)
+                        printk(KERN_INFO "swprobe: ptr is entry level 0\n");
+                lvl = 0;
+                pte = ptr;
+                paddrbase = ptr & _SRMMU_PTE_PMASK_LEON;
+                goto ready;
+        }
+        if (srmmu_swprobe_trace)
+                printk(KERN_INFO "swprobe: ptr is invalid => 0\n");
+        return 0;
+
+ready:
+        switch (lvl) {
+        case 0:
+                paddr_calc =
+                    (vaddr & ~(-1 << LEON_PTE_SH)) | ((pte & ~0xff) << 4);
+                break;
+        case 1:
+                paddr_calc =
+                    (vaddr & ~(-1 << LEON_PMD_SH)) | ((pte & ~0xff) << 4);
+                break;
+        case 2:
+                paddr_calc =
+                    (vaddr & ~(-1 << LEON_PGD_SH)) | ((pte & ~0xff) << 4);
+                break;
+        default:
+        case 3:
+                paddr_calc = vaddr;
+                break;
+        }
+        if (srmmu_swprobe_trace)
+                printk(KERN_INFO "swprobe: padde %x\n", paddr_calc);
+        if (paddr)
+                *paddr = paddr_calc;
+        return paddrbase;
+}
+
+void leon_flush_icache_all(void)
+{
+        __asm__ __volatile__(" flush ");        /*iflush*/
+}
+
+void leon_flush_dcache_all(void)
+{
+        __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" : :
+                             "i"(ASI_LEON_DFLUSH) : "memory");
+}
+
+void leon_flush_pcache_all(struct vm_area_struct *vma, unsigned long page)
+{
+        if (vma->vm_flags & VM_EXEC)
+                leon_flush_icache_all();
+        leon_flush_dcache_all();
+}
+
+void leon_flush_cache_all(void)
+{
+        __asm__ __volatile__(" flush ");        /*iflush*/
+        __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" : :
+                             "i"(ASI_LEON_DFLUSH) : "memory");
+}
+
+void leon_flush_tlb_all(void)
+{
+        leon_flush_cache_all();
+        __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : "r"(0x400),
+                             "i"(ASI_LEON_MMUFLUSH) : "memory");
+}
+
+/* get all cache regs */
+void leon3_getCacheRegs(struct leon3_cacheregs *regs)
+{
+        unsigned long ccr, iccr, dccr;
+
+        if (!regs)
+                return;
+        /* Get Cache regs from "Cache ASI" address 0x0, 0x8 and 0xC */
+        __asm__ __volatile__("lda [%%g0] %3, %0\n\t"
+                             "mov 0x08, %%g1\n\t"
+                             "lda [%%g1] %3, %1\n\t"
+                             "mov 0x0c, %%g1\n\t"
+                             "lda [%%g1] %3, %2\n\t"
+                             : "=r"(ccr), "=r"(iccr), "=r"(dccr)
+                               /* output */
+                             : "i"(ASI_LEON_CACHEREGS)  /* input */
+                             : "g1"     /* clobber list */
+            );
+        regs->ccr = ccr;
+        regs->iccr = iccr;
+        regs->dccr = dccr;
+}
+
+/* Due to virtual cache we need to check cache configuration if
+ * it is possible to skip flushing in some cases.
+ *
+ * Leon2 and Leon3 differ in their way of telling cache information
+ *
+ */
+int leon_flush_needed(void)
+{
+        int flush_needed = -1;
+        unsigned int ssize, sets;
+        char *setStr[4] =
+            { "direct mapped", "2-way associative", "3-way associative",
+                "4-way associative"
+        };
+        /* leon 3 */
+        struct leon3_cacheregs cregs;
+        leon3_getCacheRegs(&cregs);
+        sets = (cregs.dccr & LEON3_XCCR_SETS_MASK) >> 24;
+        /* (ssize=>realsize) 0=>1k, 1=>2k, 2=>4k, 3=>8k ... */
+        ssize = 1 << ((cregs.dccr & LEON3_XCCR_SSIZE_MASK) >> 20);
+
+        printk(KERN_INFO "CACHE: %s cache, set size %dk\n",
+               sets > 3 ? "unknown" : setStr[sets], ssize);
+        if ((ssize <= (PAGE_SIZE / 1024)) && (sets == 0)) {
+                /* Set Size <= Page size  ==>
+                   flush on every context switch not needed. */
+                flush_needed = 0;
+                printk(KERN_INFO "CACHE: not flushing on every context switch\n");
+        }
+        return flush_needed;
+}
+
+void leon_switch_mm(void)
+{
+        flush_tlb_mm((void *)0);
+        if (leon_flush_during_switch)
+                leon_flush_cache_all();
+}
diff --git a/arch/sparc/mm/loadmmu.c b/arch/sparc/mm/loadmmu.c
index 652be05acbea..82ec8f666036 100644
--- a/arch/sparc/mm/loadmmu.c
+++ b/arch/sparc/mm/loadmmu.c
@@ -33,6 +33,7 @@ void __init load_mmu(void)
                 break;
         case sun4m:
         case sun4d:
+        case sparc_leon:
                 ld_mmu_srmmu();
                 break;
         default:
diff --git a/arch/sparc/mm/srmmu.c b/arch/sparc/mm/srmmu.c
index ade4eb373bdd..509b1ffeba66 100644
--- a/arch/sparc/mm/srmmu.c
+++ b/arch/sparc/mm/srmmu.c
@@ -46,6 +46,7 @@
 #include <asm/tsunami.h>
 #include <asm/swift.h>
 #include <asm/turbosparc.h>
+#include <asm/leon.h>
 
 #include <asm/btfixup.h>
 
@@ -569,6 +570,9 @@ static void srmmu_switch_mm(struct mm_struct *old_mm, struct mm_struct *mm,
                 srmmu_ctxd_set(&srmmu_context_table[mm->context], mm->pgd);
         }
 
+        if (sparc_cpu_model == sparc_leon)
+                leon_switch_mm();
+
         if (is_hypersparc)
                 hyper_flush_whole_icache();
 
@@ -1977,6 +1981,45 @@ static void __init init_viking(void)
         poke_srmmu = poke_viking;
 }
 
+#ifdef CONFIG_SPARC_LEON
+
+void __init poke_leonsparc(void)
+{
+}
+
+void __init init_leon(void)
+{
+
+        srmmu_name = "Leon";
+
+        BTFIXUPSET_CALL(flush_cache_all, leon_flush_cache_all,
+                        BTFIXUPCALL_NORM);
+        BTFIXUPSET_CALL(flush_cache_mm, leon_flush_cache_all,
+                        BTFIXUPCALL_NORM);
+        BTFIXUPSET_CALL(flush_cache_page, leon_flush_pcache_all,
+                        BTFIXUPCALL_NORM);
+        BTFIXUPSET_CALL(flush_cache_range, leon_flush_cache_all,
+                        BTFIXUPCALL_NORM);
+        BTFIXUPSET_CALL(flush_page_for_dma, leon_flush_dcache_all,
+                        BTFIXUPCALL_NORM);
+
+        BTFIXUPSET_CALL(flush_tlb_all, leon_flush_tlb_all, BTFIXUPCALL_NORM);
+        BTFIXUPSET_CALL(flush_tlb_mm, leon_flush_tlb_all, BTFIXUPCALL_NORM);
+        BTFIXUPSET_CALL(flush_tlb_page, leon_flush_tlb_all, BTFIXUPCALL_NORM);
+        BTFIXUPSET_CALL(flush_tlb_range, leon_flush_tlb_all, BTFIXUPCALL_NORM);
+
+        BTFIXUPSET_CALL(__flush_page_to_ram, leon_flush_cache_all,
+                        BTFIXUPCALL_NOP);
+        BTFIXUPSET_CALL(flush_sig_insns, leon_flush_cache_all, BTFIXUPCALL_NOP);
+
+        poke_srmmu = poke_leonsparc;
+
+        srmmu_cache_pagetables = 0;
+
+        leon_flush_during_switch = leon_flush_needed();
+}
+#endif
+
 /* Probe for the srmmu chip version. */
 static void __init get_srmmu_type(void)
 {
@@ -1992,7 +2035,15 @@ static void __init get_srmmu_type(void)
         psr_typ = (psr >> 28) & 0xf;
         psr_vers = (psr >> 24) & 0xf;
 
-        /* First, check for HyperSparc or Cypress. */
+        /* First, check for sparc-leon. */
+        if (sparc_cpu_model == sparc_leon) {
+                psr_typ = 0xf;  /* hardcoded ids for older models/simulators */
+                psr_vers = 2;
+                init_leon();
+                return;
+        }
+
+        /* Second, check for HyperSparc or Cypress. */
         if(mod_typ == 1) {
                 switch(mod_rev) {
                 case 7: