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Diffstat (limited to 'arch/sparc/kernel/sun4m_irq.c')
-rw-r--r--arch/sparc/kernel/sun4m_irq.c399
1 files changed, 399 insertions, 0 deletions
diff --git a/arch/sparc/kernel/sun4m_irq.c b/arch/sparc/kernel/sun4m_irq.c
new file mode 100644
index 000000000000..39d712c3c809
--- /dev/null
+++ b/arch/sparc/kernel/sun4m_irq.c
@@ -0,0 +1,399 @@
1/* sun4m_irq.c
2 * arch/sparc/kernel/sun4m_irq.c:
3 *
4 * djhr: Hacked out of irq.c into a CPU dependent version.
5 *
6 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
7 * Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx)
8 * Copyright (C) 1995 Pete A. Zaitcev (zaitcev@yahoo.com)
9 * Copyright (C) 1996 Dave Redman (djhr@tadpole.co.uk)
10 */
11
12#include <linux/config.h>
13#include <linux/errno.h>
14#include <linux/linkage.h>
15#include <linux/kernel_stat.h>
16#include <linux/signal.h>
17#include <linux/sched.h>
18#include <linux/ptrace.h>
19#include <linux/smp.h>
20#include <linux/interrupt.h>
21#include <linux/slab.h>
22#include <linux/init.h>
23#include <linux/ioport.h>
24
25#include <asm/ptrace.h>
26#include <asm/processor.h>
27#include <asm/system.h>
28#include <asm/psr.h>
29#include <asm/vaddrs.h>
30#include <asm/timer.h>
31#include <asm/openprom.h>
32#include <asm/oplib.h>
33#include <asm/traps.h>
34#include <asm/pgalloc.h>
35#include <asm/pgtable.h>
36#include <asm/smp.h>
37#include <asm/irq.h>
38#include <asm/io.h>
39#include <asm/sbus.h>
40#include <asm/cacheflush.h>
41
42static unsigned long dummy;
43
44struct sun4m_intregs *sun4m_interrupts;
45unsigned long *irq_rcvreg = &dummy;
46
47/* These tables only apply for interrupts greater than 15..
48 *
49 * any intr value below 0x10 is considered to be a soft-int
50 * this may be useful or it may not.. but that's how I've done it.
51 * and it won't clash with what OBP is telling us about devices.
52 *
53 * take an encoded intr value and lookup if it's valid
54 * then get the mask bits that match from irq_mask
55 *
56 * P3: Translation from irq 0x0d to mask 0x2000 is for MrCoffee.
57 */
58static unsigned char irq_xlate[32] = {
59 /* 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, a, b, c, d, e, f */
60 0, 0, 0, 0, 1, 0, 2, 0, 3, 0, 4, 5, 6, 14, 0, 7,
61 0, 0, 8, 9, 0, 10, 0, 11, 0, 12, 0, 13, 0, 14, 0, 0
62};
63
64static unsigned long irq_mask[] = {
65 0, /* illegal index */
66 SUN4M_INT_SCSI, /* 1 irq 4 */
67 SUN4M_INT_ETHERNET, /* 2 irq 6 */
68 SUN4M_INT_VIDEO, /* 3 irq 8 */
69 SUN4M_INT_REALTIME, /* 4 irq 10 */
70 SUN4M_INT_FLOPPY, /* 5 irq 11 */
71 (SUN4M_INT_SERIAL | SUN4M_INT_KBDMS), /* 6 irq 12 */
72 SUN4M_INT_MODULE_ERR, /* 7 irq 15 */
73 SUN4M_INT_SBUS(0), /* 8 irq 2 */
74 SUN4M_INT_SBUS(1), /* 9 irq 3 */
75 SUN4M_INT_SBUS(2), /* 10 irq 5 */
76 SUN4M_INT_SBUS(3), /* 11 irq 7 */
77 SUN4M_INT_SBUS(4), /* 12 irq 9 */
78 SUN4M_INT_SBUS(5), /* 13 irq 11 */
79 SUN4M_INT_SBUS(6) /* 14 irq 13 */
80};
81
82static int sun4m_pil_map[] = { 0, 2, 3, 5, 7, 9, 11, 13 };
83
84unsigned int sun4m_sbint_to_irq(struct sbus_dev *sdev, unsigned int sbint)
85{
86 if (sbint >= sizeof(sun4m_pil_map)) {
87 printk(KERN_ERR "%s: bogus SBINT %d\n", sdev->prom_name, sbint);
88 BUG();
89 }
90 return sun4m_pil_map[sbint] | 0x30;
91}
92
93inline unsigned long sun4m_get_irqmask(unsigned int irq)
94{
95 unsigned long mask;
96
97 if (irq > 0x20) {
98 /* OBIO/SBUS interrupts */
99 irq &= 0x1f;
100 mask = irq_mask[irq_xlate[irq]];
101 if (!mask)
102 printk("sun4m_get_irqmask: IRQ%d has no valid mask!\n",irq);
103 } else {
104 /* Soft Interrupts will come here.
105 * Currently there is no way to trigger them but I'm sure
106 * something could be cooked up.
107 */
108 irq &= 0xf;
109 mask = SUN4M_SOFT_INT(irq);
110 }
111 return mask;
112}
113
114static void sun4m_disable_irq(unsigned int irq_nr)
115{
116 unsigned long mask, flags;
117 int cpu = smp_processor_id();
118
119 mask = sun4m_get_irqmask(irq_nr);
120 local_irq_save(flags);
121 if (irq_nr > 15)
122 sun4m_interrupts->set = mask;
123 else
124 sun4m_interrupts->cpu_intregs[cpu].set = mask;
125 local_irq_restore(flags);
126}
127
128static void sun4m_enable_irq(unsigned int irq_nr)
129{
130 unsigned long mask, flags;
131 int cpu = smp_processor_id();
132
133 /* Dreadful floppy hack. When we use 0x2b instead of
134 * 0x0b the system blows (it starts to whistle!).
135 * So we continue to use 0x0b. Fixme ASAP. --P3
136 */
137 if (irq_nr != 0x0b) {
138 mask = sun4m_get_irqmask(irq_nr);
139 local_irq_save(flags);
140 if (irq_nr > 15)
141 sun4m_interrupts->clear = mask;
142 else
143 sun4m_interrupts->cpu_intregs[cpu].clear = mask;
144 local_irq_restore(flags);
145 } else {
146 local_irq_save(flags);
147 sun4m_interrupts->clear = SUN4M_INT_FLOPPY;
148 local_irq_restore(flags);
149 }
150}
151
152static unsigned long cpu_pil_to_imask[16] = {
153/*0*/ 0x00000000,
154/*1*/ 0x00000000,
155/*2*/ SUN4M_INT_SBUS(0) | SUN4M_INT_VME(0),
156/*3*/ SUN4M_INT_SBUS(1) | SUN4M_INT_VME(1),
157/*4*/ SUN4M_INT_SCSI,
158/*5*/ SUN4M_INT_SBUS(2) | SUN4M_INT_VME(2),
159/*6*/ SUN4M_INT_ETHERNET,
160/*7*/ SUN4M_INT_SBUS(3) | SUN4M_INT_VME(3),
161/*8*/ SUN4M_INT_VIDEO,
162/*9*/ SUN4M_INT_SBUS(4) | SUN4M_INT_VME(4) | SUN4M_INT_MODULE_ERR,
163/*10*/ SUN4M_INT_REALTIME,
164/*11*/ SUN4M_INT_SBUS(5) | SUN4M_INT_VME(5) | SUN4M_INT_FLOPPY,
165/*12*/ SUN4M_INT_SERIAL | SUN4M_INT_KBDMS,
166/*13*/ SUN4M_INT_AUDIO,
167/*14*/ SUN4M_INT_E14,
168/*15*/ 0x00000000
169};
170
171/* We assume the caller has disabled local interrupts when these are called,
172 * or else very bizarre behavior will result.
173 */
174static void sun4m_disable_pil_irq(unsigned int pil)
175{
176 sun4m_interrupts->set = cpu_pil_to_imask[pil];
177}
178
179static void sun4m_enable_pil_irq(unsigned int pil)
180{
181 sun4m_interrupts->clear = cpu_pil_to_imask[pil];
182}
183
184#ifdef CONFIG_SMP
185static void sun4m_send_ipi(int cpu, int level)
186{
187 unsigned long mask;
188
189 mask = sun4m_get_irqmask(level);
190 sun4m_interrupts->cpu_intregs[cpu].set = mask;
191}
192
193static void sun4m_clear_ipi(int cpu, int level)
194{
195 unsigned long mask;
196
197 mask = sun4m_get_irqmask(level);
198 sun4m_interrupts->cpu_intregs[cpu].clear = mask;
199}
200
201static void sun4m_set_udt(int cpu)
202{
203 sun4m_interrupts->undirected_target = cpu;
204}
205#endif
206
207#define OBIO_INTR 0x20
208#define TIMER_IRQ (OBIO_INTR | 10)
209#define PROFILE_IRQ (OBIO_INTR | 14)
210
211struct sun4m_timer_regs *sun4m_timers;
212unsigned int lvl14_resolution = (((1000000/HZ) + 1) << 10);
213
214static void sun4m_clear_clock_irq(void)
215{
216 volatile unsigned int clear_intr;
217 clear_intr = sun4m_timers->l10_timer_limit;
218}
219
220static void sun4m_clear_profile_irq(int cpu)
221{
222 volatile unsigned int clear;
223
224 clear = sun4m_timers->cpu_timers[cpu].l14_timer_limit;
225}
226
227static void sun4m_load_profile_irq(int cpu, unsigned int limit)
228{
229 sun4m_timers->cpu_timers[cpu].l14_timer_limit = limit;
230}
231
232char *sun4m_irq_itoa(unsigned int irq)
233{
234 static char buff[16];
235 sprintf(buff, "%d", irq);
236 return buff;
237}
238
239static void __init sun4m_init_timers(irqreturn_t (*counter_fn)(int, void *, struct pt_regs *))
240{
241 int reg_count, irq, cpu;
242 struct linux_prom_registers cnt_regs[PROMREG_MAX];
243 int obio_node, cnt_node;
244 struct resource r;
245
246 cnt_node = 0;
247 if((obio_node =
248 prom_searchsiblings (prom_getchild(prom_root_node), "obio")) == 0 ||
249 (obio_node = prom_getchild (obio_node)) == 0 ||
250 (cnt_node = prom_searchsiblings (obio_node, "counter")) == 0) {
251 prom_printf("Cannot find /obio/counter node\n");
252 prom_halt();
253 }
254 reg_count = prom_getproperty(cnt_node, "reg",
255 (void *) cnt_regs, sizeof(cnt_regs));
256 reg_count = (reg_count/sizeof(struct linux_prom_registers));
257
258 /* Apply the obio ranges to the timer registers. */
259 prom_apply_obio_ranges(cnt_regs, reg_count);
260
261 cnt_regs[4].phys_addr = cnt_regs[reg_count-1].phys_addr;
262 cnt_regs[4].reg_size = cnt_regs[reg_count-1].reg_size;
263 cnt_regs[4].which_io = cnt_regs[reg_count-1].which_io;
264 for(obio_node = 1; obio_node < 4; obio_node++) {
265 cnt_regs[obio_node].phys_addr =
266 cnt_regs[obio_node-1].phys_addr + PAGE_SIZE;
267 cnt_regs[obio_node].reg_size = cnt_regs[obio_node-1].reg_size;
268 cnt_regs[obio_node].which_io = cnt_regs[obio_node-1].which_io;
269 }
270
271 memset((char*)&r, 0, sizeof(struct resource));
272 /* Map the per-cpu Counter registers. */
273 r.flags = cnt_regs[0].which_io;
274 r.start = cnt_regs[0].phys_addr;
275 sun4m_timers = (struct sun4m_timer_regs *) sbus_ioremap(&r, 0,
276 PAGE_SIZE*SUN4M_NCPUS, "sun4m_cpu_cnt");
277 /* Map the system Counter register. */
278 /* XXX Here we expect consequent calls to yeld adjusent maps. */
279 r.flags = cnt_regs[4].which_io;
280 r.start = cnt_regs[4].phys_addr;
281 sbus_ioremap(&r, 0, cnt_regs[4].reg_size, "sun4m_sys_cnt");
282
283 sun4m_timers->l10_timer_limit = (((1000000/HZ) + 1) << 10);
284 master_l10_counter = &sun4m_timers->l10_cur_count;
285 master_l10_limit = &sun4m_timers->l10_timer_limit;
286
287 irq = request_irq(TIMER_IRQ,
288 counter_fn,
289 (SA_INTERRUPT | SA_STATIC_ALLOC),
290 "timer", NULL);
291 if (irq) {
292 prom_printf("time_init: unable to attach IRQ%d\n",TIMER_IRQ);
293 prom_halt();
294 }
295
296 if (!cpu_find_by_instance(1, NULL, NULL)) {
297 for(cpu = 0; cpu < 4; cpu++)
298 sun4m_timers->cpu_timers[cpu].l14_timer_limit = 0;
299 sun4m_interrupts->set = SUN4M_INT_E14;
300 } else {
301 sun4m_timers->cpu_timers[0].l14_timer_limit = 0;
302 }
303#ifdef CONFIG_SMP
304 {
305 unsigned long flags;
306 extern unsigned long lvl14_save[4];
307 struct tt_entry *trap_table = &sparc_ttable[SP_TRAP_IRQ1 + (14 - 1)];
308
309 /* For SMP we use the level 14 ticker, however the bootup code
310 * has copied the firmwares level 14 vector into boot cpu's
311 * trap table, we must fix this now or we get squashed.
312 */
313 local_irq_save(flags);
314 trap_table->inst_one = lvl14_save[0];
315 trap_table->inst_two = lvl14_save[1];
316 trap_table->inst_three = lvl14_save[2];
317 trap_table->inst_four = lvl14_save[3];
318 local_flush_cache_all();
319 local_irq_restore(flags);
320 }
321#endif
322}
323
324void __init sun4m_init_IRQ(void)
325{
326 int ie_node,i;
327 struct linux_prom_registers int_regs[PROMREG_MAX];
328 int num_regs;
329 struct resource r;
330 int mid;
331
332 local_irq_disable();
333 if((ie_node = prom_searchsiblings(prom_getchild(prom_root_node), "obio")) == 0 ||
334 (ie_node = prom_getchild (ie_node)) == 0 ||
335 (ie_node = prom_searchsiblings (ie_node, "interrupt")) == 0) {
336 prom_printf("Cannot find /obio/interrupt node\n");
337 prom_halt();
338 }
339 num_regs = prom_getproperty(ie_node, "reg", (char *) int_regs,
340 sizeof(int_regs));
341 num_regs = (num_regs/sizeof(struct linux_prom_registers));
342
343 /* Apply the obio ranges to these registers. */
344 prom_apply_obio_ranges(int_regs, num_regs);
345
346 int_regs[4].phys_addr = int_regs[num_regs-1].phys_addr;
347 int_regs[4].reg_size = int_regs[num_regs-1].reg_size;
348 int_regs[4].which_io = int_regs[num_regs-1].which_io;
349 for(ie_node = 1; ie_node < 4; ie_node++) {
350 int_regs[ie_node].phys_addr = int_regs[ie_node-1].phys_addr + PAGE_SIZE;
351 int_regs[ie_node].reg_size = int_regs[ie_node-1].reg_size;
352 int_regs[ie_node].which_io = int_regs[ie_node-1].which_io;
353 }
354
355 memset((char *)&r, 0, sizeof(struct resource));
356 /* Map the interrupt registers for all possible cpus. */
357 r.flags = int_regs[0].which_io;
358 r.start = int_regs[0].phys_addr;
359 sun4m_interrupts = (struct sun4m_intregs *) sbus_ioremap(&r, 0,
360 PAGE_SIZE*SUN4M_NCPUS, "interrupts_percpu");
361
362 /* Map the system interrupt control registers. */
363 r.flags = int_regs[4].which_io;
364 r.start = int_regs[4].phys_addr;
365 sbus_ioremap(&r, 0, int_regs[4].reg_size, "interrupts_system");
366
367 sun4m_interrupts->set = ~SUN4M_INT_MASKALL;
368 for (i = 0; !cpu_find_by_instance(i, NULL, &mid); i++)
369 sun4m_interrupts->cpu_intregs[mid].clear = ~0x17fff;
370
371 if (!cpu_find_by_instance(1, NULL, NULL)) {
372 /* system wide interrupts go to cpu 0, this should always
373 * be safe because it is guaranteed to be fitted or OBP doesn't
374 * come up
375 *
376 * Not sure, but writing here on SLAVIO systems may puke
377 * so I don't do it unless there is more than 1 cpu.
378 */
379 irq_rcvreg = (unsigned long *)
380 &sun4m_interrupts->undirected_target;
381 sun4m_interrupts->undirected_target = 0;
382 }
383 BTFIXUPSET_CALL(sbint_to_irq, sun4m_sbint_to_irq, BTFIXUPCALL_NORM);
384 BTFIXUPSET_CALL(enable_irq, sun4m_enable_irq, BTFIXUPCALL_NORM);
385 BTFIXUPSET_CALL(disable_irq, sun4m_disable_irq, BTFIXUPCALL_NORM);
386 BTFIXUPSET_CALL(enable_pil_irq, sun4m_enable_pil_irq, BTFIXUPCALL_NORM);
387 BTFIXUPSET_CALL(disable_pil_irq, sun4m_disable_pil_irq, BTFIXUPCALL_NORM);
388 BTFIXUPSET_CALL(clear_clock_irq, sun4m_clear_clock_irq, BTFIXUPCALL_NORM);
389 BTFIXUPSET_CALL(clear_profile_irq, sun4m_clear_profile_irq, BTFIXUPCALL_NORM);
390 BTFIXUPSET_CALL(load_profile_irq, sun4m_load_profile_irq, BTFIXUPCALL_NORM);
391 BTFIXUPSET_CALL(__irq_itoa, sun4m_irq_itoa, BTFIXUPCALL_NORM);
392 sparc_init_timers = sun4m_init_timers;
393#ifdef CONFIG_SMP
394 BTFIXUPSET_CALL(set_cpu_int, sun4m_send_ipi, BTFIXUPCALL_NORM);
395 BTFIXUPSET_CALL(clear_cpu_int, sun4m_clear_ipi, BTFIXUPCALL_NORM);
396 BTFIXUPSET_CALL(set_irq_udt, sun4m_set_udt, BTFIXUPCALL_NORM);
397#endif
398 /* Cannot enable interrupts until OBP ticker is disabled. */
399}
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